On Fri, Mar 28, 2025 at 06:15:37PM +0530, Arun R Murthy wrote:
> The function pointer can_async_flip() checks for async supported
> modifier, add format support check also in the same function.
You are changing intel_plane_can_async_flip(), not the
.can_async_flip() vfunc. So this commit message doesn't
really fit the actual patch.
>
> v11: Move filtering Indexed 8bit to a separate patch
>
> Signed-off-by: Arun R Murthy <arun.r.mur...@intel.com>
> ---
> drivers/gpu/drm/i915/display/i9xx_plane.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_atomic_plane.c | 10 +++++++++-
> drivers/gpu/drm/i915/display/intel_atomic_plane.h | 3 ++-
> drivers/gpu/drm/i915/display/intel_display.c | 14 ++++----------
> drivers/gpu/drm/i915/display/skl_universal_plane.c | 2 +-
> 5 files changed, 18 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c
> b/drivers/gpu/drm/i915/display/i9xx_plane.c
> index
> 5e8344fdfc28a311dc0632bb848a0e08f9e6c6d2..20c47de6d8bfd1d8ddafae02ed68370df799e22b
> 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_plane.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
> @@ -828,7 +828,7 @@ unsigned int vlv_plane_min_alignment(struct intel_plane
> *plane,
> {
> struct intel_display *display = to_intel_display(plane);
>
> - if (intel_plane_can_async_flip(plane, fb->modifier))
> + if (intel_plane_can_async_flip(plane, fb->format->format, fb->modifier))
> return 256 * 1024;
>
> /* FIXME undocumented so not sure what's actually needed */
> @@ -852,7 +852,7 @@ static unsigned int g4x_primary_min_alignment(struct
> intel_plane *plane,
> {
> struct intel_display *display = to_intel_display(plane);
>
> - if (intel_plane_can_async_flip(plane, fb->modifier))
> + if (intel_plane_can_async_flip(plane, fb->format->format, fb->modifier))
> return 256 * 1024;
>
> if (intel_scanout_needs_vtd_wa(display))
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index
> 7276179df878658b7053fe6d8dc37b69f19625e3..6cf12801e1f1f11766ff4d6faf17a21b2c375e8a
> 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -174,8 +174,16 @@ bool intel_plane_needs_physical(struct intel_plane
> *plane)
> DISPLAY_INFO(display)->cursor_needs_physical;
> }
>
> -bool intel_plane_can_async_flip(struct intel_plane *plane, u64 modifier)
> +bool intel_plane_can_async_flip(struct intel_plane *plane, u32 format,
> + u64 modifier)
> {
> + if (intel_format_info_is_yuv_semiplanar(drm_format_info(format),
> modifier)) {
> + drm_dbg_kms(plane->base.dev,
> + "[PLANE:%d:%s] Planar formats do not support async
> flips\n",
> + plane->base.base.id, plane->base.name);
I don't think we want this spam either.
> + return false;
> + }
> +
> return plane->can_async_flip && plane->can_async_flip(modifier);
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> index
> 6efac923dcbc757e6f68564cbef2919c920f13cb..772a12aa9c6997d77b9393f964e91f3e8747d149
> 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> @@ -21,7 +21,8 @@ enum plane_id;
>
> struct intel_plane *
> intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id);
> -bool intel_plane_can_async_flip(struct intel_plane *plane, u64 modifier);
> +bool intel_plane_can_async_flip(struct intel_plane *plane, u32 format,
> + u64 modifier);
> unsigned int intel_adjusted_rate(const struct drm_rect *src,
> const struct drm_rect *dst,
> unsigned int rate);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index
> ee7812126129227971be89d3a79f944155620b03..ff349355ac95a039272f2fe174034ca06a555249
> 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5998,22 +5998,16 @@ static int intel_async_flip_check_hw(struct
> intel_atomic_state *state, struct in
> if (!plane->async_flip)
> continue;
>
> - if (!intel_plane_can_async_flip(plane,
> new_plane_state->hw.fb->modifier)) {
> + if (!intel_plane_can_async_flip(plane,
> new_plane_state->hw.fb->format->format,
> +
> new_plane_state->hw.fb->modifier)) {
> drm_dbg_kms(display->drm,
> - "[PLANE:%d:%s] Modifier 0x%llx does not
> support async flip\n",
> + "[PLANE:%d:%s] Format %p4cc Modifier 0x%llx
> does not support async flip\n",
> plane->base.base.id, plane->base.name,
> + &new_plane_state->hw.fb->format->format,
> new_plane_state->hw.fb->modifier);
> return -EINVAL;
> }
>
> - if
> (intel_format_info_is_yuv_semiplanar(new_plane_state->hw.fb->format,
> -
> new_plane_state->hw.fb->modifier)) {
> - drm_dbg_kms(display->drm,
> - "[PLANE:%d:%s] Planar formats do not
> support async flips\n",
> - plane->base.base.id, plane->base.name);
> - return -EINVAL;
> - }
> -
> /*
> * We turn the first async flip request into a sync flip
> * so that we can reconfigure the plane (eg. change modifier).
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index
> 8739195aba696d13b30e1b978c8b2bb5e188119b..8f6170a5c108a000582f3415f78bad279254d8cf
> 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -601,7 +601,7 @@ static u32 tgl_plane_min_alignment(struct intel_plane
> *plane,
> * Figure out what's going on here...
> */
> if (display->platform.alderlake_p &&
> - intel_plane_can_async_flip(plane, fb->modifier))
> + intel_plane_can_async_flip(plane, fb->format->format, fb->modifier))
This introduces a slight change in behaviour where planar formats
will no longer use the extra 16K alignment on ADL. I think that is
fine (and sort of unavoidable given how I implemented this stuff),
but it should be highlighted in the commit message.
> return mult * 16 * 1024;
>
> switch (fb->modifier) {
>
> --
> 2.25.1
--
Ville Syrjälä
Intel
