From: FengWei
Use max3() macro instead of nesting max() to simplify the return
statement.
Signed-off-by: FengWei
---
v3 -> v4
fix the format of this patch.
drivers/dma-buf/dma-heap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma-buf/dma-heap.c b/drivers/dma-bu
On 16/03/2025 18:42, Maíra Canal wrote:
> Hi Krzysztof,
>
> On 16/03/25 13:43, Krzysztof Kozlowski wrote:
>> On Sun, Mar 16, 2025 at 11:15:11AM -0300, Maíra Canal wrote:
>>> To prevent future changes that might inadvertently break the ABI, add
>>> more examples to the binding. These examples impro
On Sun, 16 Mar 2025 21:51:34 +
Adrián Larumbe wrote:
> Add a device DebugFS file that displays a complete list of all the DRM GEM
> objects that are exposed to UM through a DRM handle.
>
> Since leaking object identifiers that might belong to a different NS is
> inadmissible, this functional
On Sun, 16 Mar 2025 21:51:33 +
Adrián Larumbe wrote:
> Allow UM to label a BO for which it possesses a DRM handle.
>
> Signed-off-by: Adrián Larumbe
> ---
> drivers/gpu/drm/panthor/panthor_drv.c | 31 +++
> include/uapi/drm/panthor_drm.h| 14
>
On Fri, Mar 14, 2025 at 08:55:05PM +0200, Dmitry Baryshkov wrote:
> On Fri, Mar 14, 2025 at 05:54:14PM +, Maxime Ripard wrote:
> > On Fri, 14 Mar 2025 11:36:49 +0200, Dmitry Baryshkov wrote:
> > > It is common for the DisplayPort bridges to implement audio support. In
> > > preparation to provi
On March 17, 2025 10:21:50 AM GMT+01:00, Krzysztof Kozlowski
wrote:
>On Sat, Mar 15, 2025 at 03:57:37PM +0100, Barnabás Czémán wrote:
>> From: Adam Skladowski
>>
>> Adreno 505 (MSM8937), Adreno 506(MSM8953) and Adreno 510(MSM8976)
>> require Always-on branch clock to be enabled, describe it.
On March 17, 2025 10:17:46 AM GMT+01:00, Krzysztof Kozlowski
wrote:
>On Sat, Mar 15, 2025 at 03:57:35PM +0100, Barnabás Czémán wrote:
>> Add device tree bindings for the global clock controller on Qualcomm
>> MSM8937 platform.
>>
>> Signed-off-by: Barnabás Czémán
>> ---
>> .../bindings/cloc
_dpu_encoder_trigger_start dereferences "struct dpu_encoder_phys *phys"
before the sanity checks which can lead to a NULL pointer dereference if
phys is NULL.
Fix this by reordering the dereference after the sanity checks.
Fixes: 8144d17a81d9 ("drm/msm/dpu: Skip trigger flush and start for CWB"
On Sat, Mar 15, 2025 at 07:32:28AM +, Maud Spierings | GOcontroll wrote:
> >> +required:
> >> + - compatible
> >> + - reg
> >> + - reset-gpios
> >> + - interrupts
> >> + - sync-gpios
> >> + - i2c-bus
> >> + - slot-number
> >> +
> >> +additionalProperties: false
> >> +
> >> +examples:
> >
From: Krzysztof Kozlowski
Sent: Monday, March 17, 2025 11:34 AM
>On Sat, Mar 15, 2025 at 07:32:28AM +, Maud Spierings | GOcontroll wrote:
>> >> +required:
>> >> + - compatible
>> >> + - reg
>> >> + - reset-gpios
>> >> + - interrupts
>> >> + - sync-gpios
>> >> + - i2c-bus
>> >> + - slo
On Sun, 16 Mar 2025 21:51:32 +
Adrián Larumbe wrote:
> Add a new character string Panthor BO field, and a function that allows
> setting it from within the driver.
>
> Driver takes care of freeing the string when it's replaced or no longer
> needed at object destruction time, but allocating
From: ZhangEnpei
Replace the open-code with dev_err_probe() to simplify the code.
Signed-off-by: ZhangEnpei
---
drivers/gpu/drm/bridge/sil-sii8620.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c
b/drivers/gpu/drm/bridge/sil-s
Instead of testing import_attach for imported GEM buffers, invoke
drm_gem_is_imported() to do the test. The helper tests the dma_buf
itself while import_attach is just an artifact of the import. Prepares
to make import_attach optional.
Signed-off-by: Thomas Zimmermann
Cc: Maxime Ripard
Cc: Dave
Currently, Panfrost only supports MMU configuration in "LEGACY" (as
Bifrost calls it) mode, a (modified) version of LPAE "Large Physical
Address Extension", which in Linux we've called "mali_lpae".
This commit adds support for conditionally enabling AARCH64_4K page
table format. To achieve that, a
MediaTek MT8192 SoC has an ARM Mali-G57 MC5 GPU (Valhall-JM). Now that
Panfrost supports AARCH64_4K page table format, let's enable it on this
SoC.
Running glmark2-es2-drm [0] benchmark, reported the same performance
score on both modes Mali LPAE (LEGACY) vs. AARCH64_4K, before and after
this comm
MediaTek MT8188 SoC has an ARM Mali-G57 MC3 GPU (Valhall-JM), which
constantly faults with the current panfrost support.
For instance, running `glmark2-es2-drm` benchmark test:
```
[ 79.617461] panfrost 1300.gpu: js fault, js=1, status=JOB_BUS_FAULT,
head=0xaadc380, tail=0xaadc380
[ 80.11
Hello Maxime,
On Fri, 14 Mar 2025 19:21:01 +0100
Maxime Ripard wrote:
> Hi,
>
> On Fri, Mar 14, 2025 at 11:31:13AM +0100, Luca Ceresoli wrote:
> > This series improves the way DRM bridges are allocated and
> > initialized and makes them reference-counted. The goal of reference
> > counting is t
Hello Maxime,
thanks for the very prompt feedback!
On Fri, 14 Mar 2025 19:04:40 +0100
Maxime Ripard wrote:
> On Fri, Mar 14, 2025 at 11:31:15AM +0100, Luca Ceresoli wrote:
> > DRM bridges are currently considered as a fixed element of a DRM card, and
> > thus their lifetime is assumed to extend
On Fri, 14 Mar 2025 19:10:41 +0100
Maxime Ripard wrote:
> On Fri, Mar 14, 2025 at 11:31:19AM +0100, Luca Ceresoli wrote:
> > drm_bridge_chain_get_first_bridge() returns a bridge pointer that the
> > caller could hold for a long time. Increment the refcount of the returned
> > bridge and document
From: Rob Clark
IB_SIZE is only b0..b19. Starting with a6xx gen3, additional fields
were added above the IB_SIZE. Accidentially setting them can cause
badness. Fix this by properly defining the CP_INDIRECT_BUFFER packet
and using the generated builder macro to ensure unintended bits are not
se
(Cc: dri-devel@lists.freedesktop.org, Boris)
Hi Himal,
Please make sure to copy in dri-devel for such patches.
On Fri, Mar 14, 2025 at 01:32:10PM +0530, Himal Prasad Ghimiray wrote:
> Introduce MADVISE operations that do not unmap the GPU VMA. These
> operations split VMAs if the start or end ad
As done in panthor, define and use these GPU_MMU_FEATURES_* macros,
which makes code easier to read and reuse.
Signed-off-by: Ariel D'Alessandro
Reviewed-by: Boris Brezillon
Reviewed-by: Steven Price
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/panfrost/panfrost_mmu.c | 6 +++
Set this feature flag on all Mali Bifrost platforms as the MMU supports
AARCH64 4K page table format.
Signed-off-by: Ariel D'Alessandro
Reviewed-by: Boris Brezillon
Reviewed-by: Steven Price
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/panfrost/panfrost_features.h | 3 +++
1 f
Panfrost does not support uncached mappings, so flag them properly. Also
flag the pages that are mapped as response to a page fault as cached.
Signed-off-by: Boris Brezillon
Signed-off-by: Ariel D'Alessandro
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Steven Price
---
drivers/gpu/dr
On Mon, 17 Mar 2025 09:40:42 -0300
Ariel D'Alessandro wrote:
> +static int panfrost_mmu_cfg_init(struct panfrost_mmu *mmu,
> + enum io_pgtable_fmt fmt)
> +{
> + struct panfrost_device *pfdev = mmu->pfdev;
> +
> + switch (fmt) {
> + case ARM_64_LPAE_S1:
>
On Mon, Mar 17, 2025 at 02:06:44PM +0100, Thomas Zimmermann wrote:
> Instead of testing import_attach for imported GEM buffers, invoke
> drm_gem_is_imported() to do the test. The helper tests the dma_buf
> itself while import_attach is just an artifact of the import. Prepares
> to make import_attac
Don't populate the const read-only array dflt_rules on the stack at run
time, instead make it static.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/i915/intel_memory_region.c| 2 +-
drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c | 2 +-
2 files changed, 2 insertions(+), 2 deletion
C-String literals were added in Rust 1.77. Replace instances of
`kernel::c_str!` with C-String literals where possible and rename
`kernel::c_str!` to `c_str_avoid_literals` to clarify its intended use.
Closes: https://github.com/Rust-for-Linux/linux/issues/1075
Signed-off-by: Tamir Duberstein
---
Clean up references to `kernel::str::CStr`.
Signed-off-by: Tamir Duberstein
---
drivers/gpu/drm/drm_panic_qr.rs | 4 ++--
drivers/net/phy/ax88796b_rust.rs | 1 +
drivers/net/phy/qt2025.rs| 1 +
rust/kernel/device.rs| 3 +--
rust/kernel/driver.rs| 4 ++--
rus
This picks up from Michal Rostecki's work[0]. Per Michal's guidance I
have omitted Co-authored tags, as the end result is quite different.
Link:
https://lore.kernel.org/rust-for-linux/20240819153656.28807-2-vadorov...@protonmail.com/t/#u
[0]
Closes: https://github.com/Rust-for-Linux/linux/issues
On 17/03/2025 10:48, Barnabás Czémán wrote:
>
>
> On March 17, 2025 10:21:50 AM GMT+01:00, Krzysztof Kozlowski
> wrote:
>> On Sat, Mar 15, 2025 at 03:57:37PM +0100, Barnabás Czémán wrote:
>>> From: Adam Skladowski
>>>
>>> Adreno 505 (MSM8937), Adreno 506(MSM8953) and Adreno 510(MSM8976)
>>> re
Hi Janusz,
On 2025-03-14 at 21:38:34 GMT, Janusz Krzysztofik wrote:
> Commit f67986b0119c04 ("drm/i915/pxp: Promote pxp subsystem to top-level
> of i915") added PXP initialization to driver probe path, but didn't add a
> respective PXP cleanup on probe error. That lack of cleanup seems
> harmless
Hi Janusz,
thanks for the series.
On 2025-03-14 at 21:38:33 GMT, Janusz Krzysztofik wrote:
> Commit 8f460e2c78f2 ("drm/i915: Demidlayer driver loading") which
> introduced manual device registration also added a message that is
> submitted on device registration failure as an error. If that fail
Hi Janusz,
On 2025-03-14 at 21:38:35 GMT, Janusz Krzysztofik wrote:
> Starting with commit ec3e00b4ee27 ("drm/i915: stop registering if
> drm_dev_register() fails"), we return from i915_driver_register()
> immediately if drm_dev_register() fails, skipping remaining registration
> steps, and contin
-Original Message-
From: Wajdeczko, Michal
Sent: Saturday, March 15, 2025 7:45 AM
To: Cavitt, Jonathan ; intel...@lists.freedesktop.org
Cc: Gupta, saurabhg ; Zuo, Alex ;
joonas.lahti...@linux.intel.com; Brost, Matthew ;
Zhang, Jianxun ; Lin, Shuicheng
; dri-devel@lists.freedesktop.org;
On Sun, Mar 16, 2025 at 7:32 PM Dmitry Baryshkov <
dmitry.barysh...@oss.qualcomm.com> wrote:
> On Sun, Mar 16, 2025 at 02:58:22PM -0400, Anusha Srivatsa wrote:
> > Move away from using deprecated API and use _multi
> > variants if available. Use mipi_dsi_msleep()
> > and mipi_dsi_usleep_range() in
In order to enforce per-SoC register rules, add per-compatible
restrictions. For example, V3D 3.3 (used in brcm,7268-v3d) has a cache
controller (GCA), which is not present in other V3D generations. Declaring
these differences helps ensure the DTB accurately reflect the hardware
design.
The exampl
From: Andy Yan
Use the common dp link power up/down helpers to avoid duplicating code.
Signed-off-by: Andy Yan
Reviewed-by: Dmitry Baryshkov
---
(no changes since v1)
.../drm/bridge/analogix/analogix-anx78xx.c| 30 +--
1 file changed, 1 insertion(+), 29 deletions(-)
dif
From: Andy Yan
Use the common dp link power up/down helpers to avoid duplicating code.
Signed-off-by: Andy Yan
Reviewed-by: Dmitry Baryshkov
---
(no changes since v1)
drivers/gpu/drm/bridge/ite-it6505.c | 46 +++--
1 file changed, 4 insertions(+), 42 deletions(-)
di
From: Andy Yan
The helper functions drm_dp_link_power_up/down were moved to Tegra
DRM in commit 9a42c7c647a9 ("drm/tegra: Move drm_dp_link helpers to Tegra
DRM")".
Now since more and more users are duplicating the same code in their
own drivers, it's time to make them as DRM DP common helpers a
From: Andy Yan
Use the common dp link power up/down helpers to avoid duplicating code.
Signed-off-by: Andy Yan
Reviewed-by: Dmitry Baryshkov
---
(no changes since v1)
.../drm/bridge/analogix/analogix-anx6345.c| 30 +--
1 file changed, 1 insertion(+), 29 deletions(-)
dif
From: Andy Yan
Use the common dp link power up/down helpers to avoid duplicating code.
Signed-off-by: Andy Yan
Reviewed-by: Dmitry Baryshkov
---
(no changes since v1)
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 74 +--
1 file changed, 2 insertions(+), 72 deletions(-)
di
Variable "bridge" is allocated by agp_alloc_bridge() and
have to be released by agp_put_bridge() if something goes
wrong. In this patch, add the missing call of agp_put_bridge()
in agp_amdk7_probe() to prevent potential memory leak bug.
Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2")
Cc: sta...@vger.kern
Dave Airlie writes:
>> Dave, you're the only one with fingerprints on this document; is the
>> change OK with you?
>
> LGTM,
>
> Acked-by: Dave Airlie
OK, applied - thanks.
jon
Jacek Lawrynowicz writes:
> The guidelines mention that firmware updates can't break the kernel,
> but it doesn't state directly that they can't break userspace programs.
> Make it explicit that firmware updates cannot break UAPI.
>
> Signed-off-by: Jacek Lawrynowicz
> ---
> .../driver-api/firm
Gently ping！
Hi, Dmitry. There is no more comment for this patch set for one week, I wonder,
could this patch be applied, or wait for more comments.
Thanks,
Baihan
From: Baihan Li
To support DP HPD, edid printing, and colorbar display features based on
the Hisislcon DP devices.
---
ChangeLo
The V3D driver currently determines the GPU tech version (33, 41...)
by reading a register. This approach has worked so far since this
information wasn’t needed before powering on the GPU.
V3D 7.1 introduces new registers that must be written to power on the
GPU, requiring us to know the V3D versi
In addition to the standard reset controller, V3D 7.x requires configuring
the V3D_SMS registers for proper power on/off and reset. Add the new
registers to `v3d_regs.h` and ensure they are properly configured during
device probing, removal, and reset.
This change fixes GPU reset issues on the Ras
As established in commit 89d04995f76c ("MAINTAINERS: Drop Emma Anholt
from all M lines."), Emma is no longer active in the Linux kernel and
dropped the V3D maintainership. Therefore, remove Emma as one of the DT
maintainers and add the current V3D driver maintainer.
Acked-by: Emma Anholt
Acked-by
From: Andy Yan
Because the layer/window enable/disable is take effect by vsync, if the
overlay configuration of these layers does not follow vsync and
takes effect immediately instead, when multiple layers are dynamically
enable/disable, inconsistent display contents may be seen on the screen.
S
On Tue, 11 Mar 2025 01:49:52 +, li...@treblig.org wrote:
> The pcf50633 was used as part of the OpenMoko devices but
> the support for its main chip was recently removed in:
> commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support")
>
> See https://lore.kernel.org/all/Z8z236h4B5A6Ki3D@gall
On Tue, 18 Mar 2025 at 08:53, Jonathan Corbet wrote:
>
> Jacek Lawrynowicz writes:
>
> > The guidelines mention that firmware updates can't break the kernel,
> > but it doesn't state directly that they can't break userspace programs.
> > Make it explicit that firmware updates cannot break UAPI.
>
On Thu, Mar 6, 2025 at 2:52 AM Huang, Honglei1
wrote:
>
> On 2025/3/1 5:21, Demi Marie Obenour wrote:
> > On 2/28/25 12:36 AM, Honglei Huang wrote:
> >> From: Honglei Huang
> >>
> >> Add a new resource for blob resource, called userptr, used for let
> >> host access guest user space memory, to a
Hi,
On 22-Feb-25 17:43, Antheas Kapenekakis wrote:
> The OneXPlayer X1 series features a 2k 10.95 display with a portrait
> orientation. Add a quirk to set the panel orientation to portrait mode
> to both the Intel and AMD variants.
>
> Signed-off-by: Antheas Kapenekakis
Thanks, patch looks goo
Hi,
On 22-Feb-25 17:43, Antheas Kapenekakis wrote:
> The OneXPlayer X1 mini features a 2k 8.8 display with a portrait
> orientation. Add a quirk to set the panel orientation to portrait
> mode. There is no Intel variant.
>
> Signed-off-by: Antheas Kapenekakis
Thanks, patch looks good to me:
Re
Hi,
On 22-Feb-25 17:43, Antheas Kapenekakis wrote:
> The OneXPlayer F1Pro has a 144hz 1920x1080 portrait OLED panel.
> Add a quirk to correct the panel portrait orientation. In addition,
> it comes with a red limited edition variant in the Chinese market,
> so add that as well.
>
> Signed-off-by:
On Sat, Mar 15, 2025 at 03:57:35PM +0100, Barnabás Czémán wrote:
> Add device tree bindings for the global clock controller on Qualcomm
> MSM8937 platform.
>
> Signed-off-by: Barnabás Czémán
> ---
> .../bindings/clock/qcom,gcc-msm8937.yaml | 75
> ++
> include/dt-b
Boris,
On 3/15/25 5:43 AM, Boris Brezillon wrote:
On Fri, 14 Mar 2025 14:38:56 -0300
Ariel D'Alessandro wrote:
Currently, Panfrost only supports MMU configuration in "LEGACY" (as
Bifrost calls it) mode, a (modified) version of LPAE "Large Physical
Address Extension", which in Linux we've call
Currently, Panfrost only supports MMU configuration in "LEGACY" (as
Bifrost calls it) mode, a (modified) version of LPAE "Large Physical
Address Extension", which in Linux we've called "mali_lpae".
This commit adds support for conditionally enabling AARCH64_4K page
table format. To achieve that, a
MediaTek MT8188 SoC has an ARM Mali-G57 MC3 GPU (Valhall-JM), which
constantly faults with the current panfrost support.
For instance, running `glmark2-es2-drm` benchmark test:
```
[ 79.617461] panfrost 1300.gpu: js fault, js=1, status=JOB_BUS_FAULT,
head=0xaadc380, tail=0xaadc380
[ 80.11
Hi all,
This is a new iteration on Panfrost support for AARCH64_4K page table
format. The main reason behind this patchset is that MediaTek MT8188 SoC
(ARM Mali-G57 MC3 GPU) constantly faults due to the actual Panfrost cache
configuration.
Currently, Panfrost only supports MMU configuration in "L
Panfrost does not support uncached mappings, so flag them properly. Also
flag the pages that are mapped as response to a page fault as cached.
Signed-off-by: Boris Brezillon
Signed-off-by: Ariel D'Alessandro
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Steven Price
---
drivers/gpu/dr
Set this feature flag on all Mali Bifrost platforms as the MMU supports
AARCH64 4K page table format.
Signed-off-by: Ariel D'Alessandro
Reviewed-by: Boris Brezillon
Reviewed-by: Steven Price
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/panfrost/panfrost_features.h | 3 +++
1 f
As done in panthor, define and use these GPU_MMU_FEATURES_* macros,
which makes code easier to read and reuse.
Signed-off-by: Ariel D'Alessandro
Reviewed-by: Boris Brezillon
Reviewed-by: Steven Price
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/panfrost/panfrost_mmu.c | 6 +++
MediaTek MT8192 SoC has an ARM Mali-G57 MC5 GPU (Valhall-JM). Now that
Panfrost supports AARCH64_4K page table format, let's enable it on this
SoC.
Running glmark2-es2-drm [0] benchmark, reported the same performance
score on both modes Mali LPAE (LEGACY) vs. AARCH64_4K, before and after
this comm
On 17/03/2025 03:37, feng.w...@zte.com.cn wrote:
> From: FengWei
>
> Use max3() macro instead of nesting max() to simplify the return
> statement.
>
> Signed-off-by: FengWei
> ---
> v3 -> v4
> fix the format of this patch.
> drivers/dma-buf/dma-heap.c | 2 +-
You sent five versions per day of t
From: Andy Yan
Use cfg->ctrl_ops->io_init callback make it work for all platform.
And it's also gets rid of code duplication
Fixes: 3f60dbd40d3f ("drm/rockchip: dw_hdmi_qp: Add platform ctrl callback")
Signed-off-by: Andy Yan
Reviewed-by: Sebastian Reichel
---
Changes in v2:
- Store the ctrl
On Mon, Mar 17, 2025 at 10:45:16AM +0100, Maxime Ripard wrote:
> On Fri, Mar 14, 2025 at 08:55:05PM +0200, Dmitry Baryshkov wrote:
> > On Fri, Mar 14, 2025 at 05:54:14PM +, Maxime Ripard wrote:
> > > On Fri, 14 Mar 2025 11:36:49 +0200, Dmitry Baryshkov wrote:
> > > > It is common for the Displa
Hi Louis,
On 14/03/25 20:01, Louis Chauvet wrote:
Le 14/03/2025 à 13:11, Vignesh Raman a écrit :
Hi Louis,
On 13/03/25 19:30, Louis Chauvet wrote:
Le 13/03/2025 à 11:45, Vignesh Raman a écrit :
Hi Maintainers,
Hi Vignesh,
Thanks for the report.
On my setup, this test passed, and the
On Thu, Mar 13, 2025 at 11:50:37AM +0200, Ilpo Järvinen wrote:
> On Thu, 13 Mar 2025, Ilpo Järvinen wrote:
>
> > On Wed, 12 Mar 2025, Michał Winiarski wrote:
> >
> > > Similar to regular resizable BAR, VF BAR can also be resized, e.g. by
> > > the system firmware or the PCI subsystem itself.
> >
On Mon, Mar 17, 2025 at 02:04:56PM +0800, zhang.en...@zte.com.cn wrote:
> From: ZhangEnpei
>
> Replace the open-code with dev_err_probe() to simplify the code.
>
> Signed-off-by: ZhangEnpei
> ---
> drivers/gpu/drm/bridge/sil-sii8620.c | 9 +++--
> 1 file changed, 3 insertions(+), 6 deletio
Il 14/03/25 18:38, Ariel D'Alessandro ha scritto:
Currently, Panfrost only supports MMU configuration in "LEGACY" (as
Bifrost calls it) mode, a (modified) version of LPAE "Large Physical
Address Extension", which in Linux we've called "mali_lpae".
This commit adds support for conditionally enabl
Am 15.03.25 um 13:01 schrieb Yue Haibing:
In file included from :
./drivers/gpu/drm/i915/display/intel_fbdev.h: In function
‘intel_fbdev_framebuffer’:
./drivers/gpu/drm/i915/display/intel_fbdev.h:32:16: error: ‘NULL’ undeclared
(first use in this function)
32 | return NULL;
Il 14/03/25 18:38, Ariel D'Alessandro ha scritto:
As done in panthor, define and use these GPU_MMU_FEATURES_* macros,
which makes code easier to read and reuse.
Signed-off-by: Ariel D'Alessandro
Reviewed-by: Boris Brezillon
Reviewed-by: Steven Price
Reviewed-by: AngeloGioacchino Del Regno
Il 14/03/25 18:38, Ariel D'Alessandro ha scritto:
Set this feature flag on all Mali Bifrost platforms as the MMU supports
AARCH64 4K page table format.
Signed-off-by: Ariel D'Alessandro
Reviewed-by: Boris Brezillon
Reviewed-by: Steven Price
Reviewed-by: AngeloGioacchino Del Regno
Il 14/03/25 18:38, Ariel D'Alessandro ha scritto:
MediaTek MT8192 SoC has an ARM Mali-G57 MC5 GPU (Valhall-JM). Now that
Panfrost supports AARCH64_4K page table format, let's enable it on this
SoC.
Running glmark2-es2-drm [0] benchmark, reported the same performance
score on both modes Mali LPAE
https://bugzilla.kernel.org/show_bug.cgi?id=219888
Alexandre Demers (alexandre.f.dem...@gmail.com) changed:
What|Removed |Added
Summary|amdgpu: Oops connecting |amdgpu:
> -Original Message-
> From: Murthy, Arun R
> Sent: Wednesday, March 12, 2025 6:39 PM
> To: dri-devel@lists.freedesktop.org; intel-...@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ;
> 20250219093211.4059187-1-arun.r.mur...@intel.com;
> 202503110
> -Original Message-
> From: Murthy, Arun R
> Sent: Wednesday, March 12, 2025 6:39 PM
> To: dri-devel@lists.freedesktop.org; intel-...@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ;
> 20250219093211.4059187-1-arun.r.mur...@intel.com;
> 202503110
On 16/03/2025 18:40, Anusha Srivatsa wrote:
On Fri, Mar 14, 2025 at 10:20 AM Doug Anderson mailto:diand...@chromium.org>> wrote:
Hi,
On Thu, Mar 13, 2025 at 9:47 PM Anusha Srivatsa mailto:asriv...@redhat.com>> wrote:
>
> @@ -181,24 +162,15 @@ static int r63353_panel_prepare(
Hi,
On Mon, Mar 17, 2025 at 04:20:39PM +0800, Andy Yan wrote:
> From: Andy Yan
>
> Use cfg->ctrl_ops->io_init callback make it work for all platform.
>
> Fixes: 3f60dbd40d3f ("drm/rockchip: dw_hdmi_qp: Add platform ctrl callback")
> Signed-off-by: Andy Yan
> ---
It also gets rid of code dupli
On 13/03/2025 01:54, Anusha Srivatsa wrote:
Start using the new helper that does the refcounted
allocations.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/panel/panel-simple.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/
Hi Sumit,
On Thu, Mar 13, 2025 at 11:41 AM Sumit Garg wrote:
>
> Hi Jens,
>
> On Wed, Mar 05, 2025 at 02:04:09PM +0100, Jens Wiklander wrote:
> > The OP-TEE backend driver has two internal function pointers to convert
> > between the subsystem type struct tee_param and the OP-TEE type struct
> >
Hello,
On 6/20/24 7:43 PM, Boris Brezillon wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> On Thu, 20 Jun 2024 15:28:56 +0530
> Manikandan Muralidharan wrote:
>
>> Drop Sam Ravnborg and Boris Brezillon as they are no longer interested i
On Sun, 16 Mar 2025 21:51:35 +
Adrián Larumbe wrote:
> Expand the driver's DebugFS GEMS file to display entries for the heap
> chunks' GEM objects, both those allocated at heap creation time through an
> ioctl(), or in response to a tiler OOM event.
>
> Signed-off-by: Adrián Larumbe
> ---
>
From: Andy Yan
Use cfg->ctrl_ops->io_init callback make it work for all platform.
Fixes: 3f60dbd40d3f ("drm/rockchip: dw_hdmi_qp: Add platform ctrl callback")
Signed-off-by: Andy Yan
---
.../gpu/drm/rockchip/dw_hdmi_qp-rockchip.c| 23 +++
1 file changed, 3 insertions(+), 2
Hi
Am 13.03.25 um 17:51 schrieb Lee Jones:
On Thu, 06 Mar 2025, Thomas Zimmermann wrote:
This series removes the remaining dependencies on fbdev from the
backlight, lcd and led subsystems. Each depends on fbdev events to
track display state. Make fbdev inform each subsystem via a dedicated
int
On Thu, Mar 13, 2025 at 11:56:07AM +0200, Ilpo Järvinen wrote:
> On Wed, 12 Mar 2025, Michał Winiarski wrote:
>
> > Similar to regular resizable BAR, VF BAR can also be resized.
> >
> > The structures are very similar, which means we can reuse most of the
> > implementation.
> >
> > Extend the p
On Sun, 16 Mar 2025 21:51:33 +
Adrián Larumbe wrote:
> Allow UM to label a BO for which it possesses a DRM handle.
>
> Signed-off-by: Adrián Larumbe
> ---
> drivers/gpu/drm/panthor/panthor_drv.c | 31 +++
> include/uapi/drm/panthor_drm.h| 14
>
https://bugzilla.kernel.org/show_bug.cgi?id=219888
--- Comment #7 from Alexandre Demers (alexandre.f.dem...@gmail.com) ---
DCE6's dce60_tg_funcs structure is missing .is_two_pixels_per_container =
dce110_is_two_pixels_per_container
It seems the fix is already in 6.14-rc7.
--
You may reply to th
On Sat, Mar 15, 2025 at 03:57:37PM +0100, Barnabás Czémán wrote:
> From: Adam Skladowski
>
> Adreno 505 (MSM8937), Adreno 506(MSM8953) and Adreno 510(MSM8976)
> require Always-on branch clock to be enabled, describe it.
>
> Signed-off-by: Adam Skladowski
> [reword commit, move alwayson on the f
On Mon, 17 Mar 2025 at 10:15, Hans de Goede wrote:
>
> Hi,
>
> On 22-Feb-25 17:43, Antheas Kapenekakis wrote:
> > The OneXPlayer F1Pro has a 144hz 1920x1080 portrait OLED panel.
> > Add a quirk to correct the panel portrait orientation. In addition,
> > it comes with a red limited edition variant
Hi,
On 22-Feb-25 17:43, Antheas Kapenekakis wrote:
> The Zotac Gaming Zone handheld features a 1080p portrait OLED screen.
> Add the rotation to the panel orientation quirks.
>
> Signed-off-by: Antheas Kapenekakis
> ---
> drivers/gpu/drm/drm_panel_orientation_quirks.c | 6 ++
> 1 file chang
On Thu, 2025-03-13 at 13:57 +0100, Christian König wrote:
> Am 13.03.25 um 13:50 schrieb Thomas Hellström:
> > Hi, Christian
> >
> > On Thu, 2025-03-13 at 11:19 +0100, Christian König wrote:
> > > Am 12.03.25 um 22:03 schrieb Thomas Hellström:
> > > > This RFC implements and requests comments for
On Mon, 17 Mar 2025 at 10:20, Hans de Goede wrote:
>
> Hi,
>
> On 22-Feb-25 17:43, Antheas Kapenekakis wrote:
> > The Zotac Gaming Zone handheld features a 1080p portrait OLED screen.
> > Add the rotation to the panel orientation quirks.
> >
> > Signed-off-by: Antheas Kapenekakis
> > ---
> > dri
On Mon, 17 Mar 2025 at 10:23, Antheas Kapenekakis wrote:
>
> On Mon, 17 Mar 2025 at 10:20, Hans de Goede wrote:
> >
> > Hi,
> >
> > On 22-Feb-25 17:43, Antheas Kapenekakis wrote:
> > > The Zotac Gaming Zone handheld features a 1080p portrait OLED screen.
> > > Add the rotation to the panel orient
Avoid struct drm_gem_object.import_attach in many DRM drivers that
use it to get the object's dma-buf or test for an imported buffer.
The helper drm_gem_is_imported() tests if a GEM object's buffer
has been imported into the driver. The corresponding dma-buf is
referenced by the object itself. Bot
Instead of testing import_attach for imported GEM buffers, invoke
drm_gem_is_imported() to do the test. The helper tests the dma_buf
itself while import_attach is just an artifact of the import. Prepares
to make import_attach optional.
Signed-off-by: Thomas Zimmermann
Cc: Inki Dae
Cc: Seung-Woo
Instead of testing import_attach for imported GEM buffers, invoke
drm_gem_is_imported() to do the test. The helper tests the dma_buf
itself while import_attach is just an artifact of the import. Prepares
to make import_attach optional.
Signed-off-by: Thomas Zimmermann
Cc: Rob Clark
Cc: Abhinav K
Instead of testing import_attach for imported GEM buffers, invoke
drm_gem_is_imported() to do the test. The helper tests the dma_buf
itself while import_attach is just an artifact of the import. Prepares
to make import_attach optional.
Signed-off-by: Thomas Zimmermann
Cc: Boris Brezillon
Cc: Rob
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