Provide tests to verify that drm_atomic_helper_connector_hdmi_check()
helper behaviour when using YUV420 output format is to always set the
limited RGB quantization range to 'limited', no matter what the value of
Broadcast RGB property is.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/te
This series enables the support for DSI to DP bridge ports
(labled as DSI0 and DSI1) of the Qualcomm's SA8775P Ride platform.
SA8775P SoC has DSI controller v2.5.1 and DSI PHY v4.2.
The Ride platform is having ANX7625 DSI to DP bridge chip from Analogix.
---
This patch depends on following series
Use gpiod_set_value_cansleep() instead of gpiod_set_value()
to fix the below call trace in the boot log:
[5.690534] Call trace:
[5.690536] gpiod_set_value+0x40/0xa4
[5.690540] anx7625_runtime_pm_resume+0xa0/0x324 [anx7625]
[5.690545] __rpm_callback+0x48/0x1d8
[5.690549] rpm
Add DSI Controller v2.5.1 support for SA8775P SoC.
Signed-off-by: Ayushi Makhija
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 18 ++
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
2 files changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers/gpu/drm/msm/dsi/d
Add device tree nodes for the DSI0 and DSI1 controllers
with their corresponding PHYs found on Qualcomm SA8775P SoC.
Signed-off-by: Ayushi Makhija
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 186 +-
1 file changed, 185 insertions(+), 1 deletion(-)
diff --git a/arch/arm64
Add the missing 'bpc' string to the debug message indicating the
supported format identified within hdmi_try_format_bpc() helper.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/display/drm_hdmi_state_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/
On 3/4/2025 3:58 PM, Nemesa Garg wrote:
Once the casf_compute config is called then the
strength and win_size bit of sharpness ctl register
will be set. Read back the bits in get_config.
Signed-off-by: Nemesa Garg
---
drivers/gpu/drm/i915/display/intel_casf.c| 11 +++
drivers/gpu/d
Document DSI controller and phy on SA8775P platform.
Signed-off-by: Ayushi Makhija
---
.../display/msm/qcom,sa8775p-mdss.yaml| 188 ++
1 file changed, 188 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml
b/Documentation/de
The SA8775P SoC uses the 5nm (v4.2) DSI PHY driver with
different enable regulator load.
Signed-off-by: Ayushi Makhija
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 27 +++
The anx7625_link_bridge() checks if a device is not a panel
bridge and add DRM_BRIDGE_OP_HPD and DRM_BRIDGE_OP_DETECT to
the bridge operations. However, on port 1 of the anx7625
bridge, any device added is always treated as a panel
bridge, preventing connector_detect function from being
called. To
Document the DSI PHY on the SA8775P Platform.
Signed-off-by: Ayushi Makhija
---
Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
b/Documentation/devicetree/bindings/d
When device enters the suspend state, it prevents
HPD interrupts from occurring. To address this,
add an additional PM runtime vote in hpd_enable().
This vote is removed in hpd_disable().
Signed-off-by: Ayushi Makhija
---
drivers/gpu/drm/bridge/analogix/anx7625.c | 18 ++
1 file
Document the DSI CTRL on the SA8775P Platform.
Signed-off-by: Ayushi Makhija
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetre
Add anx7625 DSI to DP bridge device nodes.
Signed-off-by: Ayushi Makhija
---
arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 208 -
1 file changed, 207 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
b/arch/arm64/boot/dts/qcom/sa8775p-ride.
Hi all,
Friendly ping: who can take this, please? :)
Thanks!
--
Gustavo
On 14/02/25 18:48, Gustavo A. R. Silva wrote:
-Wflex-array-member-not-at-end was introduced in GCC-14, and we are
getting ready to enable it, globally.
So, in order to avoid ending up with a flexible-array member in the
m
在 2025/3/11 16:42, Bingbu Cao 写道:
[You don't often get email from bingbu@linux.intel.com. Learn why this is
important at https://aka.ms/LearnAboutSenderIdentification ]
Huan,
Thanks for your response.
On 3/11/25 3:12 PM, Huan Yang wrote:
在 2025/3/11 14:40, Bingbu Cao 写道:
[You don't of
On Fri, Mar 07, 2025 at 08:18:18PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/dp_mst: Fix locking when skipping CSN before topology probing
> URL : https://patchwork.freedesktop.org/series/146019/
> State : success
Thanks for the reviews, patch is pushed to drm-misc-fixes.
On Sun, Mar 09, 2025 at 07:36:08PM +, li...@treblig.org wrote:
> From: "Dr. David Alan Gilbert"
>
> The pcf50633 was used as part of the OpenMoko devices but
> the support for its main chip was recently removed in:
> commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support")
>
> See https:
On Mon, Mar 10, 2025 at 09:22:50PM +0300, Dan Carpenter wrote:
> On Mon, Mar 10, 2025 at 12:56:46PM -0400, Rodrigo Vivi wrote:
> > On Mon, Mar 10, 2025 at 01:48:00PM +0300, Dan Carpenter wrote:
> > > The error handling assumes that vm_bind_ioctl_check_args() will
> > > initialize "bind_ops" but the
On the off chance that command stream passed from userspace via
ioctl() call to radeon_vce_cs_parse() is weirdly crafted and
first command to execute is to encode (case 0x0301), the function
in question will attempt to call radeon_vce_cs_reloc() with size
argument that has not been properly ini
On Mon, 10 Mar 2025 at 16:55, Maxime Ripard wrote:
>
> Hi,
>
> On Fri, Mar 07, 2025 at 07:55:52AM +0200, Dmitry Baryshkov wrote:
> > From: Dmitry Baryshkov
> >
> > As pointed out by Laurent, OP bits are supposed to describe operations.
> > Split DRM_BRIDGE_OP_HDMI_AUDIO from DRM_BRIDGE_OP_HDMI in
On Tue, 11 Mar 2025, "Avizrat, Yaron" wrote:
> On 07/03/2025 11:21, Oded Gabbay wrote:
>> On Thu, Mar 06, 2025 at 03:51:24PM +0200, Avizrat, Yaron wrote:
>>> On 05/03/2025 13:57, Jani Nikula wrote:
On Wed, 05 Mar 2025, "Avizrat, Yaron" wrote:
> On 29/07/2024 15:17, Ofir Bitton wrote:
>>>
Add a basic test for exercising modifying the entities scheduler list at
runtime.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/tests/tests_basic.c | 69 ++-
1 file changed, 68 insert
There has repeatedly been quite a bit of apprehension when any change to the DRM
scheduler is proposed, with two main reasons being code base is considered
fragile, not well understood and not very well documented, and secondly the lack
of systematic testing outside the vendor specific tests suites
Implement a mock scheduler backend and add some basic test to exercise the
core scheduler code paths.
Mock backend (kind of like a very simple mock GPU) can either process jobs
by tests manually advancing the "timeline" job at a time, or alternatively
jobs can be configured with a time duration in
Add a very simple timeout test which submits a single job and verifies
that the timeout handling will run if the backend failed to complete the
job in time.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
.../gpu/drm/scheduler/
On Tue, 11 Mar 2025 10:14:44 +0100
AngeloGioacchino Del Regno
wrote:
> Il 11/03/25 09:05, Boris Brezillon ha scritto:
> > On Mon, 10 Mar 2025 16:59:19 -0300
> > Ariel D'Alessandro wrote:
> >
> >> Currently, Panfrost only supports MMU configuration in "LEGACY" (as
> >> Bifrost calls it) mode,
From: Shixiong Ou
fbcon_init_device() doesn't need to return a value.
Signed-off-by: Shixiong Ou
---
drivers/video/fbdev/core/fbcon.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/video/fbdev/core/fbcon.c b/drivers/video/fbdev/core/fbcon.c
index 51c3e8a5a092..c
From: Shixiong Ou
Use device_add_group() to simplify creation and removal.
Signed-off-by: Shixiong Ou
---
drivers/video/fbdev/core/fbcon.c | 48 +++-
1 file changed, 22 insertions(+), 26 deletions(-)
diff --git a/drivers/video/fbdev/core/fbcon.c b/drivers/video/fbd
On 3/4/2025 3:58 PM, Nemesa Garg wrote:
Expose the drm crtc sharpness property
which will ultimately enable the sharpness.
The drm crtc property is sharpness strength.
So lets have the subject and commit message in line with that.
Regards,
Ankit
Signed-off-by: Nemesa Garg
---
driver
On Mon, Mar 10, 2025 at 01:30:09PM +, Ashley Smith wrote:
> The timeout logic provided by drm_sched leads to races when we try
> to suspend it while the drm_sched workqueue queues more jobs. Let's
> overhaul the timeout handling in panthor to have our own delayed work
> that's resumed/suspended
On 3/4/2025 3:58 PM, Nemesa Garg wrote:
Add a check for enabling/disabling the casf
and enable the sharpness bit. Also load the
filter lut value which is needed one time.
Signed-off-by: Nemesa Garg
---
drivers/gpu/drm/i915/display/intel_casf.c| 18 +++
drivers/gpu/drm/i915/disp
Am 11.03.25 um 10:23 schrieb Tvrtko Ursulin:
> Move some options out into a new debug specific kconfig file in order to
> make things a bit cleaner.
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Christian König
> Cc: Danilo Krummrich
> Cc: Matthew Brost
> Cc: Philipp Stanner
I only skimmed over the
On 05/03/2025 14:35, Thomas Zimmermann wrote:
Add register constants for VGACRAA and use them when detecting the
size of the VGA memory. Aligns the code with the programming manual.
Thanks, it looks good to me.
Reviewed-by: Jocelyn Falempe
Signed-off-by: Thomas Zimmermann
---
drivers/g
On 05/03/2025 17:30, Thomas Zimmermann wrote:
Ast's AST_VIDMEM_SIZE_ constants enumerate supported video-memory
sizes from 8 MiB to 128 MiB. Replace them with Linux' SZ_ constants
of the same value. When expanded, the literal values remain the same.
The size constant for 128 MiB is unused and th
On 11/03/2025 11:33, Matt Coster wrote:
>>> The currently supported GPU (AXE-1-16M) only requires a single power
>>> domain. Subsequent patches will add support for BXS-4-64 MC1, which has
>>> two power domains. Add infrastructure now to allow for this.
>>>
>>> Also allow the dma-coherent property
On Sat, Mar 08, 2025 at 03:42:21AM +0200, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov
>
> Describe MIPI DSI PHY present on Qualcomm SAR2130P platform.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 1 +
> 1 file changed, 1 inse
Currently only MIPS firmware processors use ELF-formatted firmware. When
adding support for RISC-V firmware processors, it will be useful to have
ELF handling functions ready to go.
Signed-off-by: Matt Coster
---
Changes in v3:
- None
- Link to v2:
https://lore.kernel.org/r/20241118-sets-bxs-4-6
Add additional information to each VM so they can report up to the first
50 seen pagefaults. Only failed pagefaults are saved this way, as
successful pagefaults should recover and not need to be reported to
userspace.
v2:
- Free vm after use (Shuicheng)
- Compress pf copy logic (Shuicheng)
- Upda
This macro guard "__cplusplus" is unnecessary and should not be there.
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/sspl/dc_spl.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/sspl/dc_spl.h
b/drivers/gpu/drm/amd/display/dc/sspl/dc_spl.h
inde
On Fri, Mar 07, 2025 at 07:55:53AM +0200, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov
>
> The MSM DisplayPort driver implements several HDMI codec functions
> in the driver, e.g. it manually manages HDMI codec device registration,
> returning ELD and plugged_cb support. In order to reduce co
On Mon, Mar 10, 2025 at 01:01:25PM +, Lin, Wayne wrote:
> [Public]
>
> > -Original Message-
> > From: Imre Deak
> > Sent: Monday, March 10, 2025 7:00 PM
> > To: Lin, Wayne
> > Cc: intel-...@lists.freedesktop.org; intel...@lists.freedesktop.org; dri-
> > de...@lists.freedesktop.org; L
Add some basic tests for exercising entity priority handling.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/tests/tests_basic.c | 95 ++-
1 file changed, 94 insertions(+), 1 deletion(
Add support for userspace to request a list of observed failed
pagefaults from a specified VM.
v2:
- Only allow querying of failed pagefaults (Matt Brost)
v3:
- Remove unnecessary size parameter from helper function, as it
is a property of the arguments. (jcavitt)
- Remove unnecessary copy_from
[Adding Ben since we are currently in the middle of a discussion regarding
exactly that problem]
Just for my understanding before I deep dive into the code: This uses a
separate dmem cgroup and does not account against memcg, don't it?
Thanks,
Christian.
Am 10.03.25 um 13:06 schrieb Maxime Rip
On Mon, 2025-03-10 at 09:55 +, Tvrtko Ursulin wrote:
>
> On 07/03/2025 18:06, Philipp Stanner wrote:
> > On Fri, 2025-03-07 at 16:59 +, Tvrtko Ursulin wrote:
> > >
> > > On 07/03/2025 13:41, Philipp Stanner wrote:
> > > > Hi,
> > > >
> > > > You forgot to put folks in CC as recipents for
On Fri, 7 Mar 2025 15:50:41 +0100
Louis Chauvet wrote:
> Le 07/03/2025 à 11:20, Maxime Ripard a écrit :
> > On Wed, Feb 19, 2025 at 02:35:14PM +0100, Louis Chauvet wrote:
> >>
> >>
> >> Le 19/02/2025 à 11:15, Maxime Ripard a écrit :
> >>> On Wed, Feb 05, 2025 at 04:32:07PM +0100, Louis Chauve
On Thu, Mar 06, 2025 at 09:56:38PM +0900, FUJITA Tomonori wrote:
> On Tue, 4 Mar 2025 18:34:52 +0100
> Danilo Krummrich wrote:
>
> > +Delay / Sleep abstractions
> > +--
> > +
> > +Rust abstractions for the kernel's delay() and sleep() functions.
> > +
> > +There is some o
On 05/02/25 19:17, Vignesh Raman wrote:
Update drm/ci maintainer entries:
* Add myself as drm/ci maintainer.
* Update Helen's email address.
Signed-off-by: Vignesh Raman
---
MAINTAINERS | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index
On 2025-02-25 06:19, Louis Chauvet wrote:
>
>
> Le 20/12/2024 à 05:33, Alex Hung a écrit :
>> From: Harry Wentland
>>
>> Two tests are added to VKMS LUT handling:
>> - linear
>> - inv_srgb
>>
>> Reviewed-by: Louis Chauvet
>> Signed-off-by: Alex Hung
>> Signed-off-by: Harry Wentland
>> ---
Hi Krzysztof,
On 3/10/25 14:34, Krzysztof Kozlowski wrote:
On 10/03/2025 14:15, Maíra Canal wrote:
Hi Krzysztof,
On 3/10/25 09:55, Krzysztof Kozlowski wrote:
On 10/03/2025 12:57, Maíra Canal wrote:
Signed-off-by: Maíra Canal
---
.../devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 60
Add a basic test for checking whether scheduler respects the configured
credit limit.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/tests/tests_basic.c | 60 ++-
1 file changed, 59 in
On Mon, 10 Mar 2025 22:30:36 +1300
"Ryan Walklin" wrote:
Hi Ryan,
> On Tue, 25 Feb 2025, at 6:56 AM, Andre Przywara wrote:
>
> Apologies Andre, I came to review your comments on the TCON series and
> realised I had missed responding to this comment before sending v8.
No worries about that!
On 3/11/25 5:30 PM, Maxime Ripard wrote:
> On Tue, Mar 11, 2025 at 12:57:34PM +0200, Cristian Ciocaltea wrote:
>> Provide the necessary constraints verification in
>> sink_supports_format_bpc() in order to support handling of YUV420
>> output format.
>>
>> Signed-off-by: Cristian Ciocaltea
>> ---
From: Baihan Li
Add dp serdes cfg in link training process, and related adapting
and modificating. Change some init values about training, because we want
completely to negotiation process, so we start with the maximum rate and
the electrical characteristic level is 0. Because serdes default cfgs
On Mon, Mar 10, 2025 at 06:27:53PM -0300, André Almeida wrote:
> Em 01/03/2025 02:53, Raag Jadav escreveu:
> > On Fri, Feb 28, 2025 at 06:54:12PM -0300, André Almeida wrote:
> > > Hi Raag,
> > >
> > > On 2/28/25 11:20, Raag Jadav wrote:
> > > > Cc: Lucas
> > > >
> > > > On Fri, Feb 28, 2025 at 09
Unlike AXE-1-16M, BXS-4-64 uses two power domains.
Like the existing AXE-1-16M integration, BXS-4-64 uses the single clock
integration in the TI k3-j721s2.
Signed-off-by: Matt Coster
---
Changes in v3:
- Include adding the second power domain so it's in context
- Remove unnecessary example
- Lin
On Fri, Mar 07, 2025 at 12:07:45AM +0900, Vincent Mailhol wrote:
> On 06/03/2025 at 22:05, Andy Shevchenko wrote:
> > On Thu, Mar 06, 2025 at 08:29:52PM +0900, Vincent Mailhol via B4 Relay
> > wrote:
> >> From: Vincent Mailhol
...
> >> -/*
> >> - * BUILD_BUG_ON_ZERO is not available in h files
On 25-03-10 22:05:52, Aleksandrs Vinarskis wrote:
> DisplayPort requires per-segment link training when LTTPR are switched
> to non-transparent mode, starting with LTTPR closest to the source.
> Only when each segment is trained individually, source can link train
> to sink.
>
> Implement per-segm
Hibernate bricks the machine if a discrete GPU was disabled via
echo IGD > /sys/kernel/debug/vgaswitcheroo/switch
The freeze and thaw handler lacks checking the GPU power state,
as suspend and resume do.
This patch add the checks and fix this issue.
Signed-off-by: chr[]
---
I got an old MacBoo
Set this feature flag on all Mali Bifrost platforms as the MMU supports
AARCH64 4K page table format.
Signed-off-by: Ariel D'Alessandro
---
drivers/gpu/drm/panfrost/panfrost_features.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/panfrost/panfrost_features.h
b/drivers/
Hi Krzysztof,
On 3/10/25 06:49, Krzysztof Kozlowski wrote:
On Sat, Mar 08, 2025 at 11:33:43AM -0300, Maíra Canal wrote:
V3D 7.1 exposes a new register block, called V3D_SMS. As BCM2712 has a
Where is the comaptible for this new block? Or was it already documented
but with missing register?
On Mon, 10 Mar 2025 16:59:21 -0300
Ariel D'Alessandro wrote:
> Set this feature flag on all Mali Bifrost platforms as the MMU supports
> AARCH64 4K page table format.
>
> Signed-off-by: Ariel D'Alessandro
Reviewed-by: Boris Brezillon
> ---
> drivers/gpu/drm/panfrost/panfrost_features.h | 3
Hi Zsolt,
kernel test robot noticed the following build warnings:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.14-rc6 next-20250307]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documen
Hi Dave & Sima -
The second and likely final batch of i915 features towards v6.15.
BR,
Jani.
drm-intel-next-2025-03-10:
drm/i915 feature pull #2 for v6.15:
Features and functionality:
- FBC dirty rectangle support for display version 30+ (Vinod)
- Update plane scalers via DSB based commits (
Hi,
On Mon, Mar 10, 2025 at 03:16:53PM +0100, Christian König wrote:
> [Adding Ben since we are currently in the middle of a discussion
> regarding exactly that problem]
>
> Just for my understanding before I deep dive into the code: This uses
> a separate dmem cgroup and does not account against
Add support for the POWERTIP PH128800T004-ZZA01 10.1" (1280x800)
LCD-TFT panel. Its panel description is very much like the POWERTIP
PH128800T006-ZHC01 configured below this one, only its timings are
different.
Signed-off-by: Antonin Godard
---
drivers/gpu/drm/panel/panel-simple.c | 29 +
Add POWERTIP PH128800T004-ZZA01 10.1" LCD-TFT LVDS panel compatible
string.
Signed-off-by: Antonin Godard
---
Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
The POWERTIP PH128800T004-ZZA01 panel is close to the POWERTIP
PH128800T006-ZHC01, with different timings. Add a binding and a panel
entry under panel-simple.c.
Signed-off-by: Antonin Godard
---
Antonin Godard (2):
dt-bindings: display: simple: Add POWERTIP PH128800T004-ZZA01 panel
dr
Hi
Am 07.03.25 um 14:32 schrieb Simona Vetter:
On Fri, Mar 07, 2025 at 09:03:58AM +0100, Thomas Zimmermann wrote:
Importing dma-bufs via PRIME requires a DMA-capable hardware device.
This is not the case for USB, where DMA is performed entirely by the
USB controller instead of the USB devices.
On Mon, Mar 10, 2025 at 7:14 AM Alyssa Rosenzweig wrote:
>
> This adds the UAPI for the Asahi driver targeting the GPU in the Apple
> M1 and M2 series systems on chip. The UAPI design is based on other
> modern Vulkan-capable drivers, including Xe and Panthor. Memory
> management is based on expli
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
buffer size. Align the pitch to a multiple of 64.
Signed-off-by: Thomas Zimmermann
Cc: Patrik Jakobsson
---
drivers/gpu/drm/gma500/gem.c | 21 ++---
1 file changed, 6 insertions(+), 15 deletions(-)
diff --git a
Dumb-buffer pitch and size is specified by width, height, bits-per-pixel
plus various hardware-specific alignments. The calculation of these
values is inconsistent and duplicated among drivers. The results for
formats with bpp < 8 are sometimes incorrect.
This series fixes this for most drivers. D
Applied. Thanks!
Alex
On Tue, Mar 11, 2025 at 7:23 AM Nikita Zhandarovich
wrote:
>
> On the off chance that command stream passed from userspace via
> ioctl() call to radeon_vce_cs_parse() is weirdly crafted and
> first command to execute is to encode (case 0x0301), the function
> in questi
On Tue, Mar 11, 2025 at 12:57:37PM +0200, Cristian Ciocaltea wrote:
> Introduce a few macros to facilitate setting custom (i.e. non-default)
> EDID data during connector initialization.
>
> This helps reducing boilerplate code while also drops some redundant
> calls to set_connector_edid().
>
> S
On Tue, Mar 11, 2025 at 05:54:43PM +0530, Ayushi Makhija wrote:
> When device enters the suspend state, it prevents
> HPD interrupts from occurring. To address this,
> add an additional PM runtime vote in hpd_enable().
> This vote is removed in hpd_disable().
Is it really enough to toggle the HPD
On Tue, Mar 11, 2025 at 12:57:38PM +0200, Cristian Ciocaltea wrote:
> Provide tests to verify that drm_atomic_helper_connector_hdmi_check()
> helper behaviour when using YUV420 output format is to always set the
> limited RGB quantization range to 'limited', no matter what the value of
> Broadcast
5.10-stable review patch. If anyone has any objections, please let me know.
--
From: Thomas Zimmermann
commit 53036937a101b5faeaf98e7438555fa854a1a844 upstream.
Including m68k's in vga.h on nommu platforms results
in conflicting defines with io_no.h for various I/O macros fro
On Tue, Mar 11, 2025 at 12:57:34PM +0200, Cristian Ciocaltea wrote:
> Provide the necessary constraints verification in
> sink_supports_format_bpc() in order to support handling of YUV420
> output format.
>
> Signed-off-by: Cristian Ciocaltea
> ---
> drivers/gpu/drm/display/drm_hdmi_state_helper
On Tue, 11 Mar 2025 12:57:35 +0200, Cristian Ciocaltea wrote:
> Add the missing 'bpc' string to the debug message indicating the
> supported format identified within hdmi_try_format_bpc() helper.
>
> Signed-off-by: Cristian Ciocaltea
Reviewed-by: Maxime Ripard
Thanks!
Maxime
5.10-stable review patch. If anyone has any objections, please let me know.
--
From: Thomas Zimmermann
[ Upstream commit 666e1960464140cc4bc9203c203097e70b54c95a ]
The code for detecting and updating the connector status in
cdn_dp_pd_event_work() has a number of problems.
- I
On Tue, Mar 11, 2025 at 05:54:38PM +0530, Ayushi Makhija wrote:
> Document DSI controller and phy on SA8775P platform.
>
> Signed-off-by: Ayushi Makhija
> ---
> .../display/msm/qcom,sa8775p-mdss.yaml| 188 ++
> 1 file changed, 188 insertions(+)
>
> diff --git
> a/Docume
On Tue, Mar 11, 2025 at 08:59:45AM +0100, Maxime Ripard wrote:
> On Mon, Mar 10, 2025 at 10:14:52PM +0200, Dmitry Baryshkov wrote:
> > On Mon, Mar 10, 2025 at 03:46:33PM +0100, Maxime Ripard wrote:
> > > On Sun, Mar 09, 2025 at 10:13:56AM +0200, Dmitry Baryshkov wrote:
> > > > From: Dmitry Baryshko
On Tue, Mar 11, 2025 at 05:54:41PM +0530, Ayushi Makhija wrote:
> Add device tree nodes for the DSI0 and DSI1 controllers
> with their corresponding PHYs found on Qualcomm SA8775P SoC.
>
> Signed-off-by: Ayushi Makhija
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 186 +
On Tue, Mar 11, 2025 at 09:07:10AM +0100, Maxime Ripard wrote:
> On Mon, Mar 10, 2025 at 10:18:04PM +0200, Dmitry Baryshkov wrote:
> > On Mon, Mar 10, 2025 at 03:51:53PM +0100, Maxime Ripard wrote:
> > > On Sun, Mar 09, 2025 at 10:13:58AM +0200, Dmitry Baryshkov wrote:
> > > > From: Dmitry Baryshko
Currently, Panfrost only supports MMU configuration in "LEGACY" (as
Bifrost calls it) mode, a (modified) version of LPAE "Large Physical
Address Extension", which in Linux we've called "mali_lpae".
This commit adds support for conditionally enabling AARCH64_4K page
table format. To achieve that, a
On 11/03/2025 07:50, Krzysztof Kozlowski wrote:
> On Mon, Mar 10, 2025 at 01:10:25PM +, Matt Coster wrote:
>> The first compatible strings added for the AXE-1-16M are not sufficient to
>> accurately describe all the IMG Rogue GPUs. The current "img,img-axe"
>> string refers to the entire family
Am 10.03.25 um 13:27 schrieb Tvrtko Ursulin:
>
> On 10/03/2025 12:11, Philipp Stanner wrote:
>> On Mon, 2025-03-10 at 08:44 +0100, Christian König wrote:
>>> This reverts commit 44d2f310f008613c1dbe5e234c2cf2be90cbbfab.
>>
>> OK, your arguments with fence ordering are strong. Please update the
>> c
On 2025-03-10 12:06 pm, Maxime Ripard wrote:
Consumers of the direct DMA API will have to know which region their
device allocate from in order for them to charge the memory allocation
in the right one.
This doesn't seem to make much sense - dma-direct is not an allocator
itself, it just provi
Picked from:
https://patchwork.kernel.org/project/linux-rockchip/list/?series=936932
These patchs have been tested with a 1536x2048p60 eDP panel on
RK3588S EVB1 board, and HDMI 1080P/4K display also has been verified
on RK3588 EVB1 board. Furthermore, the eDP display has been rechecked
on RK3399 s
On Mon, 10 Mar 2025 12:34:30 -0300
Ariel D'Alessandro wrote:
> Hi Boris,
>
> On 2/27/25 11:55 AM, Boris Brezillon wrote:
> > On Wed, 26 Feb 2025 15:30:42 -0300
> > Ariel D'Alessandro wrote:
> >
> >> @@ -642,8 +713,15 @@ struct panfrost_mmu *panfrost_mmu_ctx_create(struct
> >> panfrost_devic
On 10/03/2025 11:11, Philipp Stanner wrote:
On Mon, 2025-03-10 at 09:55 +, Tvrtko Ursulin wrote:
On 07/03/2025 18:06, Philipp Stanner wrote:
On Fri, 2025-03-07 at 16:59 +, Tvrtko Ursulin wrote:
On 07/03/2025 13:41, Philipp Stanner wrote:
Hi,
You forgot to put folks in CC as recip
When a character array without a terminating NUL character has a static
initializer, GCC 15's -Wunterminated-string-initialization will only
warn if the array lacks the "nonstring" attribute[1]. Mark the arrays
with __nonstring to and correctly identify the char array as "not a C
string" and thereb
In order to support any device using the GEM support, let's charge any
GEM DMA allocation into the dmem cgroup.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/drm_gem.c| 5 +
drivers/gpu/drm/drm_gem_dma_helper.c | 6 ++
include/drm/drm_device.h | 1 +
include/dr
Hello,
On 09/03/2025 19:36:06+, li...@treblig.org wrote:
> From: "Dr. David Alan Gilbert"
>
> The pcf50633 was used as part of the OpenMoko devices but
> the support for its main chip was recently removed in:
> commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support")
>
> See https://lor
On 10.03.2025 18:18, Jonathan Cavitt wrote:
> Add additional information to each VM so they can report up to the first
> 50 seen pagefaults. Only failed pagefaults are saved this way, as
> successful pagefaults should recover and not need to be reported to
> userspace.
>
> v2:
> - Free vm afte
Add some basic tests for exercising entity priority handling.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/tests/tests_basic.c | 95 ++-
1 file changed, 94 insertions(+), 1 deletion(
Move away from using deprecated API and use _multi
variants if available. Use mipi_dsi_msleep()
and mipi_dsi_usleep_range() instead of msleep()
and usleep_range() respectively.
Used Coccinelle to find the multiple occurences.
SmPl patch:
@rule@
identifier dsi_var;
identifier r;
identifier func;
ty
Am 10.03.25 um 10:50 schrieb Thomas Zimmermann:
> Hi
>
> Am 07.03.25 um 14:32 schrieb Simona Vetter:
>> On Fri, Mar 07, 2025 at 09:03:58AM +0100, Thomas Zimmermann wrote:
>>> Importing dma-bufs via PRIME requires a DMA-capable hardware device.
>>> This is not the case for USB, where DMA is performe
On 3/4/2025 3:58 PM, Nemesa Garg wrote:
Add new registers and related bits. Compute the strength
value and tap value based on display mode.
Lets have some more details about what is strength and win size and why
is this required for sharpness.
In this what is missing is the readback part whi
101 - 200 of 336 matches
Mail list logo
