Hi all,
On Mon, 9 Sep 2024 19:59:39 +1000 Stephen Rothwell
wrote:
>
> After merging the kspp tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> drivers/gpu/drm/xe/xe_gt_idle.c:56:27: error: redefinition of 'str_up_down'
>56 | static inline const char *str_up_down(b
On 18.09.2024 5:52 PM, Jeffrey Hugo wrote:
> The Sahara protocol has a crashdump functionality. In the hello
> exchange, the device can advertise it has a memory dump available for
> the host to collect. Instead of the device making requests of the host,
> the host requests data from the device whi
(CC'ing Hans de Goede who recently wrote a blog post
(https://hansdegoede.dreamwidth.org/28552.html ) which sounds like the
same issue I'm seeing)
On Sun, 15 Sept 2024 at 21:30, Sitsofe Wheeler wrote:
>
> Hello,
>
> (Apologies if I have CC'd the wrong people/places - I just went by
> what get_mai
Hi Dave, Simona,
Fixes for 6.12.
The following changes since commit ae2c6d8b3b88c176dff92028941a4023f1b4cb91:
Merge tag 'drm-xe-next-fixes-2024-09-12' of
https://gitlab.freedesktop.org/drm/xe/kernel into drm-next (2024-09-17 14:53:34
+1000)
are available in the Git repository at:
https:/
On Tue, 03 Sep 2024 11:22:36 -0400, Detlev Casanova wrote:
> It is compatible with the other rockchip SoCs.
>
> Signed-off-by: Detlev Casanova
> Acked-by: Krzysztof Kozlowski
> Acked-by: Guenter Roeck
> ---
> Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml | 1 +
> 1 file changed
On Wed, 18 Sep 2024 02:08:42 +0530, Akhil P Oommen wrote:
> From: Puranam V G Tejaswi
>
> Document Adreno 663 GMU in the dt-binding specification.
>
> Signed-off-by: Puranam V G Tejaswi
> Signed-off-by: Akhil P Oommen
> ---
> Documentation/devicetree/bindings/display/msm/gmu.yaml | 1 +
> 1
On Tue, Sep 17, 2024 at 9:39 PM Akhil P Oommen wrote:
>
> From: Puranam V G Tejaswi
>
> Add support for Adreno 663 found on sa8775p based platforms.
>
> Signed-off-by: Puranam V G Tejaswi
> Signed-off-by: Akhil P Oommen
> ---
> drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 19 ++
Hi Mario,
kernel test robot noticed the following build errors:
[auto build test ERROR on amd-pstate/linux-next]
[also build test ERROR on amd-pstate/bleeding-edge linus/master v6.11]
[cannot apply to next-20240918]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when
On Tue, Sep 17, 2024 at 10:49:07AM +0300, Jani Nikula wrote:
> On Tue, 17 Sep 2024, Raag Jadav wrote:
> > Now that we have device wedged event in place, add wedge_recovery sysfs
> > attribute which will expose recovery methods supported by the DRM device.
> > This is useful for userspace consumers
Dear Sascha,
Thank you for your reply.
On 2024/9/18 下午 06:58, Sascha Hauer wrote:
Hi,
The driver has a few minor whitespace issues, please run through
checkpatch.pl to catch them.
I will fix it.
Some more things inline.
On Wed, Sep 18, 2024 at 09:03:08AM +, Hui-Ping Chen wrote:
Nu
From: Kenneth Feng
[ Upstream commit 7a0982523cf3ff00f35b210fc3405c528a2ce7af ]
fix the pp_dpm_pcie issue on smu v14.0.2/3 as below:
0: 2.5GT/s, x4 250Mhz
1: 8.0GT/s, x4 616Mhz *
2: 8.0GT/s, x4 1143Mhz *
the middle level can be removed since it is always skipped on
smu v14.0.2/3
Signed-off-by:
To ensure code clarity and prevent potential errors, it's advisable
to employ the ';' as a statement separator, except when ',' are
intentionally used for specific purposes.
Signed-off-by: Shen Lichuan
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 del
Hi,
On Tue, 17 Sept 2024 at 22:43, Alex Deucher wrote:
>
> Do you have secureboot enabled? If so, perhaps this is relevant:
> https://bugzilla.kernel.org/show_bug.cgi?id=219229
The system is an old HP MicroServer N36L with no UEFI support so
there's no secureboot.
--
Sitsofe
Am 18.09.24 um 16:41 schrieb Jani Nikula:
On Wed, 18 Sep 2024, "Christian König" wrote:
Tearing down the scheduler with jobs still on the pending list can
lead to use after free issues. Add a warning if drivers try to
destroy a scheduler which still has work pushed to the HW.
When there are st
Eek - sorry, I had already pushed this since it had been reviewed a while ago
and I just forgot to push it afterwards. This being said though - I'm a little
confused here myself. This is correct - drm_client_register was getting called
too early, I wonder if I ran into this before I had moved aroun
Add dt-bindings for the Nuvoton MA35 SoC NAND Controller.
Signed-off-by: Hui-Ping Chen
Reviewed-by: Krzysztof Kozlowski
---
.../bindings/mtd/nuvoton,ma35d1-nand.yaml | 93 +++
1 file changed, 93 insertions(+)
create mode 100644
Documentation/devicetree/bindings/mtd/nuvoton
Nuvoton MA35 SoCs NAND Flash Interface Controller
supports 2kiB, 4kiB and 8kiB page size, and up to
8-bit, 12-bit, and 24-bit hardware ECC calculation
circuit to protect data.
Signed-off-by: Hui-Ping Chen
---
drivers/mtd/nand/raw/Kconfig | 8 +
drivers/mtd/nand/raw/Makefile
This patch series adds the mtd nand driver for the nuvoton ma35 ARMv8 SoC.
It includes DT binding documentation and the ma35 mtd nand driver.
v4:
- Update nuvoton,ma35d1-nand.yaml
- rename 'nuvoton,ma35d1-nand' to 'nuvoton,ma35d1-nand-controller'.
- Update ma35d1 mtd nand driver
- Rewr
Le 16/09/24 - 23:46, YJ Lin a écrit :
> Hi Sean and the vkms maintainers:
>
> I’m Leo, currently one of the mentees of the Linux Kernel Bug Fixing
> Program 2024 Summer Unpaid[1]. I saw an item on the DRM TODO list
> regarding "Convert logging to drm_* functions with drm_device
> parameter"[2]. It
Le 17/09/24 - 18:02, José Expósito a écrit :
> Hi Louis,
>
> Thanks for this series!
>
> The first 2 patches look good to me. It could make sense to move the
> alloc + init pair of calls to a function (vkms_connector_init() and
> vkms_encoder_init() for example), but we can always move it in the
On Mon, Sep 16, 2024 at 04:49:17PM +0300, Alexander Usyskin wrote:
> Add auxiliary driver for intel discrete graphics
> on-die spi device.
This doesn't actually do anything AFAICT? It doesn't register with any
subsystem or anything. Please don't submit empty boilerplate like this,
submit a driv
On Mon, Sep 16, 2024 at 04:49:18PM +0300, Alexander Usyskin wrote:
> In intel-dg spi, there is no access to the spi controller,
> the information is extracted from the descriptor region.
Which information? I can't tell what this patch is supposed to do; as
with the first patch this shouldn't be
On Mon, Sep 16, 2024 at 04:49:20PM +0300, Alexander Usyskin wrote:
> From: Tomas Winkler
>
> Register the on-die spi device with the mtd subsystem.
> Refcount spi object on _get and _put mtd callbacks.
This is a MTD driver, it should be in drivers/mtd.
> +static int intel_dg_spi_erase(struct m
Sima requested that in a discussion, just copy&paste my explanation from
the mail.
Signed-off-by: Christian König
---
drivers/gpu/drm/scheduler/sched_entity.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_entity.c
b/driver
Le 17/09/24 - 18:02, José Expósito a écrit :
> Hi Louis,
>
> > CRTC initialization call drm_mode_crtc_set_gamma_size without the proper
> > checks, introduce this check to avoid issues.
> >
> > Signed-off-by: Louis Chauvet
>
> Reviewed-by: José Expósito
>
> > ---
> > drivers/gpu/drm/vkms/vkm
Tearing down the scheduler with jobs still on the pending list can
lead to use after free issues. Add a warning if drivers try to
destroy a scheduler which still has work pushed to the HW.
When there are still entities with jobs the situation is even worse
since the dma_fences for those jobs can n
On Wed, 18 Sep 2024, "Christian König" wrote:
> Tearing down the scheduler with jobs still on the pending list can
> lead to use after free issues. Add a warning if drivers try to
> destroy a scheduler which still has work pushed to the HW.
>
> When there are still entities with jobs the situation
On Wed, Sep 18, 2024 at 12:46 AM Neil Armstrong
wrote:
>
> Hi,
>
> On 17/09/2024 13:14, Antonino Maniscalco wrote:
> > This series implements preemption for A7XX targets, which allows the GPU to
> > switch to an higher priority ring when work is pushed to it, reducing
> > latency
> > for high pri
The Sahara protocol has a crashdump functionality. In the hello
exchange, the device can advertise it has a memory dump available for
the host to collect. Instead of the device making requests of the host,
the host requests data from the device which can be later analyzed.
Implement this functiona
On Wed, 18 Sep 2024, Markus Elfring wrote:
> From: Markus Elfring
> Date: Wed, 18 Sep 2024 09:43:07 +0200
>
> Assign return values from copy_to_user() calls to additional local variables
> so that four kfree() calls and return statements can be omitted accordingly.
>
> This issue was transformed
Le 17/09/24 - 18:02, José Expósito a écrit :
> Hi Louis,
>
> > VKMS currently supports only one CRTC, so it make no sense to have this
> > index configurable. To avoid issues, replace this hardcoded index by
> > drm_crtc_mask when applicable.
> >
> > There is no need to manually set a crtc mask o
On Mon, Sep 16, 2024 at 04:49:16PM +0300, Alexander Usyskin wrote:
> Add driver for access to Intel discrete graphics card
> internal SPI device.
> Expose device on auxiliary bus by i915 and Xe drivers and
> provide spi driver to register this device with MTD framework.
As far as I can tell this d
Le 17/09/24 - 18:02, José Expósito a écrit :
> Hi Louis,
>
> Thanks for making this change even more atomic.
>
> > To simplify the memory managment this series replace all manual drm
> > object managment by drm-managed one. This way the VKMS code don't have to
> > manage it directly and the DRM
On Fri, Sep 13, 2024 at 8:51 PM Rob Clark wrote:
>
> From: Rob Clark
>
> The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle, but on some
> devices (x1-85, possibly others), it seems to pass that barrier while
> there are still things in the event completion FIFO waiting to be
> written back to
Keep track of the csg priority in panthor_group when the group is
scheduled/active.
This is useful to know the actual priority in use in the firmware
group slot.
Signed-off-by: Mary Guillemard
---
drivers/gpu/drm/panthor/panthor_sched.c | 18 +++---
1 file changed, 15 insertions(+),
This adds a new debugfs file named "sched_groups" allowing a user to
query information about all userspace clients scheduler groups.
As we uses drm_device.filelist to achieve it, we also expose the
client_id with the task information to differentiate one client
from another inside the same task.
This patch series adds a new debugfs file named "sched_groups" allowing
a user to query information about all userspace clients scheduler groups.
This patch series assumes that [1] and [2] are applied.
[1]https://lore.kernel.org/all/20240903144955.144278-2-mary.guillem...@collabora.com/
[2]https:
On Wed, 18 Sep 2024, Shen Lichuan wrote:
> To ensure code clarity and prevent potential errors, it's advisable
> to employ the ';' as a statement separator, except when ',' are
> intentionally used for specific purposes.
>
> Signed-off-by: Shen Lichuan
Already fixed by commit 7cd1049a33ca ("drm/
Christian,
Ping?
On Wed, 2024-08-14 at 10:37 +0200, Thomas Hellström wrote:
> Christian,
>
> Ack to merge this through drm-misc-next, or do you want to pick it up
> for dma-buf?
>
> Thanks,
> Thomas
>
>
> On Wed, 2024-08-14 at 09:10 +0200, Daniel Vetter wrote:
> > On Fri, May 26, 2023 at 01:
On 8/30/2024 3:03 PM, Dmitry Baryshkov wrote:
> On Thu, Aug 22, 2024 at 04:29:33PM GMT, Ekansh Gupta wrote:
>> If multiple dma handles are passed with same fd over a remote call
>> the kernel driver takes a reference and expects that put for the
>> map will be called as many times to free the ma
On 9/18/24 9:46 AM, Neil Armstrong wrote:
Hi,
On 17/09/2024 13:14, Antonino Maniscalco wrote:
This series implements preemption for A7XX targets, which allows the
GPU to
switch to an higher priority ring when work is pushed to it, reducing
latency
for high priority submissions.
This series e
Am 16.09.24 um 16:51 schrieb Thomas Hellström:
Make the interface more symmetric by providing and using a
ttm_resource_cursor_init().
v10:
- Fix a stray newline (Matthew Brost)
- Update kerneldoc (Matthew Brost)
Signed-off-by: Thomas Hellström
Reviewed-by: Matthew Brost
Reviewed-by: Christi
The fence_value_str and timeline_value_str callbacks were just an
unnecessary abstraction in the SW sync implementation.
The only caller of those callbacks already knew that the fence in
questions is a timeline_fence. So print the values directly instead
of using a redirection.
Additional to that
As discussed with Sima we want dma_fence objects to be able to outlive
their backend ops. Because of this timeline and driver name shouldn't
be queried any more after the fence has signaled.
Add wrappers around the two queries and only return an empty string
if the fence was already signaled. Ther
Hi Iago,
On 9/4/24 05:24, Iago Toral wrote:
Hi Maira,
El jue, 29-08-2024 a las 10:05 -0300, Maíra Canal escribió:
We must first flush the MMU cache and then, flush the TLB, not the
other
way around. Currently, we can see a race condition between the MMU
cache
and the TLB when running multiple
Hi,
The driver has a few minor whitespace issues, please run through
checkpatch.pl to catch them.
Some more things inline.
On Wed, Sep 18, 2024 at 09:03:08AM +, Hui-Ping Chen wrote:
> Nuvoton MA35 SoCs NAND Flash Interface Controller
> supports 2kiB, 4kiB and 8kiB page size, and up to
> 8-bi
пн, 16 сент. 2024 г. в 12:10, Krzysztof Kozlowski :
>
> On Fri, Sep 13, 2024 at 06:07:51PM +0300, Dzmitry Sankouski wrote:
> > Remove `enum max77693_irq_source` declaration because unused.
> >
> > Signed-off-by: Dzmitry Sankouski
> > ---
> > include/linux/mfd/max77693-private.h | 11 ---
>
Sima, Christian
I've updated the shrinker series now with a guarded for_each macro
instead:
https://patchwork.freedesktop.org/patch/614514/?series=131815&rev=9
(Note I forgot to remove the export of the previous LRU walker).
so the midlayer argument is now not an issue anymore. The cleanup.h
g
This patch series adds support for the Microchip's MIPI DSI Controller
wrapper driver that uses the Synopsys DesignWare MIPI DSI host controller
bridge for SAM9X75 SoC series.
Changelogs are available in respective patches.
Manikandan Muralidharan (4):
dt-bindings: display: bridge: add sam9x75-
Add the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge.
Signed-off-by: Manikandan Muralidharan
---
changes in v4:
- Fixed issues reported by kernel test robot
- replaced syscon_regmap_lookup_by_phandle with
syscon_regmap_lookup_by_compa
Add the 'sam9x75-mipi-dsi' compatible binding, which describes the
Microchip's specific wrapper for the Synopsys DesignWare MIPI DSI HOST
Controller for the sam9x75 series System-on-Chip (SoC) devices.
Signed-off-by: Manikandan Muralidharan
---
changes in v4:
- Removed 'microchip,sfr' phandle pro
Enable the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge.
Signed-off-by: Manikandan Muralidharan
---
arch/arm/configs/at91_dt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/at91_dt_defconfig
b/arch/arm
Add the Microchip's DSI controller wrapper driver that uses the
Synopsys DesignWare MIPI DSI host controller bridge for the SAM9X7
SoC series to the MAINTAINERS entry.
Signed-off-by: Manikandan Muralidharan
---
changes in v3:
- Drop T: section
---
MAINTAINERS | 7 +++
1 file changed, 7 inser
From: Philip Yang
commit 8c45b31909b730f9c7b146588e038f9c6553394d upstream.
If the SVM range has no GPU access nor access-in-place attribute,
validate and map to GPU should skip the range.
Add NULL pointer check if find_first_bit(ctx->bitmap, MAX_GPU_INSTANCE)
returns MAX_GPU_INSTANCE as gpuidx
Il 17/09/24 18:44, Jason-JH.Lin ha scritto:
OVL_CON_CLRFMT_MAN is a configuration for extending color format
settings of DISP_REG_OVL_CON(n).
It will change some of the original color format settings.
Take the settings of (3 << 12) for example.
- If OVL_CON_CLRFMT_MAN = 0 means OVL_CON_CLRFMT_RG
On Wed, Sep 18, 2024 at 03:00:45AM +, manikanda...@microchip.com wrote:
> On 17/09/24 6:08 pm, Conor Dooley wrote:
> > On Tue, Sep 17, 2024 at 03:16:53AM +,manikanda...@microchip.com wrote:
> >> Hi Conor,
> >>
> >> On 14/08/24 7:29 pm, Conor Dooley wrote:
> >>> On Wed, Aug 14, 2024 at 04:2
The pull request you sent on Tue, 17 Sep 2024 17:45:40 +0200:
> http://git.kernel.org/pub/scm/linux/kernel/git/deller/linux-fbdev.git
> tags/fbdev-for-6.12-rc1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/f4960b002ce81f8e51245bfad0fb7eb4103962ff
Thank you!
--
Dee
Acked-by: Alex Deucher
Applied.
Thanks!
On Tue, Sep 17, 2024 at 5:58 PM Rohit Chavan wrote:
>
> This patch addresses warnings produced by the checkpatch script
> related to unnecessary casts that could potentially hide bugs.
>
> The specific warnings are as follows:
> - Warning at drivers/gpu/
On 16/09/2024 15:58, Christoph Hellwig wrote:
On Mon, Sep 16, 2024 at 03:33:20PM +0200, Thierry Reding wrote:
From: Thierry Reding
In order to store device DMA parameters, the DMA framework depends on
the device's dma_parms field to point at a valid memory location. Add
backing storage for t
On Tue, 17 Sep 2024, Nemesa Garg wrote:
> The sharpness property requires the use of one of the scaler
> so need to set the sharpness scaler coefficient values.
> These values are based on experiments and vary for different
> tap value/win size. These values are normalized by taking the
> sum of a
On Tue, 17 Sep 2024, Nemesa Garg wrote:
> Add new registers and related bits. Compute the strength
> value and tap value based on display mode.
>
> v2: Replace i915/dev_priv with display[Jani]
This needs to be done harder. ;)
>
> Signed-off-by: Nemesa Garg
> ---
> drivers/gpu/drm/i915/display/
On Tue, 17 Sep 2024, Nemesa Garg wrote:
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 84b05b57ad52..41c6c56d83d6 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2396,6 +2396,23 @@
> _ID(id
Matthew Brost writes:
> On Wed, Sep 11, 2024 at 02:53:31PM +1000, Alistair Popple wrote:
>>
>> Matthew Brost writes:
>>
>> I haven't seen the same in the NVIDIA UVM driver (out-of-tree, I know)
>
> Still a driver.
Indeed, and I'm happy to answer any questions about our implementation.
>> b
On Tue, 17 Sep 2024, Nemesa Garg wrote:
> As only second scaler can be used for sharpness check if it
> is available and also check if panel fitting is also not enabled,
> then set the sharpness. Panel fitting will have the preference
> over sharpness property.
>
> v2: Add the panel fitting check
From: Markus Elfring
Date: Wed, 18 Sep 2024 09:43:07 +0200
Assign return values from copy_to_user() calls to additional local variables
so that four kfree() calls and return statements can be omitted accordingly.
This issue was transformed by using the Coccinelle software.
Signed-off-by: Markus
On 18/09/2024 05:08, manikanda...@microchip.com wrote:
> Hi Krzysztof,
>
> On 17/09/24 4:07 pm, Krzysztof Kozlowski wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
>> content is safe
>>
>> On 17/09/2024 11:53, Manikandan Muralidharan wrote:
>>> Add Microchip A
Fix following coccicheck warning:
./drivers/net/ethernet/sfc/tc.c:1584:29-80: WARNING avoid newline at end
of message in NL_SET_ERR_MSG_MOD
Signed-off-by: Chen Ni
---
drivers/net/ethernet/sfc/tc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/sfc/tc.c b
>> Assign return values from copy_to_user() calls to additional local variables
>> so that four kfree() calls and return statements can be omitted accordingly.
…
>> +++ b/drivers/gpu/drm/xe/xe_query.c
>> @@ -220,13 +220,11 @@ static int query_engines(struct xe_device *xe,
>>
>> engines->num_en
GitHub Dependabot has issued the following alert:
"build(deps): bump requests from 2.31.0 to 2.32.2 in
/drivers/gpu/drm/ci/xfails.
When making requests through a Requests Session, if the first
request is made with verify=False to disable cert verification,
all subsequent requests to the same
GitHub Dependabot has issued the following alert:
"build(deps): bump idna from 3.4 to 3.7 in /drivers/gpu/drm/ci/xfails.
A specially crafted argument to the function could consume
significant resources. This may lead to a denial-of-service.
The function has been refined to reject such strings
GitHub Dependabot keeps bugging us about old, vulnerable Python packages.
Until we figure out a way to make it calm, we're stuck updating our
dependencies whenever it complains.
I guess it's a good thing in the long run, though, right?
Makes our CI a bit "more secure"...
Signed-off-by: WangYuli
GitHub Dependabot has issued the following alert:
"build(deps): bump certifi from 2023.7.22 to 2024.7.4 in
/drivers/gpu/drm/ci/xfails.
Certifi 2024.07.04 removes root certificates from "GLOBALTRUST"
from the root store. These are in the process of being removed from
Mozilla's trust store.
G
GitHub Dependabot has issued the following alert:
"build(deps): bump urllib3 from 2.0.7 to 2.2.2 in
/drivers/gpu/drm/ci/xfails.
When using urllib3's proxy support with, the header is only sent
to the configured proxy, as expected.
However, when sending HTTP requests without using urllib3's p
Sorry, somehow completely missed that. Feel free to push it to
drm-misc-next.
Christian.
Am 18.09.24 um 14:34 schrieb Thomas Hellström:
Christian,
Ping?
On Wed, 2024-08-14 at 10:37 +0200, Thomas Hellström wrote:
Christian,
Ack to merge this through drm-misc-next, or do you want to pick it
This is the successor of Melissa's v5 series that was posted [1] as well
as my series that was posted [2].
Melissa's patches are mostly unmodified from v5, but the series has been
rebase on the new 6.10 based amd-staging-drm-next.
As were both touching similar code for fetching the EDID, I've mer
From: Melissa Wen
Connectors have source physical address available in display
info. Use drm_dp_cec_attach() to use it instead of parsing the EDID
again.
Signed-off-by: Melissa Wen
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +++---
1 file change
From: Melissa Wen
We don't need to parse dc_edid to get the display name since it's
already set in drm_eld which in turn had it values updated when updating
connector with the opaque drm_edid.
Signed-off-by: Melissa Wen
Signed-off-by: Mario Limonciello
---
.../gpu/drm/amd/display/amdgpu_dm/am
From: Melissa Wen
Update connector caps with drm_edid data before parsing info for
freesync.
Signed-off-by: Melissa Wen
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/dr
From: Melissa Wen
We can parse edid caps from drm_edid and drm_eld and any calls of
dm_helpers_parse_edid_caps is made in a state that we have drm_edid set
to amdgpu connector.
Signed-off-by: Melissa Wen
Co-developed-by: Mario Limonciello
Signed-off-by: Mario Limonciello
---
.../gpu/drm/amd/
From: Melissa Wen
When updating connector under drm_edid infrastructure, many calculations
and validations are already done and become redundant inside AMD driver.
Remove those driver-specific code in favor of the DRM common code.
Signed-off-by: Melissa Wen
Co-developed-by: Mario Limonciello
S
From: Melissa Wen
drm_edid_connector_update() updates display info, filling ELD with audio
info from Short-Audio Descriptors in the last step of
update_dislay_info(). Our goal is stopping using raw edid, so we can
extract SAD from drm_eld instead of access raw edid to get audio caps.
Signed-off-
From: Melissa Wen
drm_edid_connector_update() updates display info, filling ELD with
speaker allocation data in the last step of update_dislay_info(). Our
goal is stopping using raw edid, so we can extract SADB from drm_eld
instead of access raw edid to get audio caps.
Signed-off-by: Melissa Wen
From: Melissa Wen
Replace raw edid handling (struct edid) with the opaque EDID type
(struct drm_edid) on amdgpu_dm_connector for consistency. It may also
prevent mismatch of approaches in different parts of the driver code.
Signed-off-by: Melissa Wen
Co-developed-by: Mario Limonciello
Signed-o
From: Melissa Wen
Since [1], we can use drm_edid_product_id to get debug info from
drm_edid instead of directly parsing EDID.
Link:
https://lore.kernel.org/dri-devel/cover.1712655867.git.jani.nik...@intel.com/
[1]
Signed-off-by: Melissa Wen
Co-developed-by: Mario Limonciello
Signed-off-by: M
Some manufacturers have intentionally put an EDID that differs from
the EDID on the internal panel on laptops.
Attempt to fetch this EDID if it exists and prefer it over the EDID
that is provided by the panel. If a user prefers to use the EDID from
the panel, offer a DC debugging parameter that wo
On 8/30/2024 3:01 PM, Dmitry Baryshkov wrote:
> On Thu, Aug 22, 2024 at 04:29:32PM GMT, Ekansh Gupta wrote:
>> Fastrpc driver creates maps for user allocated fd buffers. Before
>> creating a new map, the map list is checked for any already existing
>> maps using map fd. Checking with just map fd
> On Mon, Sep 16, 2024 at 04:49:16PM +0300, Alexander Usyskin wrote:
> > Add driver for access to Intel discrete graphics card
> > internal SPI device.
> > Expose device on auxiliary bus by i915 and Xe drivers and
> > provide spi driver to register this device with MTD framework.
>
> As far as I c
Hi,
On 17/09/2024 13:14, Antonino Maniscalco wrote:
This series implements preemption for A7XX targets, which allows the GPU to
switch to an higher priority ring when work is pushed to it, reducing latency
for high priority submissions.
This series enables L1 preemption with skip_save_restore w
There is no need to call the dev_err() function directly to print a
custom message when handling an error from platform_get_irq() function
as it is going to display an appropriate error message in case of a
failure.
Signed-off-by: Chen Ni
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 4 +---
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