On Tue, Apr 16, 2024 at 01:14:52PM -0700, A wrote:
> >From 6dbcb120581fc7cb45812193227b0a197abd8ba4 Mon Sep 17 00:00:00 2001
> From: Ashok Kumar
> Date: Tue, 16 Apr 2024 09:19:32 -0700
> Subject: [PATCH] [PATCH] staging: fbtft Removed redundant parentheses on
> logical expr
>
> Adhere to Linux K
Hi Thomas,
On Tue, Apr 16, 2024 at 2:07 PM Thomas Zimmermann wrote:
> Am 16.04.24 um 13:25 schrieb Javier Martinez Canillas:
> > Thomas Zimmermann writes:
> > Do I understand correctly that info->fix.smem_start doesn't have to be set
> > because that's only used for I/O memory?
>
> It's the star
>From 6dbcb120581fc7cb45812193227b0a197abd8ba4 Mon Sep 17 00:00:00 2001
From: Ashok Kumar
Date: Tue, 16 Apr 2024 09:19:32 -0700
Subject: [PATCH] [PATCH] staging: fbtft Removed redundant parentheses on
logical expr
Adhere to Linux Kernel coding style removed redundant parentheses,
multiple blank
Hi Amaranath,
Many thanks for your review and comments.
On 15.04.2024 14:10, Somalapuram, Amaranath wrote:
+static void ttm_bo_validate_basic(struct kunit *test)
+{
+ const struct ttm_bo_validate_test_case *params = test->param_value;
+ uint32_t fst_mem = TTM_PL_SYSTEM, snd_mem = TTM_PL_V
Hello,
On Tue, Apr 16, 2024 at 05:53:01PM +0200, Alexandre Mergnat wrote:
> Alexandre Mergnat (16):
> [...]
> dt-bindings: pwm: mediatek,pwm-disp: add power-domains property
> dt-bindings: pwm: mediatek,pwm-disp: add compatible for mt8365 SoC
> [...]
> base-commit: 890c94ce8a456a
Hello,
On Tue, Apr 16, 2024 at 05:53:12PM +0200, Alexandre Mergnat wrote:
> According to the Mediatek MT8365 datasheet, the display PWM block has
> a power domain.
>
> Signed-off-by: Alexandre Mergnat
I already pointed that out in reply to the cover letter, so just to make
it more easily to spo
Hello,
On Tue, Apr 16, 2024 at 05:53:13PM +0200, Alexandre Mergnat wrote:
> Add a compatible string for MediaTek Genio 350 MT8365's display PWM
> block: this is the same as MT8183.
>
> Reviewed-by: AngeloGioacchino Del Regno
>
> Acked-by: Uwe Kleine-König
> Signed-off-by: Alexandre Mergnat
I
On 17/04/2024 10:01, Uwe Kleine-König wrote:
Hello,
On Tue, Apr 16, 2024 at 05:53:12PM +0200, Alexandre Mergnat wrote:
According to the Mediatek MT8365 datasheet, the display PWM block has
a power domain.
Signed-off-by: Alexandre Mergnat
I already pointed that out in reply to the cover l
On 17/04/2024 09:58, Uwe Kleine-König wrote:
Hello,
On Tue, Apr 16, 2024 at 05:53:01PM +0200, Alexandre Mergnat wrote:
Alexandre Mergnat (16):
[...]
dt-bindings: pwm: mediatek,pwm-disp: add power-domains property
dt-bindings: pwm: mediatek,pwm-disp: add compatible for mt
On Wed, 17 Apr 2024 at 02:57, Marijn Suijten
wrote:
>
> Ordering issues here cause an uninitalized (default STANDALONE)
> usecase to be programmed (which appears to be a MUX) in some cases
> when msm_dsi_host_register() is called, leading to the slave PLL in
> bonded-DSI mode to source from a cloc
On 17/04/2024 01:53, Maíra Canal wrote:
In V3D, the conclusion of a job is indicated by a IRQ. When a job
finishes, then we update the local and the global GPU stats of that
queue. But, while the GPU stats are being updated, a user might be
reading the stats from sysfs or fdinfo.
For example,
On Tue, 16 Apr 2024, Thomas Zimmermann wrote:
> Hi
>
> Am 16.04.24 um 14:27 schrieb Jani Nikula:
>> On Tue, 16 Apr 2024, Thomas Zimmermann wrote:
>>> Hi
>>>
>>> Am 16.04.24 um 11:20 schrieb Jani Nikula:
Repurpose drm_edid_are_equal() to be more helpful for its single user,
and rename dr
Hi Ashutosh,
> @@ -839,16 +837,38 @@ void i915_hwmon_register(struct drm_i915_private *i915)
> if (!hwm_gt_is_visible(ddat_gt, hwmon_energy,
> hwmon_energy_input, 0))
> continue;
>
> - hwmon_dev = devm_hwmon_device_register_with_info(dev,
> ddat_
On 16/04/2024 23:31, Anatoliy Klymenko wrote:
Update live format defines to match DPSUB AV_BUF_LIVE_VID_CONFIG register
layout. These defines were never referenced before, so no other changes
required.
Reviewed-by: Laurent Pinchart
Signed-off-by: Anatoliy Klymenko
---
drivers/gpu/drm/xlnx/zy
Resending by adding the r-b's and to get ack from DRM maintainers
for the first patch in the series.
PCI subsystem provides callbacks to inform the driver about a request to
do function level reset by user, initiated by writing to sysfs entry
/sys/bus/pci/devices/.../reset. This will allow the dri
In scenarios where drm_dev_put is directly called by driver we want to
release devm_drm_dev_init_release action associated with struct
drm_device.
v2: Directly expose the original function, instead of introducing a
helper (Rodrigo)
Cc: Thomas Hellstr_m
Cc: Rodrigo Vivi
Reviewed-by: Rodrigo Viv
Save and restore PCI states where ever needed.
Cc: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/xe/xe_device_types.h | 3 ++
drivers/gpu/drm/xe/xe_pci.c | 48 ++--
drivers/gpu/drm/xe/xe_pci.h | 4 ++
This would be used in other places outside of gt_reset path.
Cc: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/xe/xe_gt.c | 31 +--
drivers/gpu/drm/xe/xe_gt.h | 1 +
2 files changed, 22 insertions(+), 10 deletions(
PCI subsystem provides callbacks to inform the driver about a request to
do function level reset by user, initiated by writing to sysfs entry
/sys/bus/pci/devices/.../reset. This will allow the driver to handle FLR
without the need to do unbind and rebind as the driver needs to
reinitialize the dev
Clang Static Checker(scan-build) Warning:
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c:line 215, column 4
Value stored to 'ret' is never read.
Return the error code rather than zero when 'conn->info.type' has an
unknown type.
Fixes: 8b7d92cad953 ("drm/nouveau/kms/nv50-: create connectors base
On Wed, 17 Apr 2024, Imre Deak wrote:
> Factor out a function to check for UHBR channel coding support used by a
> follow-up patch in the patchset.
>
> Cc: dri-devel@lists.freedesktop.org
> Reviewed-by: Ankit Nautiyal
> Reviewed-by: Manasi Navare
> Acked-by: Maarten Lankhorst
> Signed-off-by: I
On Wed, Apr 17, 2024 at 11:12:09AM +0200, Herman van Hazendonk wrote:
> This happens in the MSM DRM driver when it is used
> without any subcomponents, which is a special corner
> case.
>
> If the MDP4 is used with nothing but the LVDS display,
> we get this problem that no components are found si
On Mon, 8 Apr 2024 13:27:17 +0100
Steven Price wrote:
> On 08/04/2024 08:36, Dan Carpenter wrote:
> > These variables should be u32 instead of u64 because they're only
> > storing u32 values. Also static checkers complain when we do:
> >
> > suspended_slots &= ~upd_ctx.timedout_mask;
> >
>
On Wed, 17 Apr 2024, Imre Deak wrote:
> Enabling the 5k@60Hz uncompressed mode on the MediaTek/Dell U3224KBA
> monitor results in a blank screen, at least on MTL platforms on UHBR
> link rates with some (<30) uncompressed bpp values. Enabling compression
> fixes the problem, so do that for now. Wi
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Add dt-binding documentation of dpi for MediaTek MT8365 SoC.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetre
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
- Add compatibles and platform data into the Mediatek DPI driver.
- Fix the DPI0 parent clock to be consistent.
This SoC is compatible with the mt8183 calculate factor.
Signed-off-by: Alexandre Mergnat
---
drivers/clk/mediatek/clk-mt8365-mm.c
Il 16/04/24 17:53, amerg...@baylibre.com ha scritto:
From: Fabien Parent
DPI is part of the display / multimedia block in MediaTek SoCs, and
always have a power-domain (at least in the upstream device-trees).
Add the power-domains property to the binding documentation.
Signed-off-by: Fabien Pa
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
According to the Mediatek MT8365 datasheet, the display PWM block has
a power domain.
Signed-off-by: Alexandre Mergnat
It's the same for at least MT8195, MT8183 and I think MT8192 as well... so
not having that from the beginning is actually a m
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Data Path Read DMA on MT8365, which is compatible
with that of the MT8183.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Overlay on MT8365, which is compatible
with that of the MT8192.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Gamma on MT8365, which is compatible
with that of the MT8183.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Color on MT8365, which is compatible
with that of the MT8173.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Color Correction on MT8365, which is compatible
with that of the MT8183.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Dither on MT8365, which is compatible
with that of the MT8183.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Adaptive Ambient Light on MT8365, which is compatible
with that of the MT8183.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
mp;dummy_match;
> +
> /* Reallocate the match array for its true size */
> ret = component_match_realloc(match, match->num);
> if (ret)
>
> ---
> base-commit: 96fca68c4fbf77a8185eb10f7557e23352732ea2
> change-id: 20240417-component-dummy-a9aae5ac7234
>
> Best regards,
> --
> Herman van Hazendonk
>
--
With best wishes
Dmitry
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the Display Serial Interface on MT8365, which is compatible
with that of the MT8183.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
size */
ret = component_match_realloc(match, match->num);
if (ret)
---
base-commit: 96fca68c4fbf77a8185eb10f7557e23352732ea2
change-id: 20240417-component-dummy-a9aae5ac7234
Best regards,
--
Herman van Hazendonk
Hi,
sorry for the delay. This patch fixes the crash during boot! (tested
against linux 6.9-rc3)
Greetings
Am Mo., 15. Apr. 2024 um 13:57 Uhr schrieb Patrik Jakobsson <
patrik.r.jakobs...@gmail.com>:
> On Mon, Apr 15, 2024 at 1:45 PM Thomas Zimmermann
> wrote:
> >
> > Hi
> >
> > Am 15.04.24 um
On 16/04/2024 23:31, Anatoliy Klymenko wrote:
DPSUB in bridge mode supports multiple input media bus formats.
Announce the list of supported input media bus formats via
drm_bridge.atomic_get_input_bus_fmts callback. Introduce a set of live
input formats supported by DPSUB. Add safeguards to form
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
- Add aliases for each display components to help display drivers.
- Add the Display Pulse Width Modulation (DISP_PWM) to provide PWM signals
for the LED driver of mobile LCM.
- Add the MIPI Display Serial Interface (DSI) PHY support. (up to 4-l
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
MIPI DSI:
- Add "vsys_lcm_reg" regulator support and setup the "mt6357_vsim1_reg",
to power the pannel plugged to the DSI connector.
- Setup the Display Parallel Interface.
- Add the startek kd070fhfid015 pannel support.
HDMI:
- Add HDMI connec
On 16/04/2024 23:31, Anatoliy Klymenko wrote:
Program live video input format according to selected media bus format.
In the bridge mode of operation, DPSUB is connected to FPGA CRTC which
almost certainly supports a single media bus format as its output. Expect
this to be delivered via the new
In case there is no DP device attached to the port the
transfer function should return IO error, similar to what
other drivers do.
In case EAGAIN is returned then any read from /dev/drm_dp_aux
device ends up in an infinite loop as the upper layers
constantly repeats the transfer request.
Fixes: f7
Hi
Am 17.04.24 um 10:21 schrieb Jani Nikula:
On Tue, 16 Apr 2024, Thomas Zimmermann wrote:
Hi
Am 16.04.24 um 14:27 schrieb Jani Nikula:
On Tue, 16 Apr 2024, Thomas Zimmermann wrote:
Hi
Am 16.04.24 um 11:20 schrieb Jani Nikula:
Repurpose drm_edid_are_equal() to be more helpful for its sin
On Wed, 17 Apr 2024 00:30:58 +0200
Louis Chauvet wrote:
> Le 15/04/24 - 14:36, Pekka Paalanen a écrit :
> > On Tue, 09 Apr 2024 12:04:06 +0200
> > Louis Chauvet wrote:
> >
> > > The expected behavior of the rotation property was not very clear. Add
> > > more examples to explain what is the e
On Wed, Apr 17, 2024 at 11:47 AM Enrico Bartky wrote:
>
> Hi,
>
> sorry for the delay. This patch fixes the crash during boot! (tested against
> linux 6.9-rc3)
>
> Greetings
Thanks for testing. Then I'll push this to drm-next-fixes.
-Patrik
>
> Am Mo., 15. Apr. 2024 um 13:57 Uhr schrieb Patrik
Hi Herman,
thanks for your patch!
Do you actually have this working on real hardware? I never
submitted this patch because I could not get the hardware
working.
I was hoping for smarter people (Dmitry Baryshkov...) to step
in and help out to actually make it work before submitting
patches.
Your
On Wed, 17 Apr 2024 00:30:58 +0200
Louis Chauvet wrote:
> Le 15/04/24 - 15:00, Pekka Paalanen a écrit :
> > On Tue, 09 Apr 2024 12:04:07 +0200
> > Louis Chauvet wrote:
> >
> > > Let's provide more details about the drm_format_info structure because
> > > its content may not be straightforward
On Wed, Apr 17, 2024 at 12:39:40PM +0300, Jani Nikula wrote:
> On Wed, 17 Apr 2024, Imre Deak wrote:
> > Enabling the 5k@60Hz uncompressed mode on the MediaTek/Dell U3224KBA
> > monitor results in a blank screen, at least on MTL platforms on UHBR
> > link rates with some (<30) uncompressed bpp val
On Wed, Apr 17, 2024 at 12:21:58PM +0300, Jani Nikula wrote:
> On Wed, 17 Apr 2024, Imre Deak wrote:
> > Factor out a function to check for UHBR channel coding support used by a
> > follow-up patch in the patchset.
> >
> > Cc: dri-devel@lists.freedesktop.org
> > Reviewed-by: Ankit Nautiyal
> > Re
On Wed, 17 Apr 2024 at 02:57, Marijn Suijten
wrote:
>
> When dual-DSI (bonded DSI) was added in commit ed9976a09b48
> ("drm/msm/dsi: adjust dsi timing for dual dsi mode") some DBG() prints
> were not updated, leading to print the original mode->clock rather
> than the adjusted (typically the mode
On Wed, 17 Apr 2024 at 02:57, Marijn Suijten
wrote:
>
> When configuring the timing of DSI hosts (interfaces) in
> dsi_timing_setup() all values written to registers are taking bonded
> DSI into account by dividing the original mode width by 2 (half the
> data is sent over each of the two DSI host
On Wed, 17 Apr 2024 at 02:57, Marijn Suijten
wrote:
>
> As we can clearly see in a downstream kernel [1], flushing the slave INTF
> is skipped /only if/ the PPSPLIT topology is active.
>
> However, when DPU was originally submitted to mainline PPSPLIT was no
> longer part of it (seems to have been
On Wed, 17 Apr 2024 at 02:57, Marijn Suijten
wrote:
>
> Just like the active interface and writeback block in ctl_intf_cfg_v1(),
> and later the rest of the blocks in followup active-CTL fixes or
> reworks, multiple calls to this function should enable additional DSC
> blocks instead of overwritin
On 2024-04-17 11:18:58, Dmitry Baryshkov wrote:
> On Wed, 17 Apr 2024 at 02:57, Marijn Suijten
> wrote:
> >
> > Ordering issues here cause an uninitalized (default STANDALONE)
> > usecase to be programmed (which appears to be a MUX) in some cases
> > when msm_dsi_host_register() is called, leading
BOs in a bulk move have to share the same reservation object. That is
not the case in the ttm_bo_unreserve_bulk subtest. Share bo2's resv
object with bo1 to fix the issue.
Fixes: 995279d280d1 ("drm/ttm/tests: Add tests for ttm_bo functions")
Signed-off-by: Karolina Stolarek
---
drivers/gpu/drm/t
In commit d393acce7b3f ("drm/tests: Switch to kunit devices"),
DRM test helpers migrated away from using a dummy platform driver
in favour of KUnit device. This means that DMA masks for the device
are not set but are required by ttm_pool_alloc tests.
Set the DMA mask for coherent mappings to unblo
Introduce tests for ttm_bo_validate()/ttm_bo_init_validate() that exercise
simple BO placement as well as eviction (including the case where the evict
domain also requires eviction to fit the incoming buffer). Prepare KUnit
helpers to handle such scenarios and add a mock VRAM manager. This series a
Add a new helper function that also initializes the device. Use it in
ttm_tt test suite and delete the local definition.
Signed-off-by: Karolina Stolarek
Reviewed-by: Matthew Auld
Reviewed-by: Somalapuram, Amaranath
---
drivers/gpu/drm/ttm/tests/ttm_kunit_helpers.c | 14 ++
drivers
DRM KUnit helpers are selected automatically when TTM tests are enabled,
so there's no need to do it directly in the .kunitconfig file.
Signed-off-by: Karolina Stolarek
---
drivers/gpu/drm/ttm/tests/.kunitconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/ttm/tests/.kunitc
Add tests for ttm_bo_init_reserved() and ttm_bo_validate() that use
sys manager. Define a simple move function in ttm_device_funcs. Expose
destroy callback of the buffer object to make testing of
ttm_bo_init_reserved() behaviour easier.
Signed-off-by: Karolina Stolarek
Reviewed-by: Matthew Auld
Add tests for ttm_bo_validate that focus on BO eviction and swapout.
Update device funcs definition with eviction-related callbacks. Add
alternative funcs where evict_flags() routes eviction to a domain
that can't allocate resources (dubbed "busy manager" in the tests).
Extract the common path of t
Add mock resource manager to test ttm_bo_validate() with non-system
placements. Update KConfig entry to enable DRM Buddy allocator, used
by the mock manager. Update move function to do more than just assign
a resource.
Signed-off-by: Karolina Stolarek
Tested-by: Somalapuram, Amaranath
---
drive
Add tests for functions that add and release pages to TTs. Test the
swapin operation. Export ttm_tt_unpopulate, ttm_tt_swapin and
ttm_tt_swapout symbols for testing purposes.
Signed-off-by: Karolina Stolarek
Reviewed-by: Somalapuram, Amaranath
Tested-by: Somalapuram, Amaranath
---
drivers/gpu/
Add test cases that check how the state of dma fences in BO's
reservation object influence the ttm_bo_validation() flow. Do similar
tests for resource manager's move fence.
Signed-off-by: Karolina Stolarek
Reviewed-by: Somalapuram, Amaranath
Tested-by: Somalapuram, Amaranath
---
.../gpu/drm/tt
List improvements for the test suite with some notes.
Signed-off-by: Karolina Stolarek
---
drivers/gpu/drm/ttm/tests/TODO | 25 +
1 file changed, 25 insertions(+)
create mode 100644 drivers/gpu/drm/ttm/tests/TODO
diff --git a/drivers/gpu/drm/ttm/tests/TODO b/drivers/gpu
Hello,
On Wed, Apr 17, 2024 at 12:19:19PM +0200, AngeloGioacchino Del Regno wrote:
> Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
> > According to the Mediatek MT8365 datasheet, the display PWM block has
> > a power domain.
> >
> > Signed-off-by: Alexandre Mergnat
>
> It's the same for at l
Hi Sima and Dave,
Here goes our biggest pull request of this round.
Likely a small pull request coming end of next week as well.
I had to bypass dim on missed link tag in a patch that was a urgent revert
and ended up without the patchwork link.
(Which btw I'm proposing an option to dim for making
Hi Thomas,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-xe/drm-xe-next]
[also build test WARNING on drm-intel/for-linux-next-fixes drm-tip/drm-tip
linus/master v6.9-rc4 next-20240417]
[cannot apply to drm-misc/drm-misc-next drm/drm-next drm-exynos
Il 17/04/24 15:25, Uwe Kleine-König ha scritto:
Hello,
On Wed, Apr 17, 2024 at 12:19:19PM +0200, AngeloGioacchino Del Regno wrote:
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
According to the Mediatek MT8365 datasheet, the display PWM block has
a power domain.
Signed-off-by: Alexandre Me
On 17.04.2024 10:41, Aravind Iddamsetty wrote:
> This would be used in other places outside of gt_reset path.
>
> Cc: Lucas De Marchi
>
> Reviewed-by: Rodrigo Vivi
> Signed-off-by: Aravind Iddamsetty
> ---
> drivers/gpu/drm/xe/xe_gt.c | 31 +--
> drivers/gpu/drm
Il 17/04/24 12:38, Wojciech Macek ha scritto:
In case there is no DP device attached to the port the
transfer function should return IO error, similar to what
other drivers do.
In case EAGAIN is returned then any read from /dev/drm_dp_aux
device ends up in an infinite loop as the upper layers
con
On 4/17/2024 3:03 PM, Karolina Stolarek wrote:
In commit d393acce7b3f ("drm/tests: Switch to kunit devices"),
DRM test helpers migrated away from using a dummy platform driver
in favour of KUnit device. This means that DMA masks for the device
are not set but are required by ttm_pool_alloc test
On Wed, Apr 17, 2024 at 02:11:42PM +0530, Aravind Iddamsetty wrote:
> In scenarios where drm_dev_put is directly called by driver we want to
> release devm_drm_dev_init_release action associated with struct
> drm_device.
>
> v2: Directly expose the original function, instead of introducing a
> hel
On 17.04.2024 10:41, Aravind Iddamsetty wrote:
> PCI subsystem provides callbacks to inform the driver about a request to
> do function level reset by user, initiated by writing to sysfs entry
> /sys/bus/pci/devices/.../reset. This will allow the driver to handle FLR
> without the need to do unb
On 4/17/2024 3:03 PM, Karolina Stolarek wrote:
DRM KUnit helpers are selected automatically when TTM tests are enabled,
so there's no need to do it directly in the .kunitconfig file.
Signed-off-by: Karolina Stolarek
Reviewed-by: Nirmoy Das
---
drivers/gpu/drm/ttm/tests/.kunitconfig | 1 -
Hi Mario,
On Thu, Feb 15, 2024 at 8:04 PM Mario Limonciello
wrote:
> On 2/15/2024 12:47, Ville Syrjälä wrote:
> > On Thu, Feb 15, 2024 at 12:20:56PM -0600, Mario Limonciello wrote:
> >> On 2/14/2024 17:13, Ville Syrjälä wrote:
> >>> On Wed, Feb 14, 2024 at 03:57:54PM -0600, Mario Limonciello wrot
Factor out a function to check for 128b/132b channel coding support used
by a follow-up patch in the patchset.
v2: s/drm_dp_uhbr_channel_coding_supported()/drm_dp128b132b_supported()
(Jani)
Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula
Reviewed-by: Ankit Nautiyal
Reviewed-by: Manasi N
Enabling the 5k@60Hz uncompressed mode on the MediaTek/Dell U3224KBA
monitor results in a blank screen, at least on MTL platforms on UHBR
link rates with some (<30) uncompressed bpp values. Enabling compression
fixes the problem, so do that for now. Windows enables DSC always if the
sink supports i
On Tue, Apr 16, 2024 at 08:30:48PM +0200, David Wronek wrote:
> Raydium RM69380 is a display driver IC used to drive OLED DSI panels.
> Add a dt-binding for it.
>
> Signed-off-by: David Wronek
> ---
> Note:
> Depends on commit 48a516363e29 ("dt-bindings: display: panel: add common
> dual-link sc
When both hwmon and hwmon drvdata (on which hwmon depends) are device
managed resources, the expectation, on device unbind, is that hwmon will be
released before drvdata. However, in i915 there are two separate code
paths, which both release either drvdata or hwmon and either can be
released before
On Wed, 17 Apr 2024 01:28:48 -0700, Andi Shyti wrote:
>
Hi Andi,
> > @@ -839,16 +837,38 @@ void i915_hwmon_register(struct drm_i915_private
> > *i915)
> > if (!hwm_gt_is_visible(ddat_gt, hwmon_energy,
> > hwmon_energy_input, 0))
> > continue;
> >
> > -
On Tue, Apr 16, 2024 at 01:31:35PM -0700, Anatoliy Klymenko wrote:
> Implement live video input format setting for ZynqMP DPSUB.
> To: Conor Dooley
If there's nothing dt related here anymore, you can drop me :)
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On Wed, 17 Apr 2024, Thomas Zimmermann wrote:
>> Many thanks! Just to double check, do you want me to move patch 5
>> earlier and squash patches 6&7?
>
> Your choice. Either is fine by me.
I jumped at the easy option and merged this as-is. :)
Thanks again,
Jani.
--
Jani Nikula, Intel
On 4/16/24 15:22, Jani Nikula wrote:
> Prefer struct drm_edid based functions over struct edid.
>
> Signed-off-by: Jani Nikula
>
> ---
>
Thanks,
Reviewed-by: Noralf Trønnes
W dniu 2024-04-16 22:52, Marijn Suijten napisał(a):
On 2024-04-16 20:30:49, David Wronek wrote:
Add support for the 2560x1600@90Hz OLED panel by EDO bundled with a
Raydium RM69380 controller, as found on the Lenovo Xiaoxin Pad Pro
2021.
Signed-off-by: David Wronek
---
drivers/gpu/drm/panel/
The mp3309 has two configuration registers, named according to their
address (0x00 and 0x01).
In the second register (0x01), the bit DIMS (Dimming Mode Select) must
be always 0 (zero), in both analog (via i2c commands) and pwm dimming
mode.
In the initial driver version, the DIMS bit was set in pw
The mp3309 has two configuration registers, named according to their
address (0x00 and 0x01).
In the second register (0x01), the bit DIMS (Dimming Mode Select) must
be always 0 (zero), in both analog (via i2c commands) and pwm dimming
mode.
In the initial driver version, the DIMS bit was set in pw
Raydium RM69380 is a display driver IC used to drive OLED DSI panels.
Add a dt-binding for it.
Signed-off-by: David Wronek
---
Note:
Depends on commit 48a516363e29 ("dt-bindings: display: panel: add common
dual-link schema")
---
.../bindings/display/panel/raydium,rm69380.yaml| 89 ++
This patch adds support the 2560x1600@90Hz dual DSI command mode panel by
EDO in combination with a Raydium RM69380 driver IC.
This driver IC can be found in the following devices:
* Lenovo Xiaoxin Pad Pro 2021 (TB-J716F) with EDO panel
* Lenovo Tab P11 Pro (TB-J706F) with EDO panel
* Robo & Ka
Add support for the 2560x1600@90Hz OLED panel by EDO bundled with a
Raydium RM69380 controller, as found on the Lenovo Xiaoxin Pad Pro 2021.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: David Wronek
---
drivers/gpu/drm/panel/Kconfig | 12 +
drivers/gpu/drm/panel/Makefile
80.example.dtb:
panel@0: Unevaluated properties are not allowed ('ports' was unexpected)
from schema $id:
http://devicetree.org/schemas/display/panel/raydium,rm69380.yaml#
doc reference errors (make refcheckdocs):
See
https://patchwork.ozlabs.org/project/devicetree-bindings/
Move the variables tracking the current dynamic state into a struct
to separate it a bit better from the static device properties.
Signed-off-by: Lucas Stach
Reviewed-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-pre.c | 27 +++
1 file changed, 15 insertions(+), 12 deleti
imx-drm doesn't mandate a modeset when the framebuffer modifier changes,
but currently the tile prefetch and resolve (TPR) configuration of the
PRE is only set up on the initial modeset.
As the TPR configuration is double buffered, same as all the other PRE
states, we can support dynamic reconfigu
On Tue, 16 Apr 2024 17:53:02 +0200, Alexandre Mergnat wrote:
> Document the display Adaptive Ambient Light on MT8365, which is compatible
> with that of the MT8183.
>
> Signed-off-by: Alexandre Mergnat
> ---
> Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml | 1 +
> 1 file
On Tue, 16 Apr 2024 17:53:03 +0200, Alexandre Mergnat wrote:
> Document the display Color Correction on MT8365, which is compatible
> with that of the MT8183.
>
> Signed-off-by: Alexandre Mergnat
> ---
> Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml | 3
> +++
> 1 fil
On Tue, 16 Apr 2024 17:53:04 +0200, Alexandre Mergnat wrote:
> Document the display Color on MT8365, which is compatible
> with that of the MT8173.
>
> Signed-off-by: Alexandre Mergnat
> ---
> Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml | 1 +
> 1 file changed, 1 ins
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