>On Tue, Jan 24, 2023 at 8:04 PM MyungJoo Ham wrote:
>>
>> >Sender : Rob Clark
>> >Date : 2023-01-24 00:37 (GMT+9)
>> >Title : [PATCH] PM / devfreq: Fix build issues with devfreq disabled
>> >
>> >From: Rob Clark
>> >
>> >The existing no-op shims for when PM_DEVFREQ (or an individual governor)
>
>Sender : Rob Clark
>Date : 2023-01-24 00:37 (GMT+9)
>Title : [PATCH] PM / devfreq: Fix build issues with devfreq disabled
>
>From: Rob Clark
>
>The existing no-op shims for when PM_DEVFREQ (or an individual governor)
>only do half the job. The governor specific config/tuning structs need
>to b
Hi,
This appears to be a pretty common problem. systemd includes a udev
rule[1] which loads a console font from userspace, using setfont from
the kbd package, when a vtcon device is added. According to udev debug
logs, this event only fires once.
This actually works fine all the way until the GPU
On 01/19/2023 10:53 AM, 'Amit Kumar Mahapatra' via
BCM-KERNEL-FEEDBACK-LIST,PDL wrote:
> diff --git a/drivers/spi/spi-bcm63xx-hsspi.c
> b/drivers/spi/spi-bcm63xx-hsspi.c
> index b871fd810d80..dc179c4677d4 100644
> --- a/drivers/spi/spi-bcm63xx-hsspi.c
> +++ b/drivers/spi/spi-bcm63xx-hsspi.c
> @@ -1
1.org/0day-ci/archive/20230125/202301252016.vm7ksfra-...@intel.com/config)
compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project
f28c006a5895fc0e329fe15fead81e37457cb1d1)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.
On Wed, 25 Jan 2023 at 11:35, Christian König
wrote:
>
> Am 25.01.23 um 11:21 schrieb Matthew Auld:
> > On Wed, 25 Jan 2023 at 10:07, Christian König
> > wrote:
> >> Am 25.01.23 um 10:56 schrieb Matthew Auld:
> >>> On Tue, 24 Jan 2023 at 17:15, Matthew Auld
> >>> wrote:
> On Tue, 24 Jan 202
On 1/23/23 20:30, Sebastian Wick wrote:
A new property to control YCC and subsampling would be the more
complete path here. If we actually want to fix this in the short-term
though, we should handle the YCC and RGB Colorspace values as
equivalent, everywhere. Technically we're breaking the use
On Wed, Jan 25, 2023 at 12:00 AM Rob Herring wrote:
>
> Just as unevaluatedProperties or additionalProperties are required at
> the top level of schemas, they should (and will) also be required for
> child node schemas. That ensures only documented properties are
> present.
>
> Add unevaluatedProp
On 1/25/23 07:54, Jagan Teki wrote:
On Wed, Jan 25, 2023 at 2:54 AM Jagan Teki wrote:
On Wed, Jan 25, 2023 at 2:54 AM Jagan Teki wrote:
On Wed, Jan 25, 2023 at 2:42 AM Marek Vasut wrote:
On 1/24/23 22:01, Jagan Teki wrote:
On Wed, Jan 25, 2023 at 2:18 AM Marek Vasut wrote:
On 1/23/23
On 1/25/23 07:40, Liu Ying wrote:
A valid bridge is already found in lcdif_attach_bridge() and set
to lcdif->bridge, so lcdif->bridge cannot be a NULL pointer. Drop
the unnecessary NULL pointer check in KMS stage.
Is it possible that a panel (instead of a bridge) be attached to LCDIFv3
e.g. in
Hi
Am 25.01.23 um 09:30 schrieb Javier Martinez Canillas:
Hello Thomas,
On 1/24/23 14:40, Thomas Zimmermann wrote:
Test for connectors in the client code and remove a similar test
from the generic fbdev emulation. Do nothing if the test fails.
Not having connectors indicates a driver bug.
Sig
On Wed, Jan 25, 2023 at 7:23 PM Marek Vasut wrote:
>
> On 1/25/23 07:54, Jagan Teki wrote:
> > On Wed, Jan 25, 2023 at 2:54 AM Jagan Teki
> > wrote:
> >>
> >> On Wed, Jan 25, 2023 at 2:54 AM Jagan Teki
> >> wrote:
> >>>
> >>> On Wed, Jan 25, 2023 at 2:42 AM Marek Vasut wrote:
>
> On
Hi
Am 25.01.23 um 10:18 schrieb Javier Martinez Canillas:
On 1/24/23 14:40, Thomas Zimmermann wrote:
Move the fb-helper clean-up code into drm_fb_helper_unprepare(). No
functional changes.
v2:
* declare as static inline (kernel test robot)
Signed-off-by: Thomas Zimmermann
---
drive
Am 25.01.23 um 13:53 schrieb Matthew Auld:
On Wed, 25 Jan 2023 at 11:35, Christian König
wrote:
Am 25.01.23 um 11:21 schrieb Matthew Auld:
On Wed, 25 Jan 2023 at 10:07, Christian König
wrote:
Am 25.01.23 um 10:56 schrieb Matthew Auld:
On Tue, 24 Jan 2023 at 17:15, Matthew Auld
wrote:
On T
cleanup PAGE_SHIFT operation and replacing
ttm_resource resource->start with cursor start
using amdgpu_res_first API.
v1 -> v2: reorder patch sequence
v2 -> v3: addressing review comment v2
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 +++-
drivers/gpu
cleanup PAGE_SHIFT operation and replacing
ttm_resource resource->start with cursor start
using amdgpu_res_first API.
v1 -> v2: reorder patch sequence
v2 -> v3: addressing review comment v2
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 6 +-
Change the GTT manager init and allocate from pages to bytes
v1 -> v2: reorder patch sequence
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_g
To support GTT manager amdgpu_res_first, amdgpu_res_next
from pages to bytes and clean up PAGE_SHIFT operation.
v1 -> v2: reorder patch sequence
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
Am 25.01.23 um 15:24 schrieb Somalapuram Amaranath:
cleanup PAGE_SHIFT operation and replacing
ttm_resource resource->start with cursor start
using amdgpu_res_first API.
v1 -> v2: reorder patch sequence
v2 -> v3: addressing review comment v2
Signed-off-by: Somalapuram Amaranath
---
drivers/gp
Am 25.01.23 um 15:24 schrieb Somalapuram Amaranath:
cleanup PAGE_SHIFT operation and replacing
ttm_resource resource->start with cursor start
using amdgpu_res_first API.
v1 -> v2: reorder patch sequence
v2 -> v3: addressing review comment v2
Signed-off-by: Somalapuram Amaranath
Reviewed-by: C
Am 25.01.23 um 15:24 schrieb Somalapuram Amaranath:
To support GTT manager amdgpu_res_first, amdgpu_res_next
from pages to bytes and clean up PAGE_SHIFT operation.
v1 -> v2: reorder patch sequence
Ok once more: You need to squash this patch here together with the other
patches.
Otherwise thi
On Tue, Jan 24, 2023 at 05:00:48PM -0600, Rob Herring wrote:
> Just as unevaluatedProperties or additionalProperties are required at
> the top level of schemas, they should (and will) also be required for
> child node schemas. That ensures only documented properties are
> present.
>
> Add unevalua
On Tue, Jan 24, 2023 at 05:02:28PM -0600, Rob Herring wrote:
> Just as unevaluatedProperties or additionalProperties are required at
> the top level of schemas, they should (and will) also be required for
> child node schemas. That ensures only documented properties are
> present.
>
> Add unevalua
From: Markus Niebel
The DE signal is active high on this display, fill in the missing
bus_flags. This aligns panel_desc with its display_timing.
Fixes: 9a2654c0f62a ("drm/panel: Add and fill drm_panel type field")
Fixes: b3bfcdf8a3b6 ("drm/panel: simple: add Tianma TM070JVHG33")
Signed-off-by: M
The current design of callback function disable() of struct
nvkm_devinit_func is defined to return a u64 value. In its implementation
in the driver modules, the function always returns a fixed value 0. Hence
the design and implementation of this function should be enhanced to return
void instead of
On Tue, 24 Jan 2023, Rob Herring wrote:
> Just as unevaluatedProperties or additionalProperties are required at
> the top level of schemas, they should (and will) also be required for
> child node schemas. That ensures only documented properties are
> present.
>
> Add unevaluatedProperties or add
On Tue, 24 Jan 2023, Rob Herring wrote:
> Just as unevaluatedProperties or additionalProperties are required at
> the top level of schemas, they should (and will) also be required for
> child node schemas. That ensures only documented properties are
> present.
>
> Add unevaluatedProperties or add
cleanup PAGE_SHIFT operation and replacing
ttm_resource resource->start with cursor start
using amdgpu_res_first API.
v1 -> v2: reorder patch sequence
v2 -> v3: addressing review comment v2
v3 -> v4: addressing review comment v3
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu
cleanup PAGE_SHIFT operation and replacing
ttm_resource resource->start with cursor start
using amdgpu_res_first API.
v1 -> v2: reorder patch sequence
v2 -> v3: addressing review comment v2
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 6 +-
To support GTT manager amdgpu_res_first, amdgpu_res_next
from pages to bytes and clean up PAGE_SHIFT operation.
Change the GTT manager init and allocate from pages to bytes
v1 -> v2: reorder patch sequence
v3 -> v4: reorder patch sequence
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/
Cleaning up page shift operations.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index a97e8236bde9..ffe6a1ab7
On Wed, 25 Jan 2023 at 14:20, Christian König
wrote:
>
> Am 25.01.23 um 13:53 schrieb Matthew Auld:
> > On Wed, 25 Jan 2023 at 11:35, Christian König
> > wrote:
> >> Am 25.01.23 um 11:21 schrieb Matthew Auld:
> >>> On Wed, 25 Jan 2023 at 10:07, Christian König
> >>> wrote:
> Am 25.01.23 um
This reverts commit 4110872b8115aab2adb3a52149c144d8465440de.
This still seems to break i915.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo_util.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c
b/drivers/gp
This reverts commit 00984ad39599bb2a1e6ec5d4e9c75a749f7f45c9.
It seems to still breka i915.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 33471e363ff4..
On Wed, Jan 25, 2023 at 12:26:33AM -0800, Alan Previn wrote:
> From: Alexander Usyskin
>
> Add device link with i915 as consumer and mei_pxp as supplier
> to ensure proper ordering of power flows.
>
> V2: condition on absence of heci_pxp to filter out DG
>
> Signed-off-by: Alexander Usyskin
>
On Wed, Jan 25, 2023 at 2:42 AM Marek Vasut wrote:
>
> On 1/24/23 22:01, Jagan Teki wrote:
> > On Wed, Jan 25, 2023 at 2:18 AM Marek Vasut wrote:
> >>
> >> On 1/23/23 16:12, Jagan Teki wrote:
> >>> Enable and disable of te_gpio's are Exynos platform specific
> >>> irq handling, so add the exynos
On Wed, 25 Jan 2023 at 15:50, Christian König
wrote:
>
> This reverts commit 00984ad39599bb2a1e6ec5d4e9c75a749f7f45c9.
>
> It seems to still breka i915.
We also need to revert the third patch:
b49323aa35d5 drm/ttm: prevent moving of pinned BOs
It introduces the side effect of no longer calling
Am 25.01.23 um 17:13 schrieb Matthew Auld:
On Wed, 25 Jan 2023 at 15:50, Christian König
wrote:
This reverts commit 00984ad39599bb2a1e6ec5d4e9c75a749f7f45c9.
It seems to still breka i915.
We also need to revert the third patch:
b49323aa35d5 drm/ttm: prevent moving of pinned BOs
It introduce
On Wed, 25 Jan 2023 at 16:15, Christian König wrote:
>
> Am 25.01.23 um 17:13 schrieb Matthew Auld:
> > On Wed, 25 Jan 2023 at 15:50, Christian König
> > wrote:
> >> This reverts commit 00984ad39599bb2a1e6ec5d4e9c75a749f7f45c9.
> >>
> >> It seems to still breka i915.
> > We also need to revert th
On Tue, Jan 24, 2023 at 5:00 PM Rob Herring wrote:
>
> Just as unevaluatedProperties or additionalProperties are required at
> the top level of schemas, they should (and will) also be required for
> child node schemas. That ensures only documented properties are
> present.
>
> Add unevaluatedPrope
On 1/25/23 15:04, Jagan Teki wrote:
On Wed, Jan 25, 2023 at 7:23 PM Marek Vasut wrote:
On 1/25/23 07:54, Jagan Teki wrote:
On Wed, Jan 25, 2023 at 2:54 AM Jagan Teki wrote:
On Wed, Jan 25, 2023 at 2:54 AM Jagan Teki wrote:
On Wed, Jan 25, 2023 at 2:42 AM Marek Vasut wrote:
On 1/24/23
On Wed, Jan 25, 2023 at 10:16 PM Marek Vasut wrote:
>
> On 1/25/23 15:04, Jagan Teki wrote:
> > On Wed, Jan 25, 2023 at 7:23 PM Marek Vasut wrote:
> >>
> >> On 1/25/23 07:54, Jagan Teki wrote:
> >>> On Wed, Jan 25, 2023 at 2:54 AM Jagan Teki
> >>> wrote:
>
> On Wed, Jan 25, 2023 at 2:
On 1/19/2023 2:53 PM, Douglas Anderson wrote:
The DP AUX interrupt handling was a bit of a mess.
* There were two functions (one for "native" transfers and one for
"i2c" transfers) that were quite similar. It was hard to say how
many of the differences between the two functions were on pu
drm_dev_is_unplugged() check is inherently racy as unplug can happen
just after this check. Add DRM_UNPLUG_SAFE ioctl flag to keep
the whole ioctl func call within drm_dev_enter() ... drm_dev_exit().
This could be enabled by drivers for individual ioctl's .
Signed-off-by: Stanislaw Gruszka
---
On 1/19/2023 2:53 PM, Douglas Anderson wrote:
If our interrupt handler gets called and we don't really handle the
interrupt then we should return IRQ_NONE. The current interrupt
handler didn't do this, so let's fix it.
NOTE: for some of the cases it's clear that we should return IRQ_NONE
and s
On 1/25/23 18:12, Jagan Teki wrote:
On Wed, Jan 25, 2023 at 10:16 PM Marek Vasut wrote:
On 1/25/23 15:04, Jagan Teki wrote:
On Wed, Jan 25, 2023 at 7:23 PM Marek Vasut wrote:
On 1/25/23 07:54, Jagan Teki wrote:
On Wed, Jan 25, 2023 at 2:54 AM Jagan Teki wrote:
On Wed, Jan 25, 2023 at 2
Greg, ack on getting these 3 mei patches merged through intel-gfx?
On Wed, Jan 25, 2023 at 12:26:34AM -0800, Alan Previn wrote:
> From: Alexander Usyskin
>
> Client on bus have only one vtag map slot and should disregard the vtag
> value when cleaning pending read flag.
> Fixes read flow contr
Hi,
On 25/01/2023 11:52, Michal Hocko wrote:
On Tue 24-01-23 19:46:28, Shakeel Butt wrote:
On Tue, Jan 24, 2023 at 03:59:58PM +0100, Michal Hocko wrote:
On Mon 23-01-23 19:17:23, T.J. Mercier wrote:
When a buffer is exported to userspace, use memcg to attribute the
buffer to the allocating
On Wed, Jan 25, 2023 at 10:57 PM Marek Vasut wrote:
>
> On 1/25/23 18:12, Jagan Teki wrote:
> > On Wed, Jan 25, 2023 at 10:16 PM Marek Vasut wrote:
> >>
> >> On 1/25/23 15:04, Jagan Teki wrote:
> >>> On Wed, Jan 25, 2023 at 7:23 PM Marek Vasut wrote:
>
> On 1/25/23 07:54, Jagan Teki wr
On 1/24/2023 06:40, Tvrtko Ursulin wrote:
On 20/01/2023 23:28, john.c.harri...@intel.com wrote:
From: John Harrison
The debugfs dump of requests was confused about what state requires
the execlist lock versus the GuC lock. There was also a bunch of
duplicated messy code between it and the erro
Why are you top posting?
On Wed, Jan 25, 2023 at 12:28:29PM -0500, Rodrigo Vivi wrote:
>
> Greg, ack on getting these 3 mei patches merged through intel-gfx?
$ mdfrm -c ~/mail/todo/
756 messages in /home/gregkh/mail/todo/
Give me a chance, what is the sudden rush?
greg k-h
On 1/25/23 18:35, Jagan Teki wrote:
[...]
exynos_dsi_register_te_irq is done after the bridge attach is done in
Exynos, here bridge attach is triggered in the component ops bind
call, since samsung-dsim is a pure bridge w/o any component ops.
https://github.com/openedev/kernel/blob/imx8mm-dsi-v
Hi,
On 23/01/2023 15:42, Michal Koutný wrote:
Hello Tvrtko.
Interesting work.
Thanks!
On Thu, Jan 12, 2023 at 04:55:57PM +, Tvrtko Ursulin
wrote:
Because of the heterogenous hardware and driver DRM capabilities, soft limits
are implemented as a loose co-operative (bi-directional) i
On 25/01/2023 18:00, John Harrison wrote:
On 1/24/2023 06:40, Tvrtko Ursulin wrote:
On 20/01/2023 23:28, john.c.harri...@intel.com wrote:
From: John Harrison
The debugfs dump of requests was confused about what state requires
the execlist lock versus the GuC lock. There was also a bunch of
On 1/25/2023 10:12, Tvrtko Ursulin wrote:
On 25/01/2023 18:00, John Harrison wrote:
On 1/24/2023 06:40, Tvrtko Ursulin wrote:
On 20/01/2023 23:28, john.c.harri...@intel.com wrote:
From: John Harrison
The debugfs dump of requests was confused about what state requires
the execlist lock versus
Hi,
On Wed, Jan 25, 2023 at 9:22 AM Kuogee Hsieh wrote:
>
> > -void dp_ctrl_isr(struct dp_ctrl *dp_ctrl)
> > +irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl)
> > {
> > struct dp_ctrl_private *ctrl;
> > u32 isr;
> > + irqreturn_t ret = IRQ_NONE;
> >
> > if (!dp_ctrl)
> > -
It's a constant pattern in the driver to need to use 2 ranges of MMIOs
based on port, phy, pll, etc. When that happens, instead of using
_PICK_EVEN(), _PICK() needs to be used. Using _PICK() is discouraged
due to some reasons like:
1) It increases the code size since the array is declared
in e
Commit 622113b9f11f ("drm/ssd130x: Replace simple display helpers with the
atomic helpers") changed the driver to just use the atomic helpers instead
of the simple KMS abstraction layer.
But the commit also made a subtle change on the display power sequence and
initialization order, by moving the
On Wed, Jan 25, 2023 at 02:24:54PM +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> I don't really like the symlinks, my other idea was creating new
> files which just include the original, but this idea seems to at
> least build.
Reviewed-by: Rodrigo Vivi
Tested-by: Rodrigo Vivi
I tested it
Sorry for the delay, this was almost ready to send, but then got
forgotten in my drafts folder.
On Mon, Jan 23, 2023 at 11:15 PM Christian König
wrote:
> Am 24.01.23 um 06:19 schrieb John Stultz:
> > On Mon, Jan 23, 2023 at 8:29 AM Christian König
> > wrote:
> >> Am 23.01.23 um 14:55 schrieb Lau
On Wed, Jan 25, 2023 at 10:51:53AM +, Tvrtko Ursulin wrote:
>
> On 24/01/2023 20:54, john.c.harri...@intel.com wrote:
> > From: John Harrison
> >
> > Uncore is really part of the GT. So use the GT specific debug/error
That's not really true; uncore should be outside the GT since it's used
f
On 1/25/2023 1:13 AM, Marijn Suijten wrote:
Add missing DSC hardware block register ranges to the snapshot utility
to include them in dmesg (on MSM_DISP_SNAPSHOT_DUMP_IN_CONSOLE) and the
kms debugfs file.
Signed-off-by: Marijn Suijten
Huge ack from me,
Reviewed-by: Abhinav Kumar
---
On Wed, Jan 25, 2023 at 05:05:25PM +0530, Aradhya Bhatia wrote:
> The DSS controller on TI's AM625 SoC is an update from that on TI's
> AM65X SoC. The former has an additional OLDI TX on its first video port
> (VP0) that helps output cloned video or WUXGA (1920x1200@60fps)
> resolution video output
,
Reviewed-by: Abhinav Kumar
---
Changes since v1:
- Rebase on next-20230125 to solve conflicts with 43e3293fc614
("drm/msm/dpu: add support for MDP_TOP blackhole").
v1:
https://lore.kernel.org/linux-arm-msm/20230125091315.133283-1-marijn.suij...@somainline.org/T/#u
drivers/gpu/drm/msm
On 1/24/2023 11:29 PM, Dmitry Baryshkov wrote:
On Wed, 25 Jan 2023 at 04:14, Abhinav Kumar wrote:
On 6/17/2022 4:33 PM, Dmitry Baryshkov wrote:
The array of CRTC in the struct msm_drm_private duplicates a list of
CRTCs in the drm_device. Drop it and use the existing list for CRTC
enumera
On Wed, Jan 25, 2023 at 11:33 PM Marek Vasut wrote:
>
> On 1/25/23 18:35, Jagan Teki wrote:
>
> [...]
>
> >>> exynos_dsi_register_te_irq is done after the bridge attach is done in
> >>> Exynos, here bridge attach is triggered in the component ops bind
> >>> call, since samsung-dsim is a pure bridg
On Tue, Jan 24, 2023 at 05:14:06PM -0800, Matt Roper wrote:
> Register reset characteristics (i.e., whether the register maintains or
> loses its value on engine reset) is an important factor that determines
> which wa_list we want to add workarounds to. We recently found out that
> the bspec docu
On Tue, Jan 24, 2023 at 05:14:07PM -0800, Matt Roper wrote:
> GAMSTLB_CTRL and GAMCNTRL_CTRL became multicast/replicated registers on
> Xe_HP. They should be defined accordingly and use MCR-aware operations.
>
> These registers have only been used for some dg2/xehpsdv workarounds, so
> this fix i
Hi Christian
Am 24.01.23 um 15:12 schrieb Christian König:
Hi Thomas,
we ran into a problem with the general fbcon/fbdev implementation and
though that you might have some idea.
What happens is the following:
1. We load amdgpu and get our normal fbcon.
2. fbcon allocates a dump BO as backing
AMDGPU kernel upstream support for debugging of compute ISA.
Current production ROCm GDB interface for ISA debugging:
https://rocmdocs.amd.com/en/latest/ROCm_Tools/ROCgdb.html
WIP upstream source for ROCm GDB API, ROC Kernel and ROC Thunk can be
referenced here:
https://github.com/ROCm-Developer
Introduce the require KGD debug calls that will execute hardware debug
mode setting.
Signed-off-by: Jonathan Kim
Reviewed-by: Felix Kuehling
---
.../gpu/drm/amd/include/kgd_kfd_interface.h | 34 +++
1 file changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/kgd
Expose debug capabilities in the KFD topology node's HSA capabilities and
debug properties flags.
Ensure correct capabilities are exposed based on firmware support.
Flag definitions can be referenced in uapi/linux/kfd_sysfs.h.
v2: v1 was reviewed but re-requesting review for the following.
- rem
Older HW only supports debugging on a single process because the
SPI debug mode setting registers are device global.
The HWS has supplied a single pinned VMID (0xf) for MAP_PROCESS
for debug purposes. To pin the VMID, the KFD will remove the VMID from
the HWS dynamic VMID allocation via SET_RESOUC
Unlike single process debug devices, multi-process debug devices allow
debug mode setting per-VMID (non-device-global).
Because the HWS manages PASID-VMID mapping, the new MAP_PROCESS API allows
the KFD to forward the required SPI debug register write requests.
To request a new debug mode setting
Implement the per-device calls to enable or disable HW debug mode for
GFX9 prior to GFX9.4.1.
GFX9.4.1 and onward will require their own enable/disable sequence as
follow on patches.
When hardware debug mode setting is requested, waves will inherit
these settings in the Shader Processor Input's (
On GFX9.4.1, the implicit wait count instruction on s_barrier is
disabled by default in the driver during normal operation for
performance requirements.
There is a hardware bug in GFX9.4.1 where if the implicit wait count
instruction after an s_barrier instruction is disabled, any wave that
hits a
The ROCm debugger will attach to a process to debug by PTRACE and will
expect the KFD to prepare a process for the target PID, whether the
target PID has opened the KFD device or not.
This patch is to explicity handle this requirement. Further HW mode
setting and runtime coordination requirements
Introduce the GPU debug operations interface.
For ROCm-GDB to extend the GNU Debugger's ability to inspect the AMD GPU
instruction set, provide the necessary interface to allow the debugger
to HW debug-mode set and query exceptions per HSA queue, process or
device.
The runtime_enable interface co
The debugger subscibes to nofication for requested exceptions on attach.
Allow the debugger to change its subsciption later on.
Signed-off-by: Jonathan Kim
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 3 ++
drivers/gpu/drm/amd/amdkfd/kfd_debug.c | 36 +++
Similar to the F32 HWS, the RS64 HWS for GFX11 now supports a multi-process
debug API.
The skip_process_ctx_clear ADD_QUEUE requirement is to prevent the MES
from clearing the process context when the first queue is added to the
scheduler in order to maintain debug mode settings during queue preem
The debugger can attach to a process prior to HSA enablement (i.e.
inferior is spawned by the debugger and attached to immediately before
target process has been enabled for HSA dispatches) or it
can attach to a running target that is already HSA enabled. Either
way, the debugger needs to know the
Implement the per-device calls to enable or disable HW debug mode
for GFX11.
Signed-off-by: Jonathan Kim
---
.../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c| 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c
b/drivers/gpu/dr
Similar to GFX9 debug devices, set the hardware debug mode by draining
the SPI appropriately prior the mode setting request.
Because GFX10 has waves allocated by the work group boundaray and each
SE's SPI instances do not communicate, the SPI drain time is much longer.
This long drain time will be
Add a debug operation that allows the debugger to send an exception
directly to runtime through a payload address.
For memory violations, normal vmfault signals will be applied to
notify runtime instead after passing in the saved exception data
when a memory violation was raised to the debugger.
To enable HW debug mode per process, all devices must be debug enabled
successfully. If a failure occures, rewind the enablement of debug mode
on the enabled devices.
A power management scenario that needs to be considered is HW
debug mode setting during GFXOFF. During GFXOFF, these registers
wi
From: Jay Cornwall
Trap handler behavior will differ when a debugger is attached.
Make the debug trap flag available in the trap handler TMA.
Update it when the debug trap ioctl is invoked.
v4: fix up comments to clarify flagging implementation.
v3: Rebase for upstream
v2:
Add missing debug f
Allow the debugger to set single memory and single ALU operations.
Some exceptions are imprecise (memory violations, address watch) in the
sense that a trap occurs only when the exception interrupt occurs and
not at the non-halting faulty instruction. Trap temporaries 0 & 1 save
the program count
Allow the debugger to query a single queue, device and process
exception.
The KFD should also return the GPU or Queue id of the exception.
The debugger also has the option of clearing exceptions after
being queried.
Signed-off-by: Jonathan Kim
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd
Add missing debug trap registers references and initialize all debug
registers on boot by clearing the hardware exception overrides and the
wave allocation ID index.
The debugger requires that TTMPs 6 & 7 save the dispatch ID to map
waves onto dispatch during compute context inspection.
In order t
The debugger must be notified by any debugger subscribed exception
that comes from hardware interrupts.
If a debugger session exits, any exceptions it subscribed to may still
have interrupts in the interrupt ring buffer or KGD/KFD pipeline.
To prevent a new session from inheriting stale interrupts
In order to inspect waves from the saved context at any point during a
debug session, the debugger must be able to preempt queues to trigger
context save by suspending them.
On queue suspend, the KFD will copy the context save header information
so that the debugger can correctly crawl the appropr
Shader read, write and atomic memory operations can be alerted to the
debugger as an address watch exception.
Allow the debugger to pass in a watch point to a particular memory
address per device.
Note that there exists only 4 watch points per devices to date, so have
the KFD keep track of what w
Similar to queue snapshot, return an array of device information using
an entry_size check and return.
Unlike queue snapshots, the debugger needs to pass to correct number of
devices that exist. If it fails to do so, the KFD will return the
number of actual devices so that the debugger can make a
Allow the debugger to get a snapshot of a specified number of queues
containing various queue property information that is copied to the
debugger.
Since the debugger doesn't know how many queues exist at any given time,
allow the debugger to pass the requested number of snapshots as 0 to get
the a
Due to a HW bug, waves in only half the shader arrays can enter trap.
When starting a debug session, relocate all waves to the first shader
array of each shader engine and mask off the 2nd shader array as
unavailable.
When ending a debug session, re-enable the 2nd shader array per
shader engine.
Exception events can be generated from interrupts or queue activitity.
The raise event function will save exception status of a queue, device
or process then notify the debugger of the status change by writing to
a debugger polled file descriptor that the debugger provides during
debug attach.
Fo
The HWS schedule allows a grace period for wave completion prior to
preemption for better performance by avoiding CWSR on waves that can
potentially complete quickly. The debugger, on the other hand, will
want to inspect wave status immediately after it actively triggers
preemption (a suspend funct
Bump the minor version to declare debugging capability is now
available.
Signed-off-by: Jonathan Kim
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 1 -
include/uapi/linux/kfd_ioctl.h | 3 ++-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/d
Allow the debugger to query additional info based on an exception code.
For device exceptions, it's currently only memory violation information.
For process exceptions, it's currently only runtime information.
Queue exception only report the queue exception status.
The debugger has the option of c
This operation allows the debugger to override the enabled HW
exceptions on the device.
On debug devices that only support the debugging of a single process,
the HW exceptions are global and set through the SPI_GDBG_TRAP_MASK
register.
Because they are global, only address watch exceptions are all
1 - 100 of 286 matches
Mail list logo
