On 11/28/22 15:53, Maxime Ripard wrote:
> We'll need to use those helpers from drivers too, so let's move it to a
> more visible location.
>
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/tests/drm_client_modeset_test.c| 3 +--
> drivers/gpu/drm/tests/drm_kunit_helpers.c
On 29/11/2022 21:12, john.c.harri...@intel.com wrote:
From: John Harrison
Engine resets are supposed to never happen. But in the case when one
Engine resets or engine reset failures? Hopefully the latter.
does (due to unknwon reasons that normally come down to a missing
w/a), it is useful
Hi,
On 15/11/2022 10:39, Rahul T R wrote:
Phy is not being initialized after suspend resume. Fix this by setting
phy_initialized flag to false in suspend callback
Signed-off-by: Rahul T R
---
drivers/gpu/drm/bridge/cdns-dsi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/d
On 11/29/22 9:06 AM, Li Zetao wrote:
> This patchset fixes similar issue, the root cause of the
> problem is that the virtqueues are not stopped on error
> handling path.
Not related to just this patchset, but guys, Huawei really *REALLY* need
to get the email situation sorted. I'm digging whole/h
On 29/11/2022 03:49, Laurent Pinchart wrote:
@@ -198,70 +436,53 @@ static void rcar_mipi_dsi_parameters_calc(struct
rcar_mipi_dsi *dsi,
*/
fout_target = target * mipi_dsi_pixel_format_to_bpp(dsi->format)
/ (2 * dsi->lanes);
- if (fout_target < 4000
On 29/11/2022 03:49, Laurent Pinchart wrote:
Hi Tomi,
Thank you for the patch.
On Wed, Nov 23, 2022 at 08:59:46AM +0200, Tomi Valkeinen wrote:
Add DSI support for r8a779g0. The main differences to r8a779a0 are in
the PLL and PHTW setups.
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/rc
When doing the following test steps, an error was found:
step 1: modprobe virtio_input succeeded
# modprobe virtio_input <-- OK
step 2: fault injection in input_allocate_device()
# modprobe -r virtio_input <-- OK
# ...
CPU: 0 PID: 4260 Comm: modprobe Tainted: G
From: Yushan Zhou
Fix the following coccicheck warning:
./drivers/gpu/drm/tegra/submit.c:689:2-7: WARNING:
NULL check before some freeing functions is not needed.
Signed-off-by: Yushan Zhou
---
drivers/gpu/drm/tegra/submit.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a
When doing the following test steps, an error was found:
step 1: modprobe virtio_mem succeeded
# modprobe virtio_mem <-- OK
step 2: fault injection in virtio_mem_init()
# modprobe -r virtio_mem <-- OK
# ...
CPU: 0 PID: 1837 Comm: modprobe Not tainted
6.1.0-rc6-00
Add DSI support for r8a779g0. The main differences to r8a779a0 are in
the PLL and PHTW setups.
Signed-off-by: Tomi Valkeinen
---
Changes to v2:
- Use MHZ() in the tables, with floating point values as inputs
- Use V3U/V4H names instead of R8A779A0/R8A779G0
- PLL diffs between V3U and V4H are now
When doing the following test steps, an error was found:
step 1: modprobe 9pnet_virtio succeeded
# modprobe 9pnet_virtio <-- OK
step 2: fault injection in sysfs_create_file()
# modprobe -r 9pnet_virtio <-- OK
# ...
FAULT_INJECTION: forcing a failure.
name failsla
On Tue, Nov 29, 2022 at 11:05:28AM -0500, Alex Deucher wrote:
> On Tue, Nov 29, 2022 at 10:59 AM Mikhail Krylov wrote:
> >
> > On Tue, Nov 29, 2022 at 09:44:19AM -0500, Alex Deucher wrote:
> > > On Mon, Nov 28, 2022 at 3:48 PM Mikhail Krylov wrote:
> > > >
> > > > On Mon, Nov 28, 2022 at 09:50:50
When doing the following test steps, an error was found:
step 1: modprobe virtio_gpu succeeded
# modprobe virtio_gpu <-- OK
step 2: fault injection in virtio_gpu_alloc_vbufs()
# modprobe -r virtio_gpu <-- OK
# ...
CPU: 0 PID: 1714 Comm: modprobe Not tainted 6.1.0-rc7-d
Hi,
on Nov. 29, 2022, 11:45 a.m. Tomi wrote:
>On 29/11/2022 03:13, Doug Anderson wrote:
>> Hi,
>>
>> On Fri, Nov 25, 2022 at 2:54 AM Qiqi Zhang wrote:
>>>
>>> According to the description in ti-sn65dsi86's datasheet:
>>>
>>> CHA_HSYNC_POLARITY:
>>> 0 = Active High Pulse. Synchronization signal is
Hi Laurent,
looks like linux/Documentation/userspace-api/media/v4l/subdev-formats.rst
doesn't correlate at all to the arrangement and numbering in
linux/include/uapi/linux/media-bus-format.h .
Which sources do you want me to check?
Looking at https://github.com/raspberrypi/linux/tree/rpi-6.1.y b
Add DSI support for r8a779g0. The main differences to r8a779a0 are in
the PLL and PHTW setups.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Laurent Pinchart
---
Changes to v3:
- Use v3h as the default case in "switch(model)" tests
- Add Laurent's rb
drivers/gpu/drm/rcar-du/rcar_mipi_dsi.c
This patchset fixes similar issue, the root cause of the
problem is that the virtqueues are not stopped on error
handling path.
Changes since v1:
- Modify the description error of the test case and fixes tag
information.
- Add patch to fix virtio_gpu module.
v1 at:
https://lore.kernel.org/all/2
When doing the following test steps, an error was found:
step 1: modprobe virtio_blk succeeded
# modprobe virtio_blk <-- OK
step 2: fault injection in __blk_mq_alloc_disk()
# modprobe -r virtio_blk <-- OK
# ...
CPU: 0 PID: 4578 Comm: modprobe Tainted: GW
On Tue, Nov 29, 2022 at 09:44:19AM -0500, Alex Deucher wrote:
> On Mon, Nov 28, 2022 at 3:48 PM Mikhail Krylov wrote:
> >
> > On Mon, Nov 28, 2022 at 09:50:50AM -0500, Alex Deucher wrote:
> >
> > >>> [excessive quoting removed]
> >
> > >> So, is there any progress on this issue? I do understand it
On 11/28/22 15:53, Maxime Ripard wrote:
> The current helper to allocate a DRM device doesn't allow for any
> subclassing by drivers, which is going to be troublesome as we work on
> getting some kunit testing on atomic modesetting code.
>
> Let's use a similar pattern to the other allocation help
Il 29/11/22 15:34, nathan.lu ha scritto:
From: Nathan Lu
modify VDOSYS0 display device tree Documentations for MT8188.
Signed-off-by: Nathan Lu
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: AngeloGioacchino Del Regno
Il 29/11/22 15:35, nathan.lu ha scritto:
From: Nathan Lu
1. add mt8188 mmsys
2. add mt8188 vdosys0 routing table settings
Signed-off-by: amy zhang
Signed-off-by: Nathan Lu
Reviewed-by: AngeloGioacchino Del Regno
Il 29/11/22 15:35, nathan.lu ha scritto:
From: Nathan Lu
add driver data of mt8188 vdosys0 to mediatek-drm and the sub driver.
Signed-off-by: amy zhang
Signed-off-by: Nathan Lu
Since series [1] was explicitly requested by maintainers...
Reviewed-by: AngeloGioacchino Del Regno
[1]: http
On Wed, 30 Nov 2022 at 02:12, Kuogee Hsieh wrote:
>
> Move data-lanes property from mdss_dp node to dp_out endpoint. Also
> add link-frequencies property into dp_out endpoint as well. The last
> frequency specified at link-frequencies will be the max link rate
> supported by DP.
>
> Changes in v5:
Simplify couple of drivers by using the new devm_regulator_*get_enable*()
These patches were previously part of the series:
https://lore.kernel.org/lkml/cover.1660934107.git.mazziesacco...@gmail.com/
"Devm helpers for regulator get and enable". I did keep the patch series
versioning even though I
Those pixel formats are used in Synaptics's VideoSmart series SoCs,
likes VS640, VS680. I just disclose the pixel formats used in the video
codecs and display pipeline this time. Actually any device connected to
the MTR module could support those tiling and compressed pixel formats.
https://synapt
On Wed, 30 Nov 2022 at 09:02, Dave Airlie wrote:
>
> On Sat, 26 Nov 2022 at 20:21, Dmitry Baryshkov
> wrote:
> >
> > Hi Dave,
> >
> > As agreed with Rob Clark, a pull request for the non-GPU part of the
> > drm/msm driver. Summary below.
> >
> > The following changes since commit 7f7a942c0a338c4
From: Randy Li
Signed-off-by: Randy Li
Signed-off-by: Hsia-Jun(Randy) Li
---
Documentation/gpu/drivers.rst | 1 +
Documentation/gpu/synaptics.rst | 104
2 files changed, 105 insertions(+)
create mode 100644 Documentation/gpu/synaptics.rst
diff --git a/Doc
From: "Hsia-Jun(Randy) Li"
Those modifiers only record the parameters would effort pixel
layout or memory layout. Whether physical memory page mapping
is used is not a part of format.
Signed-off-by: Hsia-Jun(Randy) Li
---
include/uapi/drm/drm_fourcc.h | 76 +++
Simplify using devm_regulator_bulk_get_enable()
Signed-off-by: Matti Vaittinen
Acked-by: Robert Foss
---
v4 resend 2:
Resending unchanged code with commit title prefix adjusted as suggested
by Robert
I am doing a clean-up for my local git and encountered this one.
Respinning as it seems this
Simplify using the devm_regulator_get_enable_optional(). Also drop the
now unused struct member 'hdmi_supply'.
Signed-off-by: Matti Vaittinen
Martin Blumenstingl
---
v4 resend 2:
Respinning unchanged code with the commit title changed as wa suggested
by Robert Foss and commit message changed as
On Wed, 30 Nov 2022 at 02:12, Kuogee Hsieh wrote:
>
> By default, HBR2 (5.4G) is the max link link be supported. This patch add
> the capability to support max link rate at HBR3 (8.1G).
>
> Changes in v2:
> -- add max link rate from dtsi
>
> Changes in v3:
> -- parser max_data_lanes and max_dp_lin
Il 29/11/22 15:34, nathan.lu ha scritto:
From: Nathan Lu
modify VDOSYS0 mmsys device tree Documentations for MT8188.
Signed-off-by: Nathan Lu
---
.../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/b
On 11/28/22 15:53, Maxime Ripard wrote:
> Some tests will need to provide their own drm_driver instead of relying
> on the dumb one in the helpers, so let's create a helper that allows to
> do so.
>
> Signed-off-by: Maxime Ripard
> ---
Reviewed-by: Javier Martinez Canillas
--
Best regards,
J
On Wed, 30 Nov 2022 at 02:12, Kuogee Hsieh wrote:
>
> Both data-lanes and link-frequencies are property of endpoint. This
> patch parser endpoint to retrieve max data lanes and max link rate
> supported specified at dp_out endpoint. In the case where no endpoint
> specified, then 4 data lanes with
On 11/28/22 15:53, Maxime Ripard wrote:
> In order to test the current atomic_check hooks we need to have a DRM
> device that has roughly the same capabilities and layout that the actual
> hardware. We'll also need a bunch of functions to create arbitrary
> atomic states.
>
> Let's create some hel
On 11/28/22 15:53, Maxime Ripard wrote:
> Accessing a register when running under kunit is a bad idea since our
> device is completely mocked.
>
> Fail the current test if we ever access any of our hardware registers.
>
> Signed-off-by: Maxime Ripard
> ---
[...]
> -#define CRTC_WRITE(offset, v
On 11/28/22 15:53, Maxime Ripard wrote:
> The HVS to PixelValve muxing code is fairly error prone and has a bunch
> of arbitrary constraints due to the hardware setup.
>
> Let's create a test suite that makes sure that the possible combinations
> work and the invalid ones don't.
>
> Signed-off-by
On Fri, Nov 25, 2022 at 11:40:04AM -0500, Nicolas Dufresne wrote:
> Le mercredi 23 novembre 2022 à 17:33 +0100, Daniel Vetter a écrit :
> > On Wed, Nov 23, 2022 at 10:33:38AM +0200, Pekka Paalanen wrote:
> > > On Tue, 22 Nov 2022 18:33:59 +0100
> > > Christian König wrote:
> > >
> > > > We should
On Fri, Nov 25, 2022 at 01:41:23AM +, Yuan Can wrote:
> As the devm_kcalloc may return NULL, the return value needs to be checked
> to avoid NULL poineter dereference.
>
> Fixes: 66b2cf9623fa ("drm/mediatek: use layer_nr function to get layer number
> to init plane")
> Signed-off-by: Yuan Can
On Fri, Nov 25, 2022 at 02:52:01PM -0300, André Almeida wrote:
> This patchset adds a udev event for DRM device's resets.
>
> Userspace apps can trigger GPU resets by misuse of graphical APIs or driver
> bugs. Either way, the GPU reset might lead the system to a broken state[1],
> that
> might be
On 29.11.2022 21:46, Adam Skladowski wrote:
> Add nodes required for TSENS block using the common qcom,tsens-v2 binding.
>
> Signed-off-by: Adam Skladowski
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 11 +++
> 1 file changed, 11 insertions(+)
>
On 29.11.2022 21:46, Adam Skladowski wrote:
> Add a node for the PRNG to enable hw-accelerated pseudo-random number
> generation.
>
> Signed-off-by: Adam Skladowski
> ---
> ar
Reviewed-by: Konrad Dybcio
Konrad
ch/arm64/boot/dts/qcom/sm6115.dtsi | 7 +++
> 1 file changed, 7 insertions(+)
On 29.11.2022 21:46, Adam Skladowski wrote:
> Add rpm stats node.
>
> Signed-off-by: Adam Skladowski
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> b/arch/a
On 29.11.2022 21:46, Adam Skladowski wrote:
> Add display clock controller to allow controlling display related clocks.
>
> Signed-off-by: Adam Skladowski
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 14 ++
> 1 file changed, 14 insertions(+)
>
On 29.11.2022 21:46, Adam Skladowski wrote:
> Add mdss and dpu node to enable display support on SM6115.
>
> Signed-off-by: Adam Skladowski
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 183 +++
> 1 file changed, 183 insertions(+)
>
On 29.11.2022 21:46, Adam Skladowski wrote:
> Add GPI DMA node which will be wired to i2c/spi/uart.
>
> Signed-off-by: Adam Skladowski
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 20
> 1 file changed, 20 insertions(+)
>
> diff --git
On Tue, Nov 29, 2022 at 12:02:41PM -0800, Rob Clark wrote:
> From: Rob Clark
>
> drm_gem_shmem_mmap() doesn't own this reference!
>
> Fixes: 2194a63a818d ("drm: Add library for shmem backed GEM objects")
> Cc: sta...@vger.kernel.org
> Signed-off-by: Rob Clark
With Guenter's nits addressed:
Re
On 29.11.2022 21:46, Adam Skladowski wrote:
> Change fallback to qcom generic compatible
> in order to prevent reboot during SMMU initialization.
>
> Signed-off-by: Adam Skladowski
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 +-
> 1 file changed, 1 ins
On Tue, Nov 29, 2022 at 12:47:42PM -0800, Rob Clark wrote:
> On Tue, Nov 29, 2022 at 12:32 PM Guenter Roeck wrote:
> >
> > On Tue, Nov 29, 2022 at 12:02:42PM -0800, Rob Clark wrote:
> > > From: Rob Clark
> > >
> > > vm_open() is not allowed to fail. Fortunately we are guaranteed that
> > > the p
On Wed, Nov 30, 2022 at 05:21:48PM +0800, Hsia-Jun Li wrote:
> From: "Hsia-Jun(Randy) Li"
>
> Those modifiers only record the parameters would effort pixel
> layout or memory layout. Whether physical memory page mapping
> is used is not a part of format.
>
> Signed-off-by: Hsia-Jun(Randy) Li
>
On 2022-11-29 17:11, Mikhail Krylov wrote:
On Tue, Nov 29, 2022 at 11:05:28AM -0500, Alex Deucher wrote:
On Tue, Nov 29, 2022 at 10:59 AM Mikhail Krylov wrote:
On Tue, Nov 29, 2022 at 09:44:19AM -0500, Alex Deucher wrote:
On Mon, Nov 28, 2022 at 3:48 PM Mikhail Krylov wrote:
On Mon, Nov 2
On 29/11/2022 18:05, Matthew Auld wrote:
On Fri, 25 Nov 2022 at 11:14, Tvrtko Ursulin
wrote:
+ Matt
On 25/11/2022 10:21, Christian König wrote:
TTM is just wrapping core DMA functionality here, remove the mid-layer.
No functional change.
Signed-off-by: Christian König
---
drivers/gpu
Hey Daniel and Dave,
A single fix to vmwgfx mks-guest-stats ioctl.
I lost my internet connection when pushing the tag, so I put together this mail
manually. I hope you remember where drm-misc is hosted. :)
Enjoy!
Maarten Lankhorst
drm-misc-fixes-2022-11-30:
drm-misc-fixes for v6.1-rc8/final:
-
On 29/11/2022 19:04, Uwe Kleine-König wrote:
> Compared to the txt description this adds clocks and clock-names to
> match reality.
(...)
> +
> +maintainers:
> + - Sascha Hauer
> + - Pengutronix Kernel Team
> +
> +properties:
> + compatible:
> +oneOf:
> + - enum:
> + - fsl,
From: Tvrtko Ursulin
Thread group id (aka pid from userspace point of view) is a more
interesting thing to show as an owner of a DRM fd, so track and show that
instead of the thread id.
In the next patch we will make the owner updated post file descriptor
handover, which will also be tgid based
From: Tvrtko Ursulin
Not so long ago when I sent out my DRM cgroup controller RFC I had some pieces
in it which were tracking the real client using a specific drm_file. Christian
then suggested that should probably be extracted and improved in the DRM core
from the start, which was on his wishlis
From: Tvrtko Ursulin
Replace the deprecated macro with the per-device one.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/drm_file.c | 21 +++--
drivers/gpu/drm/drm_ioc32.c | 13 +++--
drivers/gpu/drm/drm_ioctl.c | 25 +
3 files changed, 31 i
From: Tvrtko Ursulin
With the typical model where the display server opends the file descriptor
and then hands it over to the client we were showing stale data in
debugfs.
Fix it by updating the drm_file->pid on ioctl access from a different
process.
The field is also made RCU protected to allo
Hi Maarten
On Wed, Nov 30, 2022 at 02:16:05PM +0100, Maarten Lankhorst wrote:
> A single fix to vmwgfx mks-guest-stats ioctl.
> I lost my internet connection when pushing the tag, so I put together this
> mail
> manually. I hope you remember where drm-misc is hosted. :)
For reference, you can ge
The list API provides the list_count_nodes() to help with counting
existing nodes in the list. Utilise it.
Acked-by: Mathias Nyman
Signed-off-by: Andy Shevchenko
---
v5: used renamed API (LKP)
v4: added tag (Mathias)
v3: no change
v2: no change
drivers/usb/host/xhci-ring.c | 7 ++-
1 file c
Some of the existing users, and definitely will be new ones, want to
count existing nodes in the list. Provide a generic API for that by
moving code from i915 to list.h.
Reviewed-by: Lucas De Marchi
Acked-by: Jani Nikula
Signed-off-by: Andy Shevchenko
---
v5: added tag (Lucas), renamed API to l
The list API provides the list_count_nodes() to help with counting
existing nodes in the list. Utilise it.
Signed-off-by: Andy Shevchenko
---
v5: used renamed API (LKP)
v4: no change
v3: fixed typo in the commit message (Fabio)
The list API provides the list_count_nodes() to help with counting
existing nodes in the list. Utilise it.
Signed-off-by: Andy Shevchenko
---
v5: used renamed API (LKP)
v4: no change
v3: no change
v2: no change
drivers/usb/gadget/udc/bcm63xx_udc.c | 11 +++
1 file changed, 3 insertions(+
On some SoCs (hello SM6115) vcca-supply is not wired to any smd-rpm
or rpmh regulator, but instead powered by the VDD_MX line, which is
voted for in the DSI ctrl node.
Signed-off-by: Konrad Dybcio
---
Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml | 1 -
1 file changed, 1 deleti
Hi all,
This series adds support for the RGB output block that can be found in the
Rockchip Video Output Processor (VOP) 2.
Patches 1-2 prepare the RGB part, which has been used only with the VOP(1)
so far.
Patch 3 is a cleanup patch and aims to make the creation and destruction of
the CRTCs and
The VOP2 driver has more than one video port, hence the hard-coded
port id will not work anymore. Add an extra parameter for the video
port id to the rockchip_rgb_init function.
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +-
drivers/gpu/drm/rockchip/rockchi
Let the function name vop2_create_crtcs reflect that the function creates
multiple CRTCS. Also, use a symmetric function pair to create and destroy
the CRTCs and the corresponding planes.
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 31 ++--
1
On Tue, Nov 29, 2022 at 12:02:42PM -0800, Rob Clark wrote:
> From: Rob Clark
>
> vm_open() is not allowed to fail. Fortunately we are guaranteed that
> the pages are already pinned, and only need to increment the refcnt. So
> just increment it directly.
Please mention hare that the only issue i
The Rockchip VOP2 features an internal RGB output block, which can be
attached to the video port 2 of the VOP2. Add support for this output
block.
Signed-off-by: Michael Riesch
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 21
1 file changed, 21 insertions(+)
diff --gi
The rk3568-pinctrl.dtsi only defines the 24-bit RGB interface. Add separate
nodes for the 16-bit and 18-bit version, respectively. While at it, split
off the clock/sync signals from the data signals.
The exact mapping of the data pins was discussed here:
https://lore.kernel.org/linux-rockchip/f33a
Commit 540b8f271e53 ("drm/rockchip: Embed drm_encoder into
rockchip_decoder") provides the means to pass the endpoint ID to the
VOP2 driver, which sets the interface MUX accordingly. However, this
step has not yet been carried out for the RGB output block. Embed the
drm_encoder structure into the r
On Wed, 30 Nov 2022 at 14:03, Tvrtko Ursulin
wrote:
> On 29/11/2022 18:05, Matthew Auld wrote:
> > On Fri, 25 Nov 2022 at 11:14, Tvrtko Ursulin
> > wrote:
> >>
> >>
> >> + Matt
> >>
> >> On 25/11/2022 10:21, Christian König wrote:
> >>> TTM is just wrapping core DMA functionality here, remove the
On Wed, 30 Nov 2022 at 14:43, Maxime Ripard wrote:
>
> Hi Maarten
>
> On Wed, Nov 30, 2022 at 02:16:05PM +0100, Maarten Lankhorst wrote:
> > A single fix to vmwgfx mks-guest-stats ioctl.
> > I lost my internet connection when pushing the tag, so I put together this
> > mail
> > manually. I hope y
On Wed, Nov 30, 2022 at 01:34:07PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> With the typical model where the display server opends the file descriptor
> and then hands it over to the client we were showing stale data in
> debugfs.
>
> Fix it by updating the drm_file->pid on ioctl
On Wed, Nov 30, 2022 at 7:54 AM Robin Murphy wrote:
>
> On 2022-11-29 17:11, Mikhail Krylov wrote:
> > On Tue, Nov 29, 2022 at 11:05:28AM -0500, Alex Deucher wrote:
> >> On Tue, Nov 29, 2022 at 10:59 AM Mikhail Krylov wrote:
> >>>
> >>> On Tue, Nov 29, 2022 at 09:44:19AM -0500, Alex Deucher wrote
On Tue, 29 Nov 2022 19:04:14 +0100, Uwe Kleine-König wrote:
> Compared to the txt description this adds clocks and clock-names to
> match reality.
>
> Note that fsl,imx-lcdc was picked as the new name as this is the actual
> hardware's name. There will be a new binding implementing the saner drm
+ Thierry Reding, linux-tegra, dri-devel
On Tue, Nov 29, 2022 at 04:43:29PM +0800, zys.zlj...@gmail.com wrote:
> From: Yushan Zhou
>
> Fix the following coccicheck warning:
> ./drivers/gpu/host1x/fence.c:97:2-7: WARNING:
> NULL check before some freeing functions is not needed.
>
> Signed-off-b
Hi,
On Tue, Nov 29, 2022 at 9:46 PM Qiqi Zhang wrote:
>
> Hi,
>
> on Nov. 29, 2022, 11:45 a.m. Tomi wrote:
> >On 29/11/2022 03:13, Doug Anderson wrote:
> >> Hi,
> >>
> >> On Fri, Nov 25, 2022 at 2:54 AM Qiqi Zhang
> >> wrote:
> >>>
> >>> According to the description in ti-sn65dsi86's datasheet:
On 30/11/2022 14:58, Konrad Dybcio wrote:
> On some SoCs (hello SM6115) vcca-supply is not wired to any smd-rpm
> or rpmh regulator, but instead powered by the VDD_MX line, which is
> voted for in the DSI ctrl node.
>
> Signed-off-by: Konrad Dybcio
Acked-by: Krzysztof Kozlowski
Best regards,
On 29/11/2022 21:46, Adam Skladowski wrote:
> Follow other YAMLs and replace mdss name.
That's really not explaining what you are doing here. Your commit msg
and subject suggest you rename mdss. But you don't. You touch only examples.
>
> Signed-off-by: Adam Skladowski
> ---
> .../devicetree/b
On 29/11/2022 21:46, Adam Skladowski wrote:
> Document compatible for tsens on Qualcomm SM6115 platform
> according to downstream dts it ship v2.4 of IP
>
> Signed-off-by: Adam Skladowski
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 29/11/2022 21:46, Adam Skladowski wrote:
> Add I2C/SPI nodes for SM6115.
>
> Signed-off-by: Adam Skladowski
> ---
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 287 +++
> 1 file changed, 287 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> b/arch/arm6
.get_state() can return an error indication. Make use of it to propagate
failing hardware accesses.
Signed-off-by: Uwe Kleine-König
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
b/drive
Hello,
I forgot about this series and was remembered when I talked to Conor
Dooley about how .get_state() should behave in an error case.
Compared to (implicit) v1, sent with Message-Id:
20220916151506.298488-1-u.kleine-koe...@pengutronix.de
I changed:
- Patch #1 which does the prototype chang
.get_state() might fail in some cases. To make it possible that a driver
signals such a failure change the prototype of .get_state() to return an
error code.
This patch was created using coccinelle and the following semantic patch:
@p1@
identifier getstatefunc;
identifier driver;
@@
struct pwm_o
On 11/28/22 06:30, Simon Ser wrote:
The PID is racy, the user-space daemon could end up killing an
unrelated process… Is there any way we could use a pidfd instead?
Is the PID race condition something that really happens or rather
something theoretical?
Anyway, I can't see how pidfd and ueve
On Wednesday, November 30th, 2022 at 16:23, André Almeida
wrote:
> On 11/28/22 06:30, Simon Ser wrote:
>
> > The PID is racy, the user-space daemon could end up killing an
> > unrelated process… Is there any way we could use a pidfd instead?
>
> Is the PID race condition something that really
On 2022-11-30 14:28, Alex Deucher wrote:
On Wed, Nov 30, 2022 at 7:54 AM Robin Murphy wrote:
On 2022-11-29 17:11, Mikhail Krylov wrote:
On Tue, Nov 29, 2022 at 11:05:28AM -0500, Alex Deucher wrote:
On Tue, Nov 29, 2022 at 10:59 AM Mikhail Krylov wrote:
On Tue, Nov 29, 2022 at 09:44:19AM -
On 28.11.2022 15:30, Matt Roper wrote:
> The kerneldoc function name was not updated when this function was
> converted to a non-fw form.
>
> Fixes: 192bb40f030a ("drm/i915/gt: Manage uncore->lock while waiting on MCR
> register")
> Reported-by: kernel test robot
> Signed-off-by: Matt Roper
Re
On 28.11.2022 15:30, Matt Roper wrote:
> Passing the GT rather than uncore to the lowest level MCR read and write
> functions will make it easier to introduce dedicated MCR locking in a
> following patch.
>
> Signed-off-by: Matt Roper
Reviewed-by: Balasubramani Vivekanandan
Regards,
Bala
> --
On 28.11.2022 15:30, Matt Roper wrote:
> We've been overloading uncore->lock to protect access to the MCR
> steering register. That's not really what uncore->lock is intended for,
> and it would be better if we didn't need to hold such a high-traffic
> spinlock for the whole sequence of (apply ste
On 28.11.2022 15:30, Matt Roper wrote:
> PPAT setup involves a series of multicast writes. This can be optimized
> slightly be acquiring forcewake and the steering lock just once for the
> entire sequence.
>
> Suggested-by: Balasubramani Vivekanandan
>
> Signed-off-by: Matt Roper
> ---
> driv
PPAT setup involves a series of multicast writes. This can be optimized
slightly be acquiring forcewake and the steering lock just once for the
entire sequence.
v2:
- We should use FW_REG_WRITE instead of FW_REG_READ. (Bala)
Suggested-by: Balasubramani Vivekanandan
Signed-off-by: Matt Roper
On Wed, Nov 30, 2022 at 09:21:07PM +0530, Balasubramani Vivekanandan wrote:
> On 28.11.2022 15:30, Matt Roper wrote:
> > PPAT setup involves a series of multicast writes. This can be optimized
> > slightly be acquiring forcewake and the steering lock just once for the
> > entire sequence.
> >
> >
On Wed, Nov 30, 2022 at 10:42 AM Robin Murphy wrote:
>
> On 2022-11-30 14:28, Alex Deucher wrote:
> > On Wed, Nov 30, 2022 at 7:54 AM Robin Murphy wrote:
> >>
> >> On 2022-11-29 17:11, Mikhail Krylov wrote:
> >>> On Tue, Nov 29, 2022 at 11:05:28AM -0500, Alex Deucher wrote:
> On Tue, Nov 29,
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 700e0cd3a5ce6a2cb90d9a2aab729b52f092a7d6 Add linux-next specific
files for 20221130
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202211090634.ryfkk0ws-...@intel.com
https
As per the performance tuning guide, set the HOSTCACHEEN bit to
implement the recommended caching policy on PVC.
Signed-off-by: Wayne Boyer
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
drivers/gpu/drm/i915/gt/intel_workarounds.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/dri
Like the ASUS T100HAN for which there is already a quirk,
the DynaBook K50 has a 800x1280 portrait screen mounted
in the tablet part of a landscape oriented 2-in-1.
Update the quirk to be more generic and apply to this device.
Signed-off-by: Allen Ballway
---
.../gpu/drm/drm_panel_orientation_q
On 11/29/2022 3:48 PM, Teres Alexis, Alan Previn wrote:
Besides the nit below, just would like to echo the same thing Nikula said about
not including the type definition in the
main uc header (which i know can be a bit more work especially if we go with
allocation of the structure at init ti
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