On 29.11.2022 21:46, Adam Skladowski wrote:
> Add GPI DMA node which will be wired to i2c/spi/uart.
> 
> Signed-off-by: Adam Skladowski <a39....@gmail.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dyb...@linaro.org>

Konrad
>  arch/arm64/boot/dts/qcom/sm6115.dtsi | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi 
> b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> index b459f1746a7f..e9de7aa1efdd 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> @@ -673,6 +673,26 @@ ufs_mem_phy_lanes: phy@4807400 {
>                       };
>               };
>  
> +             gpi_dma0: dma-controller@4a00000 {
> +                     compatible = "qcom,sm6115-gpi-dma", 
> "qcom,sm6350-gpi-dma";
> +                     reg = <0x04a00000 0x60000>;
> +                     interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
> +                                  <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
> +                                  <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
> +                                  <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
> +                                  <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
> +                                  <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
> +                                  <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
> +                                  <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
> +                                  <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
> +                                  <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
> +                     dma-channels =  <10>;
> +                     dma-channel-mask = <0xf>;
> +                     iommus = <&apps_smmu 0xf6 0x0>;
> +                     #dma-cells = <3>;
> +                     status = "disabled";
> +             };
> +
>               usb_1: usb@4ef8800 {
>                       compatible = "qcom,sm6115-dwc3", "qcom,dwc3";
>                       reg = <0x04ef8800 0x400>;

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