Hi
Am 19.09.22 um 17:25 schrieb Jocelyn Falempe:
On 15/09/2022 17:03, Thomas Zimmermann wrote:
G200ER does not seem to support 24 bpp, so force the console to
use 32 bpp. The problem was introduced, when commit 73f54d5d9682
("drm/mgag200: Remove special case for G200SE with <2 MiB") changed
the
Hi all,
I discovered a bug in either imx_i2c or fsl-edma on the LS1046A where no
data is read in i2c_imx_dma_read except for the last two bytes (which
are not read using DMA). This is perhaps best illustrated with the
following example:
# hexdump -C /sys/bus/nvmem/devices/0-00540/nvmem
[ 308.91
On 9/19/22 6:40 PM, Leo Li wrote:
>
>
>> -Original Message-
>> From: Sean Anderson
>> Sent: Monday, September 19, 2022 5:24 PM
>> To: Oleksij Rempel ; Pengutronix Kernel Team
>> ; linux-...@vger.kernel.org; linux-arm-kernel
>> ; Vinod Koul ;
>> dmaeng...@vger.kernel.org
>> Cc: Sumit S
Fix two warnings during doc build which also results in corresponding
additions in generated docs
Warnings Fixed:
1. include/drm/gpu_scheduler.h:462: warning: Function parameter or member
'dev' not described in 'drm_gpu_scheduler'
2. drivers/gpu/drm/scheduler/sched_main.c:1005: warning: Functio
the correct prefix is "drm/amdgpu: "
Got it, and I would notice that point at the next letter.
在 2022/9/19 15:44, Christian König 写道:
Am 19.09.22 um 03:41 schrieb Zeng Heng:
Fix below compile warning when open enum-conversion
option check (compiled with -Wenum-conversion):
drivers/gpu/dr
On 19/09/2022 23:18, Bjorn Andersson wrote:
> On Sat, Sep 17, 2022 at 06:03:27PM +0100, Krzysztof Kozlowski wrote:
>> On 16/09/2022 21:00, Bjorn Andersson wrote:
>>> From: Bjorn Andersson
>>>
>>> Add compatibles for the DisplayPort and Embedded DisplayPort blocks in
>>> Qualcomm SDM845 and SC8280X
As an integrated GPU, MTL does not have local memory and
HAS_LMEM() returns false. However the platform's stolen memory
is presented via BAR2 (i.e., the BAR we traditionally consider
to be the LMEM BAR) and should be managed by the driver the same
way that local memory is on dgpu platforms (which
syzbot reported use-after-free for drm_gem_object [1]. This causes
the call trace like below:
[ 75.327400][ T5723] Call Trace:
[ 75.327611][ T5723]
[ 75.327803][ T5723] drm_gem_object_handle_put_unlocked+0x11e/0x1a0
[ 75.328209][ T5723] drm_gem_object_release_handle+0x5d/0x70
[ 75.3
Am 19.09.22 um 12:30 schrieb Jiapeng Chong:
drivers/gpu/drm/drm_atomic_helper.c:802: warning: expecting prototype for
drm_atomic_helper_check_wb_connector_state(). Prototype was for
drm_atomic_helper_check_wb_encoder_state() instead.
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2216
On Fri, 16 Sep 2022 19:33:27 +0300
Ville Syrjala wrote:
> From: Ville Syrjälä
>
> I've talked about making blocking commits lockless a few
> times in the past, so here's finally an attempt at it.
> The main benefit I see from this is that TEST_ONLY commits
> no longer getting blocked on the mut
On Tue, 20 Sep 2022, Aravind Iddamsetty wrote:
> As an integrated GPU, MTL does not have local memory and
> HAS_LMEM() returns false. However the platform's stolen memory
> is presented via BAR2 (i.e., the BAR we traditionally consider
> to be the LMEM BAR) and should be managed by the driver the
On Mon, 2022-09-19 at 18:56 +0200, Guillaume Ranquet wrote:
> Add basic support for the mediatek hdmi phy on MT8195 SoC
>
> Signed-off-by: Guillaume Ranquet
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> b/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> index bb7593ea4c86..0157acdce5
Hi
Am 15.09.22 um 16:41 schrieb Wang Yugui:
Hi,
Hi
Am 14.09.22 um 16:58 schrieb Wang Yugui:
[...]
24-bit works on my G200HE and G200 test machines. Maybe the G200ER has a bug.
When I try 16-bit depth, the display works, but is way too dark. No fiddling
with the LUT tables fixes this. It's
On Mon, 19 Sep 2022, "Dixit, Ashutosh" wrote:
> On Mon, 19 Sep 2022 05:13:18 -0700, Jani Nikula wrote:
>>
>> On Mon, 19 Sep 2022, Badal Nilawar wrote:
>> > For MTL SAMedia updated relevant functions and places in the code to get
>> > Media C6 residency.
>> >
>> > v2: Fixed review comments (Ashuto
From: Mikko Perttunen
v3:
* Updated patch 3 based on comments
v2:
* Updated patches 1,3 based on comments
* Added Acked-by to patch 2
Original message:
Hi all,
this series adds support for the HW video decoder, NVDEC,
on Tegra234 (Orin). The main change is a switch from Falcon
to RISC-V for t
From: Mikko Perttunen
Add a device tree node for NVDEC on Tegra234.
Booting the firmware requires some information regarding offsets
within the firmware binary. These are passed through the device
tree, but since the values vary depending on the firmware version,
and the firmware itself is not a
From: Mikko Perttunen
Add entries for NVDEC to the Tegra234 SID table.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/dev.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index 0cd3f97e7e49..d6b4614f968f 100644
--- a
From: Mikko Perttunen
Update NVDEC bindings for Tegra234. This new engine version only has
two memory clients, but now requires three clocks, and as a bigger
change the engine loads firmware from a secure carveout configured by
the bootloader.
For the latter, we need to add a phandle to the memo
From: Mikko Perttunen
Add support for the Tegra234 version of NVDEC to the NVDEC driver.
This version sports a RISC-V controller and requires a few additional
clocks. After firmware has been loaded, the behavior is, however,
backwards compatible.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/
From: Mikko Perttunen
Add clock, memory controller, powergate and reset dt-binding headers
necessary for NVDEC.
Signed-off-by: Mikko Perttunen
Acked-by: Krzysztof Kozlowski
---
include/dt-bindings/clock/tegra234-clock.h | 4
include/dt-bindings/memory/tegra234-mc.h | 3 +++
inc
From: Mikko Perttunen
Add helper code for booting RISC-V based engines where firmware is
located in a carveout.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/Makefile | 3 +-
drivers/gpu/drm/tegra/riscv.c | 106 +
drivers/gpu/drm/tegra/riscv.h |
From: Mikko Perttunen
On Tegra234 NVDEC firmware is loaded from a secure carveout, where it
has been loaded by a bootloader. When booting NVDEC, we need to tell it
the address of this firmware, which we can determine by checking the
starting address of the carveout. As such, add an MC API to quer
From: Mikko Perttunen
NVDEC on Tegra234 requires multiple clocks. Add support for that.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/nvdec.c | 31 +--
1 file changed, 21 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/tegra/nvdec.c b/drivers
On 9/19/2022 5:29 PM, Gupta, Anshuman wrote:
-Original Message-
From: Das, Nirmoy
Sent: Monday, September 19, 2022 8:33 PM
To: intel-...@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org; Auld, Matthew
; Gupta, Anshuman
Subject: [PATCH] drm/i915: Do not dereference NULL bo->
Hi,
On 20/09/2022 08:16, cgel@gmail.com wrote:
From: Minghao Chi
The implementation of strscpy() is more robust and safer.
That's now the recommended way to copy NUL terminated strings.
Signed-off-by: Minghao Chi
---
v1->v2
using DRIVER_NAME instead of "DW-HDMI".
drivers/gpu/drm/bridg
On 19/09/2022 05:04, cgel@gmail.com wrote:
From: Minghao Chi
The implementation of strscpy() is more robust and safer.
That's now the recommended way to copy NUL terminated strings.
Reported-by: Zeal Robot
Signed-off-by: Minghao Chi
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audi
On Sun, Aug 28, 2022 at 09:09:20PM -0300, Isabella Basso wrote:
> As the DRM selftests are now using KUnit [1], update IGT tests as well.
>
> [1] - https://lore.kernel.org/all/20220708203052.236290-1-maira.ca...@usp.br/
>
> Signed-off-by: Isabella Basso
> ---
> tests/drm_buddy.c| 7 ---
For EDID, please refer to the attachment on the link.
https://gitlab.freedesktop.org/drm/intel/-/issues/6153#note_1558419
Regards
William
-Original Message-
From: Jani Nikula
Sent: Tuesday, September 20, 2022 2:49 PM
To: Tseng, William ; dri-devel@lists.freedesktop.org
Cc: Tseng, Willi
On Tue, Sep 20, 2022 at 12:49:40PM +0530, Aravind Iddamsetty wrote:
As an integrated GPU, MTL does not have local memory and
HAS_LMEM() returns false. However the platform's stolen memory
is presented via BAR2 (i.e., the BAR we traditionally consider
to be the LMEM BAR) and should be managed by
Hi
Am 16.09.22 um 10:50 schrieb Jammy Huang:
Add 1152x864 into support list.
Signed-off-by: Jammy Huang
Applied to drm-misc-next. Thanks!
Best regards
Thomas
---
v2 changes:
- add check in mode_valid
---
drivers/gpu/drm/ast/ast_mode.c | 9 +
drivers/gpu/drm/ast/ast_tables.h
Hi
Am 16.09.22 um 11:17 schrieb Jammy Huang:
Some cases are not handled well for ast2600.
Signed-off-by: Jammy Huang
---
drivers/gpu/drm/ast/ast_mode.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mod
On Mon, 2022-09-05 at 06:30:55 UTC, Dmitry Torokhov wrote:
> I would like to stop exporting OF-specific devm_gpiod_get_from_of_node()
> so that gpiolib can be cleaned a bit, so let's switch to the generic
> fwnode property API.
>
> Signed-off-by: Dmitry Torokhov
Applied to https://git.kernel.org
Hi Thomas,
On 2022/9/20 下午 04:43, Thomas Zimmermann wrote:
Hi
Am 16.09.22 um 11:17 schrieb Jammy Huang:
Some cases are not handled well for ast2600.
Signed-off-by: Jammy Huang
---
drivers/gpu/drm/ast/ast_mode.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a
No need to define new macros to generate bits, mask and bitfield, use
common ones instead, e.g. BIT, GENMASK and FIELD_PREP etc.
Due to common register access helpers are defined for MediaTek's phy
drivers, the similar helpers defined by ufs, hdmi and mipi phy drivers
can be removed.
Chunfeng Yun
Due to FIELD_PREP() macro can be used to prepare a bitfield value,
local ones can be remove; add the new helper to make bitfield update
easier.
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-io.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/phy/mediatek/phy-mt
Use MediaTek phy's common helper to access registers, then we can remove
hdmi's I/O helpers.
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c | 140 ++---
1 file changed, 65 insertions(+), 75 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-hdmi-m
The new helper will use FIELD_PREP() macro to prepare bits value
according to mask, then we no need do it anymore.
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-pcie.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mt
Use FIELD_PREP() macro to prepare bits field value, then no need define
macros of bits offset.
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-mipi-dsi-
Use GENMASK() macro to generate bits mask
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c | 88 +++---
1 file changed, 44 insertions(+), 44 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c
b/drivers/phy/mediatek/phy-mtk-hdmi-mt8173
Use GENMASK() macro to generate bits mask
Signed-off-by: Chunfeng Yun
---
.../phy/mediatek/phy-mtk-mipi-dsi-mt8173.c| 53 ++-
1 file changed, 29 insertions(+), 24 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c
b/drivers/phy/mediatek/phy-mtk-mipi-ds
Prefer to make use of FIELD_PREP() macro to prepare bitfield value,
then no need local ones anymore.
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-xsphy.c | 46 ++--
1 file changed, 17 insertions(+), 29 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mt
Use GENMASK() and BIT() macros to generate mask and bits
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c | 56 +++---
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c
b/drivers/phy/mediatek/phy-
Prefer to make use of FIELD_PREP() macro to prepare bitfield value,
then no need local ones anymore.
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-tphy.c | 193 ++--
1 file changed, 67 insertions(+), 126 deletions(-)
diff --git a/drivers/phy/mediatek/phy-m
Use GENMASK() macro to generate bits mask
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c
b/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c
inde
Use MediaTek phy's common helper to access registers, then we can remove
mipi-dsi's I/O helpers.
Signed-off-by: Chunfeng Yun
---
.../phy/mediatek/phy-mtk-mipi-dsi-mt8173.c| 117 --
1 file changed, 55 insertions(+), 62 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-mi
Use FIELD_PREP() macro to prepare bits field value, then no need define
macros of bits offset.
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c | 60 --
1 file changed, 21 insertions(+), 39 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-hdmi
Use FIELD_PREP() macro to prepare bits field value, then no need define
macros of bits offset.
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c | 70 --
1 file changed, 26 insertions(+), 44 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-hdmi
Use MediaTek phy's common helper to access registers, then we can remove
mipi-dsi's I/O helpers.
Signed-off-by: Chunfeng Yun
---
.../phy/mediatek/phy-mtk-mipi-dsi-mt8183.c| 68 +--
1 file changed, 34 insertions(+), 34 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-mi
Hi,
> Hi
>
> Am 15.09.22 um 16:41 schrieb Wang Yugui:
> > Hi,
> >
> >> Hi
> >>
> >> Am 14.09.22 um 16:58 schrieb Wang Yugui:
> >> [...]
> 24-bit works on my G200HE and G200 test machines. Maybe the G200ER has a
> bug.
>
> When I try 16-bit depth, the display works, but is way
Remove private register access helpers, use the common ones instead.
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-hdmi.c | 33 -
drivers/phy/mediatek/phy-mtk-hdmi.h | 7 --
2 files changed, 40 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mt
Use MediaTek phy's common helper to access registers, then we can remove
hdmi's I/O helpers.
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c | 146 ++---
1 file changed, 71 insertions(+), 75 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-hdmi-m
No need define private register access helpers, use common ones defined
in phy-mtk-io.h
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-ufs.c | 78 +++---
1 file changed, 28 insertions(+), 50 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-ufs.c
b/dr
Remove private register access helpers, use the common ones instead.
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/phy-mtk-mipi-dsi.c | 24
drivers/phy/mediatek/phy-mtk-mipi-dsi.h | 5 -
2 files changed, 29 deletions(-)
diff --git a/drivers/phy/mediatek/phy-
On Tue, Sep 13, 2022 at 10:53:10AM +0200, Johan Hovold wrote:
> The MSM DRM driver is currently broken in multiple ways with respect to
> probe deferral. Not only does the driver currently fail to probe again
> after a late deferral, but due to a related use-after-free bug this also
> triggers NULL
Hi,
On Mon, 19 Sep 2022 03:04:01 +, cgel@gmail.com wrote:
> From: Minghao Chi
>
> The implementation of strscpy() is more robust and safer.
>
> That's now the recommended way to copy NUL terminated strings.
>
>
> [...]
Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-mi
On 2022-09-19 23:24, Sean Anderson wrote:
Hi all,
I discovered a bug in either imx_i2c or fsl-edma on the LS1046A where no
data is read in i2c_imx_dma_read except for the last two bytes (which
are not read using DMA). This is perhaps best illustrated with the
following example:
# hexdump -C /sy
Il 19/09/22 18:56, Guillaume Ranquet ha scritto:
To prepare support for newer chips that need to share their address
range with a dedicated ddc driver, move to a syscon.
Signed-off-by: Guillaume Ranquet
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c
b/drivers/gpu/drm/mediatek/mtk_hdmi.c
ind
Il 19/09/22 18:56, Guillaume Ranquet ha scritto:
In order to share register with a dedicated ddc driver, set the hdmi
compatible to syscon.
Signed-off-by: Guillaume Ranquet
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml
b/Documentation/devicetree/bindings/
Il 19/09/22 18:56, Guillaume Ranquet ha scritto:
Create a common "framework" that can be used to add support for
different hdmi IPs within the mediatek range of products.
Signed-off-by: Guillaume Ranquet
diff --git a/drivers/gpu/drm/mediatek/Makefile
b/drivers/gpu/drm/mediatek/Makefile
index
Il 19/09/22 18:56, Guillaume Ranquet ha scritto:
Add a flag to indicate support for cec.
Signed-off-by: Guillaume Ranquet
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c
b/drivers/gpu/drm/mediatek/mtk_hdmi_common.c
index bfcca6f8b839..86653ebaacfd 100644
--- a/drivers/gpu/drm/mediatek
This got lost somewhere along the way, This fixes
audio not working until set_property was called.
Signed-off-by: hongao
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
index e4054e10a2c2..5d2e3328dd83 100644
--- a/drivers/gpu/drm/amd
Il 19/09/22 18:56, Guillaume Ranquet ha scritto:
Add a flag to indicate support for an external connector
Signed-off-by: Guillaume Ranquet
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c
b/drivers/gpu/drm/mediatek/mtk_hdmi_common.c
index 86653ebaacfd..30407603d693 100644
--- a/drivers
Hi,
On Fri, Aug 19, 2022 at 10:09:28PM +0200, Karol Herbst wrote:
> It is a bit unlcear to us why that's helping, but it does and unbreaks
> suspend/resume on a lot of GPUs without any known drawbacks.
>
> Cc: sta...@vger.kernel.org # v5.15+
> Closes: https://gitlab.freedesktop.org/drm/nouveau/-/
This patch series aims to support the MIPI DSI encoder found in the RZ/G2L
SoC. It currently supports DSI video mode only.
This unit supports MIPI Alliance Specification for Display Serial Interface
(DSI)
Specification. This unit provides a solution for transmitting MIPI DSI compliant
digital vid
The RZ/G2L MIPI DSI TX is embedded in the Renesas RZ/G2L family SoC's. It
can operate in DSI mode, with up to four data lanes.
Signed-off-by: Biju Das
Reviewed-by: Rob Herring
Reviewed-by: Laurent Pinchart
Reviewed-by: Geert Uytterhoeven
---
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
This driver supports the MIPI DSI encoder found in the RZ/G2L
SoC. It currently supports DSI video mode only.
Signed-off-by: Biju Das
Acked-by: Sam Ravnborg
Reviewed-by: Laurent Pinchart
---
v7->v8:
* Added Rb tag from Laurent.
* Added hsfreq_max to struct rzg2l_mipi_dsi_timings.
* Removed e
Enhance device lanes check by reading TXSETR register at probe(),
and enforced in rzg2l_mipi_dsi_host_attach().
As per HW manual, we can read TXSETR register only after
DPHY initialization.
Suggested-by: Laurent Pinchart
Signed-off-by: Biju Das
---
v8:
* New patch.
---
drivers/gpu/drm/rcar-du
Il 19/09/22 18:56, Guillaume Ranquet ha scritto:
Adds hdmi and hdmi-ddc support for mt8195.
Signed-off-by: Guillaume Ranquet
diff --git a/drivers/gpu/drm/mediatek/Makefile
b/drivers/gpu/drm/mediatek/Makefile
index 008ec69da67b..f1ef6c8ae2b8 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b
Il 19/09/22 18:56, Guillaume Ranquet ha scritto:
Add HDMI audio support for mt8195
Signed-off-by: Guillaume Ranquet
diff --git a/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
b/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
index 39e07a6dd490..bb7593ea4c86 100644
--- a/drivers/gpu/drm/mediatek/mtk_m
On Tue, Sep 20, 2022 at 12:42 PM Salvatore Bonaccorso wrote:
>
> Hi,
>
> On Fri, Aug 19, 2022 at 10:09:28PM +0200, Karol Herbst wrote:
> > It is a bit unlcear to us why that's helping, but it does and unbreaks
> > suspend/resume on a lot of GPUs without any known drawbacks.
> >
> > Cc: sta...@vger
Il 19/09/22 18:56, Guillaume Ranquet ha scritto:
Some phys, such as mt8195, needs to have a configure callback defined.
Signed-off-by: Guillaume Ranquet
Reviewed-by: AngeloGioacchino Del Regno
Hi All,
The builds of arm64 allmodconfig with clang failed to build next-20220920
with the error:
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:1190:3: error: variable 'r' is
uninitialized when used here [-Werror,-Wuninitialized]
r |= !amdgpu_ttm_tt_get_user_pages_done(b
On 19.09.2022 15:03, Neil Armstrong wrote:
> On 19/09/2022 03:09, Adrián Larumbe wrote:
> > drm bridges added by meson_encoder_hdmi_init and meson_encoder_cvbs_init
> > were not manually removed at module unload time, which caused dangling
> > references to freed memory to remain linked in the glob
Hi,
On Tue, Sep 20, 2022 at 01:36:32PM +0200, Karol Herbst wrote:
> On Tue, Sep 20, 2022 at 12:42 PM Salvatore Bonaccorso
> wrote:
> >
> > Hi,
> >
> > On Fri, Aug 19, 2022 at 10:09:28PM +0200, Karol Herbst wrote:
> > > It is a bit unlcear to us why that's helping, but it does and unbreaks
> > >
Thanks for pointing this out! It's indeed quite a bug.
Going to send a patch ASAP.
Regards,
Christian.
Am 20.09.22 um 13:47 schrieb Sudip Mukherjee:
Hi All,
The builds of arm64 allmodconfig with clang failed to build next-20220920
with the error:
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
Il 19/09/22 18:56, Guillaume Ranquet ha scritto:
Add basic support for the mediatek hdmi phy on MT8195 SoC
Signed-off-by: Guillaume Ranquet
diff --git a/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
b/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
index bb7593ea4c86..0157acdce56c 100644
--- a/driver
Il 19/09/22 18:56, Guillaume Ranquet ha scritto:
Add the DPI1 hdmi path support in mtk dpi driver
Signed-off-by: Guillaume Ranquet
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
b/drivers/gpu/drm/mediatek/mtk_dpi.c
index 630a4e301ef6..91212b7610e8 100644
--- a/drivers/gpu/drm/mediatek/mtk_dp
Am 20.09.22 um 14:22 schrieb Tommaso Merciai:
The builds of arm64 allmodconfig with clang failed to build
next-20220920 with the following result:
1190:3: error: variable 'r' is uninitialized when used here
[-Werror,-Wuninitialized]
note: initialize the variable 'r' to
Hi,
Those patches used to be part of a larger clock fixes series:
https://lore.kernel.org/linux-clk/20220715160014.2623107-1-max...@cerno.tech/
However, that series doesn't seem to be getting anywhere, so I've split out
these patches that fix a regression that has been there since 5.18 and that
p
We'll need the clock IDs in more drivers than just the clock driver from
now on, so let's move them in the firmware header.
Signed-off-by: Maxime Ripard
diff --git a/drivers/clk/bcm/clk-raspberrypi.c
b/drivers/clk/bcm/clk-raspberrypi.c
index 876b37b8683c..1f5e6a1554e6 100644
--- a/drivers/clk/b
The firmware allows to query for its clocks the operating range of a
given clock. We'll need this for some drivers (KMS, in particular) to
infer the state of some configuration options, so let's create a
function to do so.
Signed-off-by: Maxime Ripard
diff --git a/drivers/firmware/raspberrypi.c
In order to support higher HDMI frequencies, users have to set the
hdmi_enable_4kp60 parameter in their config.txt file.
This will have the side-effect of raising the maximum of the core clock,
tied to the HVS, and managed by the HVS driver.
However, we are querying this in the HDMI driver by pok
From: Dom Cobley
At least the 4096x2160@60Hz mode requires some overclocking that isn't
available by default, even if hdmi_enable_4kp60 is enabled.
Let's add some logic to detect whether we can satisfy the core clock
requirements for that mode, and prevent it from being used otherwise.
Signed-o
In order to support higher HDMI frequencies, users have to set the
hdmi_enable_4kp60 parameter in their config.txt file.
We were detecting this so far by calling clk_round_rate() on the core
clock with the frequency we're supposed to run at when one of those
modes is enabled. Whether or not the pa
Following the clock rate range improvements to the clock framework,
trying to set a disjoint range on a clock will now result in an error.
Thus, we can't set a minimum rate higher than the maximum reported by
the firmware, or clk_set_min_rate() will fail.
Thus we need to clamp the rate we are abo
A significant number of RaspberryPi drivers using the firmware don't
have a phandle to it, so end up scanning the device tree to find a node
with the firmware compatible.
That code is duplicated everywhere, so let's introduce a helper instead.
Signed-off-by: Maxime Ripard
diff --git a/drivers/f
On 20/09/2022 13:49, Adrián Larumbe wrote:
On 19.09.2022 15:03, Neil Armstrong wrote:
On 19/09/2022 03:09, Adrián Larumbe wrote:
drm bridges added by meson_encoder_hdmi_init and meson_encoder_cvbs_init
were not manually removed at module unload time, which caused dangling
references to freed me
Am 20.09.22 um 14:32 schrieb Tommaso Merciai:
Hi Christian,
On Tue, Sep 20, 2022 at 02:23:58PM +0200, Christian König wrote:
Am 20.09.22 um 14:22 schrieb Tommaso Merciai:
The builds of arm64 allmodconfig with clang failed to build
next-20220920 with the following result:
1190:3: error
On 19/09/2022 07:44, Adrián Larumbe wrote:
> Hi Steven,
>
> On 13.09.2022 09:45, Steven Price wrote:
>> On 12/09/2022 17:44, Adrián Larumbe wrote:
>>> Building Mesa's Perfetto requires including the panfrost drm uAPI header in
>>> C++ code, but the C++ compiler requires anonymous unions to have on
DRM Drivers can minimize a plane update by looking at damage clipping
information provided by userspace. So far, not having damage information
starts a full-plane update. Improve the heuristics for detecting partial
and full-plane updates by looking at the various state variables of a
plane update.
Always do a full plane update when userspace sends a DIRTYFB ioctl
without damage information. Userspace not changing the framebuffer
or marking changed regions can easily be interpreted as if there was
no change at all. Therefore set the new fb_dirty flag on all plane's
with a dirty framebuffer an
Rename several variables in the damage-helper code to better reflect
the use of old and new state. No functional changes.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_damage_helper.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/
In the case of a legacy cursor update, only update the cursor plane. Keep
other planes clear from changes. Setting the 'partial_update' flag when
these planes don't have damage-clipping areas acts as if no update will
be performed.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_damage_
Introduce a distinct flag fb_damage_partial_update in plane state to
signal the option for a partial plane update. Replaces the semantics
of having no damaged areas to trigger a full update. Decoupling the
existence of damage clipping from partial plane updates will allow to
sometimes avoid plane u
Set partial updates on a plane if the framebuffer has not been changed
on an atomic commit. If such a plane has damage clips, the driver will
use them; otherwise the update is effectively empty. Planes that change
their framebuffer still perform a full update.
This heuristic optimizes the case of
For previous MediaTek SoCs, such as MT8173, there are 2 display HW
pipelines binding to 1 mmsys with the same power domain, the same
clock driver and the same mediatek-drm driver.
For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding to
2 different power domains, different clock drive
After mmsys and drm change DITHER enum to DDP_COMPONENT_DITHER0,
mmsys header can remove the useless DDP_COMPONENT_DITHER enum.
Signed-off-by: Jason-JH.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Rex-BC Chen
Acked-by: Matthias Brugger
---
include/linux/soc/mediatek/mtk-mmsys.h |
For previous MediaTek SoCs, such as MT8173, there are 2 display HW
pipelines binding to 1 mmsys with the same power domain, the same
clock driver and the same mediatek-drm driver.
For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding to
2 different power domains, different clock drive
This reverts commit b804923b7ccb9c9629703364e927b48cd02a9254.
Due to the compatible changing of mt8195 from "mediatek,mt8195-mmsys"
to "mediatek,mt8195-vdosys0", we have to revert this patch and send a
new patch with the new compatible.
Signed-off-by: Jason-JH.Lin
---
drivers/soc/mediatek/mt819
Add driver data of mt8195 vdosys0 to mediatek-drm and the sub driver.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 28
2 files changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/media
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