Hi
Am 11.09.22 um 18:21 schrieb Saurabh Singh Sengar:
On Sat, Sep 10, 2022 at 08:11:24PM +0200, Thomas Zimmermann wrote:
Hi
Am 09.09.22 um 16:43 schrieb Saurabh Sengar:
hyperv_setup_vram tries to remove conflicting framebuffer based on
'screen_info'. As observed in past due to some bug or wro
Hi,
I've meanwhile merged the patchset, including the one updated patch and
the missing r-b.
Best regards
Thomas
Am 08.09.22 um 11:51 schrieb Takashi Iwai:
Hi,
this is another respin of patch set for cleaning up and fixes for UDL
driver [*]. It covers the PM problems, regressions in the p
Quoting Joonas Lahtinen (2022-08-26 09:23:08)
> Quoting John Harrison (2022-08-25 19:31:39)
> > On 8/25/2022 00:15, Joonas Lahtinen wrote:
> > > Quoting John Harrison (2022-08-24 21:45:09)
> > >> We also don't want to tie the GuC logging buffer size to the DRM
> > >> debugging output. Enabling kern
On Sat, 10 Sep 2022, Hamza Mahfooz wrote:
> As made mention of in commit 9f0ac028410f ("drm/print: rename drm_debug
> to __drm_debug to discourage use"), we shouldn't explicitly refer to
> __drm_debug in this context. So, use drm_debug_enabled() instead.
>
> Fixes: b5c84a9edcd4 ("drm/bridge: add i
On 09.09.2022 12:59, Gwan-gyeong Mun wrote:
From: Kees Cook
When the check_[op]_overflow() helpers were introduced, all arguments were
required to be the same type to make the fallback macros simpler. However,
now that the fallback macros have been removed[1], it is fine to allow
mixed types
On Fri, 09 Sep 2022, "Aurélien" wrote:
> But since this display is independent from the GPU i didn't want to
> link both code.
If it's eDP and uses some proprietary DPCD brightness control mechanism,
I think in practice it usually is somewhat dependent on the GPU.
(OTOH I realize you don't menti
Am 09.09.22 um 19:08 schrieb Arvind Yadav:
Here's enabling software signaling on fence because
amdgpu_ctx_add_fence() is checking the status of fence
and emits warning.
Signed-off-by: Arvind Yadav
---
Changes in v1, v2: This new patch was not part of previous series.
---
drivers/gpu/drm/amd
On Tue, 06 Sep 2022, Jani Nikula wrote:
> We'll need to have a clean baseline to apply the patches on, i.e.
> drm-misc-next pull request to drm-next, and drm-next backmerge to
> drm-intel-next.
Stan, this is now done, drm-intel-next has the baseline for your
changes.
Please re-send the series, C
Am 09.09.22 um 19:08 schrieb Arvind Yadav:
Fence signaling must be enabled to make sure that
the dma_fence_is_signaled() function ever returns true.
Since drivers and implementations sometimes mess this up,
this ensures correct behaviour when DEBUG_WW_MUTEX_SLOWPATH
is used during debugging.
This
On 10.09.2022 01:18, Lucas De Marchi wrote:
Check for media IP version instead of graphics since this is figuring
out the media engines' configuration. Currently the only platform with
non-matching graphics/media version is Meteor Lake: update the check in
gen11_vdbox_has_sfc() so it considers no
Hi,
On 29/04/2022 21:51, Dmitry Baryshkov wrote:
From all the drivers using drm_bridge_connector only iMX/dcss and OMAP
DRM driver do a proper work of calling
drm_bridge_connector_en/disable_hpd() in right places. Rather than
teaching each and every driver how to properly handle
drm_bridge_conn
On 29/04/2022 21:51, Dmitry Baryshkov wrote:
Now as all drivers stopped calling drm_bridge_connector_enable_hpd() and
drm_bridge_connector_disable_hpd() it is safe to remove them complelely.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/drm_bridge_connector.c | 25 --
On 10.09.2022 01:18, Lucas De Marchi wrote:
Just like is done for compute and copy engines, extract a function to
handle media engines. While at it, be consistent on using or not the
uncore/gt/info variable aliases.
Reviewed-by: Matt Roper
Signed-off-by: Lucas De Marchi
diff --git a/drivers/g
While working on a drm driver that doesn't need the i2c algobit stuff I
noticed that DRM selects this code even tough only 8 drivers actually use
it. While also only some drivers use i2c, keep the select for I2C for the
next cleanup patch. Still prepare this already by also selecting I2C for
the in
On Mon, 12 Sept 2022 at 11:51, Tomi Valkeinen
wrote:
>
> Hi,
>
> On 29/04/2022 21:51, Dmitry Baryshkov wrote:
> > From all the drivers using drm_bridge_connector only iMX/dcss and OMAP
> > DRM driver do a proper work of calling
> > drm_bridge_connector_en/disable_hpd() in right places. Rather tha
On 11/09/2022 13.04, Andi Shyti wrote:
> Hi Gwan-gyeong,
>
> On Fri, Sep 09, 2022 at 07:59:07PM +0900, Gwan-gyeong Mun wrote:
>> It adds assert_type and assert_typable macros to catch type mis-match while
>
> /Add/It adds/, please use the imperative form.
>
>> compiling. The existing typecheck()
>
> On Fri, Sep 09, 2022 at 06:38:33AM +, Winkler, Tomas wrote:
> > >
> > > On Thu, Sep 08, 2022 at 05:16:02PM -0700, Daniele Ceraolo Spurio wrote:
> > > > +static ssize_t mei_pxp_gsc_command(struct device *dev, u8
> > > > +client_id,
> > > u32 fence_id,
> > > > +
> card
>
> On Fri, Sep 09, 2022 at 09:21:30AM +, Winkler, Tomas wrote:
> > > >
> > > > > -Original Message-
> > > > > From: Greg Kroah-Hartman
> > > > > Sent: Friday, September 09, 2022 09:16
> > > > > To: Ceraolo Spurio, Daniele
> > > > > Cc: intel-...@lists.freedesktop.org;
> >
Il 11/09/22 17:37, Jason-JH.Lin ha scritto:
Adjust the parameters in mtk_drm_gamma_set_common()
- add (struct device *dev) to get lut_diff from gamma's driver data
- remove (bool lut_diff) and use false as default value in the function
Fixes: 051524cbe62d ("FROMGIT: drm/mediatek: Add lut d
Provides a default plane state check handler for primary planes that are a
fullscreen scanout buffer and whose state scale and position can't change.
There are some drivers that duplicate this logic in their helpers, such as
simpledrm and ssd130x. Factor out this common code into a plane helper an
On Sun, 11 Sep 2022, Jim Cromie wrote:
> enum drm_debug_category has 10 categories, but is initialized with
> bitmasks which require 10 bits of underlying storage. By using
> natural enumeration, and moving the BIT(cat) into drm_debug_enabled(),
> the enum fits in 4 bits, allowing the category to
Hi Rasmus,
Thanks for dropping in,
[...]
> >> + * @t1: data type or variable
> >> + * @t2: data type or variable
> >> + *
> >> + * The first and second arguments can be data types or variables or mixed
> >> (the
> >> + * first argument is the data type and the second argument is variable or
>
Il 11/09/22 17:37, Jason-JH.Lin ha scritto:
1. Add mtk_drm_gamma_get_lut_size() and remove MTK_LUT_SIZE macro.
2. Add lut_size to gamma driver data for different SoC.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_disp_gamma.c
Il 11/09/22 17:37, Jason-JH.Lin ha scritto:
Add lut_bits in gamma driver data for each SoC and adjust the usage
of lut_bits in mtk_drm_gamma_set_common().
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 36 ---
1 file changed, 25 insertions(+),
Il 11/09/22 17:37, Jason-JH.Lin ha scritto:
Since the bootlaoder may set the RELAY_MODE to gamma be for the kerenl,
we have to clear the RELAY_MODE bit to make sure that the gamma is
enabled correctly.
Fixes: b10023b03082 ("FROMGIT: drm/mediatek: Separate gamma module")
This Fixes tag is inval
On Sun, 11 Sep 2022, Jim Cromie wrote:
> Use DECLARE_DYNDBG_CLASSMAP across DRM:
>
> - in .c files, since macro defines/initializes a record
>
> - in drivers, $mod_{drv,drm,param}.c
>ie where param setup is done, since a classmap is param related
>
> - in drm/drm_print.c
>since existing
Il 11/09/22 00:48, Hamza Mahfooz ha scritto:
As made mention of in commit 9f0ac028410f ("drm/print: rename drm_debug
to __drm_debug to discourage use"), we shouldn't explicitly refer to
__drm_debug in this context. So, use drm_debug_enabled() instead.
Fixes: b5c84a9edcd4 ("drm/bridge: add it6505
On Mon, Sep 12, 2022 at 12:15:22PM +0200, Javier Martinez Canillas wrote:
> Provides a default plane state check handler for primary planes that are a
> fullscreen scanout buffer and whose state scale and position can't change.
>
> There are some drivers that duplicate this logic in their helpers,
Hi
Am 12.09.22 um 12:40 schrieb Ville Syrjälä:
On Mon, Sep 12, 2022 at 12:15:22PM +0200, Javier Martinez Canillas wrote:
Provides a default plane state check handler for primary planes that are a
fullscreen scanout buffer and whose state scale and position can't change.
There are some drivers
On Mon, Sep 12, 2022 at 01:05:45PM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 12.09.22 um 12:40 schrieb Ville Syrjälä:
> > On Mon, Sep 12, 2022 at 12:15:22PM +0200, Javier Martinez Canillas wrote:
> >> Provides a default plane state check handler for primary planes that are a
> >> fullscreen scan
After applying the "chrontel-ch7033: Add byteswap order option" series,
Laurent reported an issues with the approach. Since no fix has been submitted
for the issues outlined in time for the next kernel release, I'd like to
revert this series for now.
Just to be clear I would very much like to see
As reported by Laurent in response to this commit[1], this functionality should
not be implemented using the devicetree, because of this let's revert this
series
for now.
This reverts commit a4be71430c76eca43679e8485085c230afa84460.
[1] https://lore.kernel.org/all/20220902153906.31000-2-macroalp
As reported by Laurent in response to this commit[1], this functionality should
not be implemented using the devicetree, because of this let's revert this
series
for now.
This reverts commit c312b0df3b13e4c533743bb2c37fd1bc237368e5.
[1] https://lore.kernel.org/all/20220902153906.31000-2-macroalp
Applied to drm-misc-next.
On Mon, 12 Sep 2022 09:06:47 +0200,
Thomas Zimmermann wrote:
>
> Hi,
>
> I've meanwhile merged the patchset, including the one updated patch
> and the missing r-b.
Great, thanks!
Takashi
Hi
Am 12.09.22 um 13:18 schrieb Ville Syrjälä:
On Mon, Sep 12, 2022 at 01:05:45PM +0200, Thomas Zimmermann wrote:
Hi
Am 12.09.22 um 12:40 schrieb Ville Syrjälä:
On Mon, Sep 12, 2022 at 12:15:22PM +0200, Javier Martinez Canillas wrote:
Provides a default plane state check handler for primary
Commit 39a2bd34c933 ("drm/i915: Use the vma resource as argument for gtt
binding / unbinding") introduced a regression that due to the vma resource
tracking of the binding state, dpt ptes were not correctly repopulated.
Fix this by clearing the vma resource state before repopulating.
The state will
Hi Rob,
On Mon, Sep 12, 2022 at 01:38:54PM +0200, Robert Foss wrote:
> After applying the "chrontel-ch7033: Add byteswap order option" series,
> Laurent reported an issues with the approach. Since no fix has been submitted
> for the issues outlined in time for the next kernel release, I'd like to
On Mon, Sep 12, 2022 at 02:05:36PM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 12.09.22 um 13:18 schrieb Ville Syrjälä:
> > On Mon, Sep 12, 2022 at 01:05:45PM +0200, Thomas Zimmermann wrote:
> >> Hi
> >>
> >> Am 12.09.22 um 12:40 schrieb Ville Syrjälä:
> >>> On Mon, Sep 12, 2022 at 12:15:22PM +020
On Mon, Sep 12, 2022 at 02:19:57PM +0200, Thomas Hellström wrote:
> Commit 39a2bd34c933 ("drm/i915: Use the vma resource as argument for gtt
> binding / unbinding") introduced a regression that due to the vma resource
> tracking of the binding state, dpt ptes were not correctly repopulated.
Doesn'
On Mon, 2022-09-12 at 15:43 +0300, Ville Syrjälä wrote:
> On Mon, Sep 12, 2022 at 02:19:57PM +0200, Thomas Hellström wrote:
> > Commit 39a2bd34c933 ("drm/i915: Use the vma resource as argument
> > for gtt
> > binding / unbinding") introduced a regression that due to the vma
> > resource
> > trackin
On Sat, 27 Aug 2022, Andi Shyti wrote:
> From: Niranjana Vishwanathapura
>
> Implement the bind and unbind of an object at the specified GPU virtual
> addresses.
>
> Signed-off-by: Niranjana Vishwanathapura
> Signed-off-by: Prathap Kumar Valsan
> Signed-off-by: Ramalingam C
> Signed-off-by: An
On Sat, Sep 10, 2022 at 9:50 PM Hans de Goede wrote:
>
> Hi Patrik,
>
> On 9/9/22 10:45, Hans de Goede wrote:
> > Hi,
> >
> > On 9/9/22 09:34, Patrik Jakobsson wrote:
> >> On Thu, Sep 8, 2022 at 3:39 PM Hans de Goede
> >> wrote:
> >>>
> >>> Hi,
> >>>
> >>> On 9/8/22 15:26, Patrik Jakobsson wrote:
On Sat, 27 Aug 2022, Andi Shyti wrote:
> From: Niranjana Vishwanathapura
>
> Treat VM_BIND vmas as persistent across execbuf ioctl calls and handle
> them during the request submission in the execbuff path.
>
> Support eviction by maintaining a list of evicted persistent vmas
> for rebinding duri
On Sun, 2022-09-11 at 19:22 +0200, Jason A. Donenfeld wrote:
> Hi Rodrigo,
>
> On Thu, Sep 08, 2022 at 09:59:54AM -0400, Rodrigo Vivi wrote:
> > Hi Dave and Daniel,
> >
> > A few fixes, but most targeting stable.
> >
> > [...]
> >
> > Ville Syrjälä (2):
> > drm/i915: Implement WaEdpLinkRa
Hi
Am 12.09.22 um 14:34 schrieb Ville Syrjälä:
On Mon, Sep 12, 2022 at 02:05:36PM +0200, Thomas Zimmermann wrote:
Hi
Am 12.09.22 um 13:18 schrieb Ville Syrjälä:
On Mon, Sep 12, 2022 at 01:05:45PM +0200, Thomas Zimmermann wrote:
Hi
Am 12.09.22 um 12:40 schrieb Ville Syrjälä:
On Mon, Sep 12,
On Mon, Sep 12, 2022 at 09:59:45AM +, Winkler, Tomas wrote:
> >
> > On Fri, Sep 09, 2022 at 06:38:33AM +, Winkler, Tomas wrote:
> > > >
> > > > On Thu, Sep 08, 2022 at 05:16:02PM -0700, Daniele Ceraolo Spurio wrote:
> > > > > +static ssize_t mei_pxp_gsc_command(struct device *dev, u8
> > >
Robert,
On Mon, Sep 12, 2022 at 12:43 PM Robert Foss wrote:
>
> As reported by Laurent in response to this commit[1], this functionality
> should
> not be implemented using the devicetree, because of this let's revert this
> series
> for now.
>
> This reverts commit c312b0df3b13e4c533743bb2c37f
Hello Ville and Thomas,
On 9/12/22 16:22, Thomas Zimmermann wrote:
[...]
>>> +
>>> +/**
>>> + * drm_plane_helper_atomic_check() - Helper to check primary planes
>>> states
>>> + * @plane: plane to check
>>> + * @new_state: plane state to check
>>
>> That is not a
On Mon, Sep 12, 2022 at 03:29:52PM +0100, Doug Anderson wrote:
> On Mon, Sep 12, 2022 at 12:43 PM Robert Foss wrote:
> >
> > As reported by Laurent in response to this commit[1], this functionality
> > should
> > not be implemented using the devicetree, because of this let's revert this
> > seri
Hi Jagan, Marek,
Am 07.09.22 um 12:04 schrieb Marek Szyprowski:
> Hi Jagan,
>
> On 06.09.2022 21:07, Jagan Teki wrote:
>> On Mon, Sep 5, 2022 at 4:54 PM Marek Szyprowski
>> wrote:
>>> On 02.09.2022 12:47, Marek Szyprowski wrote:
On 29.08.2022 20:40, Jagan Teki wrote:
> Samsung MIPI DSIM
There is no need for the "video_size_step" variable.
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/sprd/sprd_dsi.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/sprd/sprd_dsi.c b/drivers/gpu/drm/sprd/sprd_dsi.c
index 12b67a5d5923..c8af4b5516a2 10064
On Fri, Sep 09, 2022 at 09:34:26AM +0200, Mauro Carvalho Chehab wrote:
> There are some occurrences of "/**" that aren't actually part of
> a kernel-doc markup. Replace them by "/*", in order to make easier
> to identify what i915 files contain kernel-doc markups.
>
> Reviewed-by: Rodrigo Vivi
>
Existing code is causing a race condition where dirt_needed value is
already set by the host and gets overwritten with default value. Remove
this default setting of dirt_needed, to avoid overwriting the value
received in the channel callback set by vmbus_open. Removing this
setting also means the d
On Mon, Sep 12, 2022 at 10:56:16AM +0200, Andrzej Hajda wrote:
On 10.09.2022 01:18, Lucas De Marchi wrote:
Just like is done for compute and copy engines, extract a function to
handle media engines. While at it, be consistent on using or not the
uncore/gt/info variable aliases.
Reviewed-by: Mat
The MSM DRM is currently broken in multiple ways with respect to probe
deferral. Not only does the driver currently fail to probe again after a
late deferral, but due to a related use-after-free bug this also
triggers NULL-pointer dereferences.
These bugs are not new but have become critical with
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This can lead resource leaks or failure to bind the aggregate device
when binding is later retr
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This is specifically true for the HDMI IRQ, which will otherwise remain
requested so that the n
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This can lead resource leaks or failure to bind the aggregate device
when binding is later retr
The bridge counter was never reset when tearing down the DRM device so
that stale pointers to deallocated structures would be accessed on the
next tear down (e.g. after a second late bind deferral).
Given enough bridges and a few probe deferrals this could currently also
lead to data beyond the br
Add the missing sanity checks on the bridge counter to avoid corrupting
data beyond the fixed-sized bridge array in case there are ever more
than eight bridges.
a3376e3ec81c ("drm/msm: convert to drm_bridge")
ab5b0107ccf3 ("drm/msm: Initial add eDP support in msm drm driver (v5)")
a689554ba6ed ("d
Drop the overly defensive modeset sanity checks of function parameters
which have already been checked or used by the callers.
Signed-off-by: Johan Hovold
---
drivers/gpu/drm/msm/dp/dp_display.c | 7 +--
drivers/gpu/drm/msm/dsi/dsi.c | 7 +--
2 files changed, 2 insertions(+), 12 de
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This is specifically true for the DP IRQ, which will otherwise remain
requested so that the nex
Hello,
This series is version 3 of the introduction of unit testing to the
AMDPGU driver [1].
Our main goal is to bring unit testing to the AMD display driver; in
particular, we'll focus on the Display Mode Library (DML) for DCN2.0,
DMUB, and some of the DCE functions. This implementation intends
From: Tales Aparecida
The fixed31_32 library performs a lot of the mathematical operations
involving fixed-point arithmetic and the conversion of integers to
fixed-point representation.
This unit tests intend to assure the proper functioning of the basic
mathematical operations of fixed-point ar
KUnit unifies the test structure and provides helper tools that simplify
the development of tests. Basic use case allows running tests as regular
processes, which makes easier to run unit tests on a development machine
and to integrate the tests in a CI system.
This commit introduces a unit test t
From: Isabella Basso
This adds tests to the bit encoding format verification functions on the
file. They're meant to be simpler so as to provide a proof of concept on
testing DML code.
Signed-off-by: Isabella Basso
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/Kconfig |
The display_mode_vba library deals with hundreds of display parameters
and sometimes does it in odd ways. The addition of unit tests intends to
assure the quality of the code delivered by HW engineers and, also make
it possible to refactor the code decreasing concerns about adding bugs
to the codeb
From: Magali Lemes
This commit adds unit tests to the functions dcn20_cap_soc_clocks and
dcn21_update_bw_bounding_box from dcn20/dcn20_fpu.
Signed-off-by: Magali Lemes
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/tests/Makefile| 3 +-
.../tests/dc/dml/dcn20/dcn20_fpu_test.
The display_mode_vba_20 deals with hundreds of display parameters for
the DCN20 and sometimes does it in odd ways. The addition of unit tests
intends to assure the quality of the code delivered by HW engineers and,
also make it possible to refactor the code decreasing concerns about adding
bugs to
Add unit test to the SubVP feature in order to avoid possible
regressions and assure the code robustness.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/Kconfig | 13 +
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 4 +
.../gpu/drm/amd/display/tests/.kunitconfig|
Explain how to run the KUnit tests present in the AMDGPU's Display
Core and clarify which architectures and tools can be used to run
the tests. Moreover, explains how to add new tests to the existing
tests.
Signed-off-by: Maíra Canal
---
.../gpu/amdgpu/display/display-test.rst | 88 +++
On Fri, Sep 09, 2022 at 04:18:14PM -0700, Lucas De Marchi wrote:
Update fuse handling for media to future-proof it.
Signed-off-by: Lucas De Marchi
Thanks Matt Roper and Andrzej for the review. Applied.
Lucas De Marchi
: 088771790e5d121c70c358468abbebb4710eb02f
change-id: 20220912-copy-engine-526db816b088
Best regards,
--
Lucas De Marchi
Support for reading the fuses to check what are the Link Copy engines
was added in commit ad5f74f34201 ("drm/i915/pvc: read fuses for link
copy engines"). However they were added unconditionally because the
FUSE3 register is present since graphics version 10.
However the bitfield with meml3 fuses
DOWNSPREAD_CTRL (0x107) shall be cleared to 0 upon power-on reset or an
upstream device disconnect. This patch will enforce this rule by always
cleared DOWNSPREAD_CTRL register to 0 before start link training. At rare
case that DP MSA timing parameters may be mis-interpreted by the sink
which cause
drm_dp_dpcd_readb() will return 1 to indicate one byte had been read
successfully. This patch replace variable "err" with "len" have more
correct meaning.
changes in v5:
-- split into 3 patches
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/dp/dp_link.c | 14 +++---
1 file changed,
Hi,
Sorry for late reply.
How do you propose to go then?
Can we still use a persistent platform device to load the firmware and
cache it? But, in this case the system will still crash in case the
user change drm.edid_firmware then, without replugging the device, he
suspends and resumes the ma
Bring sink out of D3 (power down) mode into D0 (normal operation) mode
by setting DP_SET_POWER_D0 bit to DP_SET_POWER dpcd register. This
patch will retry 3 times if written to DP_SET_POWER register failed.
Changes in v5:
-- split into two patches
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm
cleared DP_DOWNSPREAD_CTRL register before start link training
Kuogee Hsieh (3):
drm/msm/dp: cleared DP_DOWNSPREAD_CTRL register before start link
training
drm/msm/dp: replace variable err with len at dp_aux_link_power_up()
drm/msm/dp: retry 3 times if set sink to D0 poweer state failed
Building Mesa's Perfetto requires including the panfrost drm uAPI header in
C++ code, but the C++ compiler requires anonymous unions to have only
public non-static data members.
Commit 730c2bf4ad39 ("drm/panfrost: Add support for devcoredump")
introduces one such union, breaking the Mesa build.
G
Hi Matt,
Em Mon, 12 Sep 2022 08:09:57 -0700
Matt Roper escreveu:
> > --- a/drivers/gpu/drm/i915/gt/intel_context_types.h
> > +++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
>
> Several of the comments in this file do appear to be kerneldoc (in fact
> kerneldoc that was specifically reques
On Mon, Sep 12, 2022 at 02:48:54PM +0200, Thomas Hellström wrote:
> On Mon, 2022-09-12 at 15:43 +0300, Ville Syrjälä wrote:
> > On Mon, Sep 12, 2022 at 02:19:57PM +0200, Thomas Hellström wrote:
> > > Commit 39a2bd34c933 ("drm/i915: Use the vma resource as argument
> > > for gtt
> > > binding / unbi
Hi Lucas,
On Mon, Sep 12, 2022 at 09:19:38AM -0700, Lucas De Marchi wrote:
> Support for reading the fuses to check what are the Link Copy engines
> was added in commit ad5f74f34201 ("drm/i915/pvc: read fuses for link
> copy engines"). However they were added unconditionally because the
> FUSE3 re
https://bugzilla.kernel.org/show_bug.cgi?id=213145
nvaert1986 (nvaert1...@hotmail.com) changed:
What|Removed |Added
CC||nvaert1...@hotmail.c
On 9/9/2022 10:16 AM, Kuogee Hsieh wrote:
DRM commit_tails() will disable downstream crtc/encoder/bridge if
both disable crtc is required and crtc->active is set before pushing
a new frame downstream.
There is a rare case that user space display manager issue an extra
screen update immediatel
Adding kuogee to this series
Hi Johan
Thanks for posting this.
We will take a look at this, re-validate and give our reviews/tested-bys.
Thanks
Abhinav
On 9/12/2022 8:40 AM, Johan Hovold wrote:
The MSM DRM is currently broken in multiple ways with respect to probe
deferral. Not only does the
On Mon, Sep 12, 2022 at 04:22:49PM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 12.09.22 um 14:34 schrieb Ville Syrjälä:
> > On Mon, Sep 12, 2022 at 02:05:36PM +0200, Thomas Zimmermann wrote:
> >> Hi
> >>
> >> Am 12.09.22 um 13:18 schrieb Ville Syrjälä:
> >>> On Mon, Sep 12, 2022 at 01:05:45PM +020
On Mon, Sep 12, 2022 at 06:47:56PM +0200, Mauro Carvalho Chehab wrote:
> Hi Matt,
>
> Em Mon, 12 Sep 2022 08:09:57 -0700
> Matt Roper escreveu:
>
> > > --- a/drivers/gpu/drm/i915/gt/intel_context_types.h
> > > +++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
> >
> > Several of the comments
DRM commit_tails() will disable downstream crtc/encoder/bridge if
both disable crtc is required and crtc->active is set before pushing
a new frame downstream.
There is a rare case that user space display manager issue an extra
screen update immediately followed by close DRM device while down
strea
Hi Danilo,
I have applied your patch series for HDLCD on top of drm-next (commit
213cb76ddc8b)
and on start up I get a warning:
[ 12.882554] hdlcd 7ff5.hdlcd: drm_WARN_ON(funcs && funcs->destroy)
[ 12.882596] WARNING: CPU: 1 PID: 211 at drivers/gpu/drm/drm_crtc.c:393
__drmm_crtc_init_wi
On 12/09/2022 18:40, Johan Hovold wrote:
The bridge counter was never reset when tearing down the DRM device so
that stale pointers to deallocated structures would be accessed on the
next tear down (e.g. after a second late bind deferral).
Given enough bridges and a few probe deferrals this coul
On 12/09/2022 18:40, Johan Hovold wrote:
Add the missing sanity checks on the bridge counter to avoid corrupting
data beyond the fixed-sized bridge array in case there are ever more
than eight bridges.
a3376e3ec81c ("drm/msm: convert to drm_bridge")
ab5b0107ccf3 ("drm/msm: Initial add eDP suppor
On 12/09/2022 18:40, Johan Hovold wrote:
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This is specifically true for the HDMI IRQ, which wi
From: Chris Morgan
If I use more than one VP to output on an RK3566 based device I
receive the following error (and then everything freezes):
[0.838375] Unable to handle kernel NULL pointer dereference at virtual
address 0250
[0.839191] Mem abort info:
[0.839442] ESR =
On 12/09/2022 20:34, Kuogee Hsieh wrote:
DRM commit_tails() will disable downstream crtc/encoder/bridge if
both disable crtc is required and crtc->active is set before pushing
a new frame downstream.
There is a rare case that user space display manager issue an extra
screen update immediately fo
On 12/09/2022 18:40, Johan Hovold wrote:
Drop the overly defensive modeset sanity checks of function parameters
which have already been checked or used by the callers.
Signed-off-by: Johan Hovold
Again, please split into dp and dsi patches. After that:
Reviewed-by: Dmitry Baryshkov
---
On 12/09/2022 18:40, Johan Hovold wrote:
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This is specifically true for the DP IRQ, which will
On 12/09/2022 18:40, Johan Hovold wrote:
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This can lead resource leaks or failure to bind the
On 12/09/2022 18:40, Johan Hovold wrote:
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This can lead resource leaks or failure to bind the
1 - 100 of 160 matches
Mail list logo
