On Mon, 25 Apr 2022 21:56:12 -0300
Igor Torrente wrote:
> Hi Pekka,
>
> On 4/25/22 04:56, Pekka Paalanen wrote:
> > On Sat, 23 Apr 2022 12:12:51 -0300
> > Igor Torrente wrote:
> >
> >> Hi Pekka,
> >>
> >> On 4/20/22 08:23, Pekka Paalanen wrote:
> >>> On Mon, 4 Apr 2022 17:45:11 -0300
> >>
On 25/04/2022 19:40, Yang, Fei wrote:
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -1175,6 +1175,7 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt)
[VIDEO_DECODE_CLASS]= GEN12_VD_TLB_INV_CR,
[VIDEO_ENHANCEM
Hello Uwe,
Thanks for your patch.
On 4/25/22 21:23, Uwe Kleine-König wrote:
> This function returns zero unconditionally, so there isn't any benefit
> of returning a value. Make it return void to be able to see at a glance
> that the return value of ssd130x_i2c_remove() is always zero.
>
> This
On Tue, 26 Apr 2022, Stephen Rothwell wrote:
> Hi all,
>
> After merging the drm-intel tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> ERROR: modpost: "intel_runtime_pm_put" [drivers/gpu/drm/i915/kvmgt.ko]
> undefined!
>
> Possibly caused by commit
>
> 8b750bf74418
Hi Sam
Am 25.04.22 um 19:46 schrieb Sam Ravnborg:
Hi Thomas,
On Mon, Apr 25, 2022 at 07:26:32PM +0200, Sam Ravnborg wrote:
Hi Thomas,
diff --git a/drivers/video/fbdev/core/fb_defio.c
b/drivers/video/fbdev/core/fb_defio.c
index 6aaf6d0abf39..6924d489a289 100644
--- a/drivers/video/fbdev/core
On Fri, 4 Mar 2022 at 06:32, Tommy Haung wrote:
>
> Update the aspeed_gfx_set_clk with display width.
> At AST2600, the display clock could be coming from
> HPLL clock / 16 = 75MHz. It would fit 1024x768@70Hz.
> Another chip will still keep 800x600.
>
> Signed-off-by: Tommy Haung
> ---
> drivers
Hi folks:
Here is the pull of gvt-next which fixs the compilation error when i915 debug
is open after the GVT-g refactor patches.
Thanks so much for the efforts.
Thanks,
Zhi.
The following changes since commit 2917f53113be3b7a0f374e02cebe6d6b749366b5:
vfio/mdev: Remove mdev drvdata (2022-04-
Hi
Am 25.04.22 um 20:17 schrieb Sam Ravnborg:
Hi Thomas,
a little ramblings below. Just my thoughts while trying to understand
the code - especially since I looked at it before.
Thanks for reviewing the patches.
Sam
On Mon, Apr 25, 2022 at 01:27:50PM +0200, Thomas Zimmermann wrote
Hi
Am 25.04.22 um 20:24 schrieb Sam Ravnborg:
Hi Thomas.
On Mon, Apr 25, 2022 at 01:27:51PM +0200, Thomas Zimmermann wrote:
Refactor the page-write handler for deferred I/O. Drivers use the
function to let fbdev track written pages of mmap'ed framebuffer
memory.
I like how the comments got a
On Tue, Apr 26, 2022 at 1:24 PM Paul Kocialkowski
wrote:
>
> Hi,
>
> On Thu 21 Apr 22, 10:59, Paul Kocialkowski wrote:
> > Hi Maxime,
> >
> > On Thu 21 Apr 22, 10:23, Maxime Ripard wrote:
> > > On Thu, Apr 21, 2022 at 01:15:54PM +0530, Jagan Teki wrote:
> > > > + Linus
> > > > + Marek
> > > > + La
On 26 4月 22 08:31:05, Christian König wrote:
> Am 26.04.22 um 08:08 schrieb Cai Huoqing:
> > The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP
> > which is integrated into NVIDIA Jetson AGX Xavier,
> > so add UAPI of this driver.
> >
> > Signed-off-by: Cai Huoqing
> > ---
> > v1->
> -Original Message-
> From: Joel Stanley
> Sent: Tuesday, April 26, 2022 3:48 PM
> To: Tommy Huang
> Cc: David Airlie ; Daniel Vetter ; Rob
> Herring ; Andrew Jeffery ;
> linux-aspeed ; open list:DRM DRIVERS
> ; devicetree ;
> Linux ARM ; Linux Kernel Mailing List
> ; BMC-SW
> Subject
Am 26.04.22 um 10:23 schrieb Cai Huoqing:
On 26 4月 22 08:31:05, Christian König wrote:
Am 26.04.22 um 08:08 schrieb Cai Huoqing:
The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP
which is integrated into NVIDIA Jetson AGX Xavier,
so add UAPI of this driver.
Signed-off-by: Cai H
Hi all,
I'm working on setting HDR & WCG video modes in Weston, and I thought
setting "max bpc" KMS property on the connector would be a good idea.
I'm confused about how it works though.
I did some digging in https://gitlab.freedesktop.org/wayland/weston/-/issues/612
Summary:
- Apparently the
On Tue, 26 Apr 2022, "Wang, Zhi A" wrote:
> Hi folks:
>
> Here is the pull of gvt-next which fixs the compilation error when i915 debug
> is open after the GVT-g refactor patches.
>
> Thanks so much for the efforts.
Pulled, thanks.
BR,
Jani.
>
> Thanks,
> Zhi.
>
> The following changes since co
Hi folks:
I updated the branch again. Please use this pull. Here is the pull of
gvt-next which fixes the compilation error when i915 debug is open after
the GVT-g refactor patches.
Thanks so much for the efforts.
Thanks,
Zhi.
The following changes since commit 2917f53113be3b7a0f374e02cebe6d6b74
On 4/26/22 8:37 AM, Jani Nikula wrote:
> On Tue, 26 Apr 2022, "Wang, Zhi A" wrote:
>> Hi folks:
>>
>> Here is the pull of gvt-next which fixs the compilation error when i915 debug
>> is open after the GVT-g refactor patches.
>>
>> Thanks so much for the efforts.
>
> Pulled, thanks.
>
> BR,
> Jan
Hi
Am 25.04.22 um 20:24 schrieb Sam Ravnborg:
Hi Thomas.
On Mon, Apr 25, 2022 at 01:27:51PM +0200, Thomas Zimmermann wrote:
Refactor the page-write handler for deferred I/O. Drivers use the
function to let fbdev track written pages of mmap'ed framebuffer
memory.
I like how the comments got a
From: LUU HOAI
As per R-Car-Gen3_Common_OPC_Customer_Notifications_V30.1.pdf,
unexpected image output(such as incorrect colors or planes being
invisible) can happen on the below conditions, as PnALPHAR register
is not initialized by reset.
When alpha blending (PpMRm.PpSPIM=0b101) is performed an
On 4/26/22 8:37 AM, Jani Nikula wrote:
> On Tue, 26 Apr 2022, "Wang, Zhi A" wrote:
>> Hi folks:
>>
>> Here is the pull of gvt-next which fixs the compilation error when i915 debug
>> is open after the GVT-g refactor patches.
>>
>> Thanks so much for the efforts.
>
> Pulled, thanks.
>
> BR,
> Jan
There are two error code bugs here. The copy_to/from_user() functions
return the number of bytes remaining (a positive number). We should
return -EFAULT if the copy fails.
Second if we fail because "context.resp_status" is non-zero then return
-EINVAL instead of zero.
Fixes: e50d9ba0d2cd ("drm/
If the kzalloc() fails then this code will crash. Return -ENOMEM instead.
Fixes: e50d9ba0d2cd ("drm/amdgpu: Add debugfs TA load/unload/invoke support")
Signed-off-by: Dan Carpenter
---
This would look nicer as:
shared_buf = memdup_user(&buf[copy_pos], shared_buf_len);
if (IS_ERR
Signed-off-by: Zhenneng Li
---
drivers/gpu/drm/radeon/atombios.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios.h
b/drivers/gpu/drm/radeon/atombios.h
index bd5dc09e860f..6ccc9f31689f 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/d
Fix the below drm/edid kernel-doc warnings:
drivers/gpu/drm/drm_edid.c:1589: warning: Function parameter or member '_edid'
not described in 'drm_edid_header_is_valid'
drivers/gpu/drm/drm_edid.c:1589: warning: Excess function parameter 'raw_edid'
description in 'drm_edid_header_is_valid'
drivers/
Drop the kernel-doc for static functions, it's excessive, but retain the
info in plain comments.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 57 --
1 file changed, 17 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/dri
Hi Thomas,
> > > +
> > > /* this is to find and return the vmalloc-ed fb pages */
> > > static vm_fault_t fb_deferred_io_fault(struct vm_fault *vmf)
> > > {
> > > @@ -59,7 +113,7 @@ static vm_fault_t fb_deferred_io_fault(struct vm_fault
> > > *vmf)
> > > printk(KERN_ERR "n
-base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/intel-lab-lkp/linux/commits/Cai-Huoqing/drm-nvdla-Add-driver-support-for-NVDLA/20220426-141148
base: git://anongit.freedesktop.org/drm/drm drm-next
config: i386-randconfig-a003-20220425
(https://d
On Tue, Apr 26, 2022 at 8:31 AM Christian König
wrote:
> Am 26.04.22 um 08:08 schrieb Cai Huoqing:
> > The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP
> > which is integrated into NVIDIA Jetson AGX Xavier,
> > so add UAPI of this driver.
> >
> > Signed-off-by: Cai Huoqing
I saw
On Tue, Apr 26, 2022 at 05:51:06PM +0800, pengfuyuan wrote:
> Fix spelling typo in comment.
>
> Signed-off-by: pengfuyuan
> ---
> drivers/gpu/drm/arm/malidp_regs.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/arm/malidp_regs.h
> b/drivers/gpu/drm/arm
-base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/intel-lab-lkp/linux/commits/Cai-Huoqing/drm-nvdla-Add-driver-support-for-NVDLA/20220426-141148
base: git://anongit.freedesktop.org/drm/drm drm-next
config: ia64-randconfig-r021-20220425
(https://d
On Tue, Apr 26, 2022 at 09:54:36AM +0200, Paul Kocialkowski wrote:
> On Thu 21 Apr 22, 10:59, Paul Kocialkowski wrote:
> > On Thu 21 Apr 22, 10:23, Maxime Ripard wrote:
> > > On Thu, Apr 21, 2022 at 01:15:54PM +0530, Jagan Teki wrote:
> > > > + Linus
> > > > + Marek
> > > > + Laurent
> > > > + Robe
On Tue, Apr 26, 2022 at 08:42:25AM +, Wang, Zhi A wrote:
> On 4/26/22 8:37 AM, Jani Nikula wrote:
> > On Tue, 26 Apr 2022, "Wang, Zhi A" wrote:
> >> Hi folks:
> >>
> >> Here is the pull of gvt-next which fixs the compilation error when i915
> >> debug
> >> is open after the GVT-g refactor pat
Store the per-page state for fbdev's deferred I/O in struct
fb_deferred_io_pageref. Maintain a list of pagerefs for the pages
that have to be written back to video memory. Update all affected
drivers.
As with pages before, fbdev acquires a pageref when an mmaped page
of the framebuffer is being wr
The fbdev mmap function fb_mmap() unconditionally overrides the
driver's implementation if deferred I/O has been activated. This
makes it hard to implement mmap with anything but a vmalloc()'ed
software buffer. That is specifically a problem for DRM, where
video memory is maintained by a memory man
Rework the fbdev deferred-I/O to not interfere with fields of struct
page. All references from deferred-I/O code to fields in struct page
are gone. The rsp state is help in a separate pageref structure.
v3:
* rename pagelist to pagereflist (Sam)
* use pageref->offset over page->ind
Refactor the page-write handler for deferred I/O. Drivers use the
function to let fbdev track written pages of mmap'ed framebuffer
memory.
v3:
* keep locking within track-pages function for readability (Sam)
v2:
* don't export the helper until we have an external caller
Signed-off
Rename various instances of pagelist to pagereflist. The list now
stores pageref structures, so the new name is more appropriate.
In their write-back helpers, several fbdev drivers refer to the
pageref list in struct fb_deferred_io instead of using the one
supplied as argument to the function. Con
Use pageref->offset instead of page->index for deferred-I/O writeback
where appropriate. Distinguishes between file-mapping offset and video-
memory offset. While at it, also remove unnecessary references to
struct page.
Fbdev's deferred-I/O code uses the two related page->index and
pageref->offse
(cc'ing Sam)
Am 26.04.22 um 14:03 schrieb Thomas Zimmermann:
Rework the fbdev deferred-I/O to not interfere with fields of struct
page. All references from deferred-I/O code to fields in struct page
are gone. The rsp state is help in a separate pageref structure.
v3:
* rename pagelist t
On Tue, 26 Apr 2022 at 03:14, Dmitry Baryshkov
wrote:
>
> The tc358762.connector field is unused. Remove it to save space.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/bridge/tc358762.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/bridge/tc358762.c
> b/
On 26 4月 22 12:50:50, Arnd Bergmann wrote:
> On Tue, Apr 26, 2022 at 8:31 AM Christian König
> wrote:
> > Am 26.04.22 um 08:08 schrieb Cai Huoqing:
> > > The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP
> > > which is integrated into NVIDIA Jetson AGX Xavier,
> > > so add UAPI of
This patch set splits out static hdr metadata backlight range parsing
from gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c into gpu/drm/drm-edid.c as
a new function. This new function is then used in admgpu_dm.c and
intel_dp_aux_backlight.c
Cc: Maarten Lankhorst
Cc: Rodrigo Siqueira
Cc: Harry Wentland
Split luminance min/max calculation using static hdr metadata from
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:update_connector_ext_caps
into drm/drm_edid.c.
Cc: Rodrigo Siqueira
Cc: Harry Wentland
Cc: Lyude Paul
Cc: Mika Kahola
Cc: Jani Nikula
Signed-off-by: Jouni Högander
---
driver
Luminance range was split out into drm_edid.c to share the calculation
function. Use this new interface for caps->aux_max_input_signal and
caps->aux_min_input_signal.
Cc: Rodrigo Siqueira
Cc: Harry Wentland
Cc: Lyude Paul
Cc: Mika Kahola
Cc: Jani Nikula
Signed-off-by: Jouni Högander
---
...
Instead of using fixed 0 - 512 range use
drm_luminance_range_from_static_hdr_metadata to obtain panel range. If
that fails fall back to static 0 - 512.
Cc: Lyude Paul
Cc: Mika Kahola
Cc: Jani Nikula
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 9 ++
On Tue, Apr 26, 2022 at 2:24 PM Cai Huoqing wrote:
> On 26 4月 22 12:50:50, Arnd Bergmann wrote:
> > > > +#define DRM_NVDLA_SUBMIT 0x00
> > > > +#define DRM_NVDLA_GEM_CREATE 0x01
> > > > +#define DRM_NVDLA_GEM_MMAP 0x02
> >
> > Is this an actual mmap() call, or something that
On Sun, 24 Apr 2022 11:26:21 -0500, Samuel Holland wrote:
> commit b4bdc4fbf8d0 ("soc: sunxi: Deal with the MBUS DMA offsets in a
> central place") added a platform device notifier that sets the DMA
> offset for all of the display engine frontend and backend devices.
>
> The code applying the offs
On Sun, 24 Apr 2022 11:26:19 -0500, Samuel Holland wrote:
> So far, the binding and driver have relied on the fact that the H6
> clocks are both a prefix and a subset of the R40 clocks. This allows
> them to share the clocks/clock-names items and the clock-output-names
> order between the hardware
On Sun, 24 Apr 2022 11:26:20 -0500, Samuel Holland wrote:
> Allwinner D1 contains a display engine 2.0. It features two mixers, a
> TCON TOP (with DSI and HDMI), one TCON LCD, and one TCON TV.
>
>
Applied to drm/drm-misc (drm-misc-next).
Thanks!
Maxime
On Sun, 24 Apr 2022 11:26:22 -0500, Samuel Holland wrote:
> readsb/writesb are unavailable on some architectures. In preparation for
> removing the Kconfig architecture dependency, switch to the equivalent
> but more portable ioread/write8_rep helpers.
>
>
Applied to drm/drm-misc (drm-misc-next)
On Sun, 24 Apr 2022 11:26:31 -0500, Samuel Holland wrote:
> D1 has a TCON TOP, so its quirks are similar to those for the R40 TCONs.
> While there are some register changes, the part of the TCON TV supported
> by the driver matches the R40 quirks, so that quirks structure can be
> reused. D1 has th
On Sun, 24 Apr 2022 11:26:25 -0500, Samuel Holland wrote:
> From: Jernej Skrabec
>
> Newly introduced mode_set callback in engine structure is a much better
> place for setting backend output size and interlace mode for following
> reasons:
> 1. Aforementioned properties change only when mode cha
On Sun, 24 Apr 2022 11:26:30 -0500, Samuel Holland wrote:
> D1 has a TCON TOP with TCON TV0 and DSI, but no TCON TV1. This puts the
> DSI clock name at index 1 in clock-output-names. Support this by only
> incrementing the index for clocks that are actually supported.
>
>
Applied to drm/drm-misc
On Sun, 24 Apr 2022 11:26:27 -0500, Samuel Holland wrote:
> D1's mixer 1 has no UI layers, only a single VI layer. That means the
> mixer can only be used if the primary plane comes from this VI layer.
> Add the code to handle this case.
>
>
Applied to drm/drm-misc (drm-misc-next).
Thanks!
Maxi
On Sun, 24 Apr 2022 11:26:29 -0500, Samuel Holland wrote:
> D1 has a display engine with the usual pair of mixers, albeit with
> relatively few layers. In fact, D1 appears to be the first SoC to have
> a mixer without any UI layers. Add support for these new variants.
>
>
Applied to drm/drm-misc
On Sun, 24 Apr 2022 11:26:26 -0500, Samuel Holland wrote:
> From: Jernej Skrabec
>
> Newly introduced mode_set callback in engine structure is a much better
> place for setting mixer output size and interlace mode for the following
> reasons:
> 1. Aforementioned properties change only when mode c
On Sun, 24 Apr 2022 11:26:32 -0500, Samuel Holland wrote:
> Now that the various blocks in the D1 display engine pipeline are
> supported, we can enable the overall engine.
>
>
Applied to drm/drm-misc (drm-misc-next).
Thanks!
Maxime
On Sun, 24 Apr 2022 11:26:23 -0500, Samuel Holland wrote:
> Allwinner D1 is a RISC-V SoC which contains a DE 2.0 engine. Let's
> remove the dependency on a specific CPU architecture, so the driver can
> be built wherever ARCH_SUNXI is selected.
>
>
Applied to drm/drm-misc (drm-misc-next).
Thank
On Sun, 24 Apr 2022 11:26:24 -0500, Samuel Holland wrote:
> From: Jernej Skrabec
>
> This optional callback is useful for setting properties which depends
> only on current mode. Such properties are width, height and interlaced
> output.
>
> These properties are currently set in update layer cal
On Sun, 24 Apr 2022 11:26:28 -0500, Samuel Holland wrote:
> D1 changes the MMIO offsets for the CSC blocks in the first mixer. The
> mixers' ccsc property is used as an index into the ccsc_base array. Use
> an enumeration to describe this index, and add the new set of offsets.
>
>
Applied to drm
krealloc_array() ignores attempts to reduce the array size, so the attempt
to save memory is completely pointless here.
Also move testing for the no fence case into sync_file_set_fence(), this
way we don't even touch the fence array when we don't have any fences.
Signed-off-by: Christian König
-
Move the code from the inline functions into exported functions.
While at it also cleanup the the selftests, fix the error handling,
remove unused functions and stop leaking memory in failed tests.
Signed-off-by: Christian König
---
drivers/dma-buf/Makefile | 2 +-
drivers/dma-buf
Introduce a dma_fence_merge() macro which allows to unwrap fences which
potentially can be containers as well and then merge them back together
into a flat dma_fence_array.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-fence-unwrap.c| 95
drivers/dma-buf/st-dma
On Tue, Apr 26, 2022 at 09:54:36AM +0200, Paul Kocialkowski wrote:
> On Thu 21 Apr 22, 10:59, Paul Kocialkowski wrote:
> > Hi Maxime,
> >
> > On Thu 21 Apr 22, 10:23, Maxime Ripard wrote:
> > > On Thu, Apr 21, 2022 at 01:15:54PM +0530, Jagan Teki wrote:
> > > > + Linus
> > > > + Marek
> > > > + La
On Tue, Apr 26, 2022 at 02:41:44PM +0200, Paul Kocialkowski wrote:
> On Tue 26 Apr 22, 14:33, Laurent Pinchart wrote:
> > On Tue, Apr 26, 2022 at 09:54:36AM +0200, Paul Kocialkowski wrote:
> > > On Thu 21 Apr 22, 10:59, Paul Kocialkowski wrote:
> > > > On Thu 21 Apr 22, 10:23, Maxime Ripard wrote:
On Tue, Apr 26, 2022 at 02:54:01PM +0200, Maxime Ripard wrote:
> On Tue, Apr 26, 2022 at 02:41:44PM +0200, Paul Kocialkowski wrote:
> > On Tue 26 Apr 22, 14:33, Laurent Pinchart wrote:
> > > On Tue, Apr 26, 2022 at 09:54:36AM +0200, Paul Kocialkowski wrote:
> > > > On Thu 21 Apr 22, 10:59, Paul Koc
On 04/25, Juan A. Suárez wrote:
> On Sun, 2022-04-24 at 19:35 +0100, Colin Ian King wrote:
> > In the unlikely event that pointer perfmon is null the WARN_ON return
> > path
> > occurs after the pointer has already been deferenced. Fix this by
> > only
> > dereferencing perfmon after it has been nu
On Tue, Apr 26, 2022 at 03:04:17PM +0200, Paul Kocialkowski wrote:
> On Tue 26 Apr 22, 14:55, Maxime Ripard wrote:
> > On Tue, Apr 26, 2022 at 02:54:01PM +0200, Maxime Ripard wrote:
> > > On Tue, Apr 26, 2022 at 02:41:44PM +0200, Paul Kocialkowski wrote:
> > > > On Tue 26 Apr 22, 14:33, Laurent Pin
Fix typo in a doxygen comment (replaced green by blue) in drm_color_mgmt.c
Signed-off-by: Raphael Gallais-Pou
---
drivers/gpu/drm/drm_color_mgmt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c
index 9079fbe
Fix following coccicheck warning:
drivers/gpu/drm/msm/msm_gpu_devfreq.c:72:1-7: WARNING: do_div() does a 64-by-32
division, please consider using div64_ul instead.
Use div64_ul instead of do_div to avoid a possible truncation.
Signed-off-by: Wan Jiabing
---
drivers/gpu/drm/msm/msm_gpu_devfreq.
Hello everyone,
as mentioned a couple of times in various discussions it would be rather
helpful if DRM has an execution context component similar to TTMs execbuf util.
In contrast to the TTM component this implementation works on the GEM level
instead and also doesn't use a double linked list
Largely just the initial skeleton.
Signed-off-by: Christian König
---
drivers/gpu/drm/selftests/Makefile| 2 +-
.../gpu/drm/selftests/drm_exec_selftests.h| 10 +++
drivers/gpu/drm/selftests/test-drm_exec.c | 74 +++
3 files changed, 85 insertions(+), 1 deleti
Avoids quite a bit of logic and kmalloc overhead.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h| 5 +-
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 303 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c| 14 +
drivers/gpu/drm/amd/amdgpu/a
Use the new component here as well and remove the old handling.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c | 70 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.h | 7 +-
drivers/gpu/drm/amd/amdgpu/amdgp
Start using the new component here as well.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c | 42 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 77 +++--
2 files changed, 53 insertions(+), 66 deletions(-)
diff --git a/drivers/gpu/drm/amd
This adds the infrastructure for an execution context for GEM buffers
which is similar to the existinc TTMs execbuf util and intended to replace
it in the long term.
The basic functionality is that we abstracts the necessary loop to lock
many different GEM buffers with automated deadlock and dupli
On Tue, 26 Apr 2022, Jouni Högander wrote:
> Split luminance min/max calculation using static hdr metadata from
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:update_connector_ext_caps
> into drm/drm_edid.c.
IMO all of this should be computed at EDID parsing time once and stored
in the metad
Hi Paul,
On 4/21/2022 12:35 AM, Paul Menzel wrote:
Dear Richard,
Am 21.04.22 um 03:12 schrieb Gong, Richard:
On 4/20/2022 3:29 PM, Paul Menzel wrote:
Am 19.04.22 um 23:46 schrieb Gong, Richard:
On 4/14/2022 2:52 AM, Paul Menzel wrote:
[Cc: -kernel test robot ]
[…]
Am 13.04.22 um 15
Clients of drm_writeback_connector_init() initialize the
possible_crtcs and then invoke the call to this API.
To simplify things, allow passing possible_crtcs as a parameter
to drm_writeback_connector_init() and make changes to the
other drm drivers to make them compatible with this change.
chang
Add a reset_intf_cfg operation for dpu_hw_ctl to reset the
entire CTL path by disabling each component namely layer mixer,
3d-merge and interface blocks.
changes in v3:
- none
Signed-off-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 32
This series adds support for writeback block on DPU. Writeback
block is extremely useful to validate boards having no physical displays
in addition to many other use-cases where we want to get the output
of the display pipeline to examine whether issue is with the display
pipeline or with the panel
Add changes to support writeback module in the dpu_hw_ctl
interface.
changes in v4:
- fix the copyright year order
Signed-off-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 52 --
drivers/gpu/drm/msm/disp/dpu
Add writeback blocks to DPU resource manager so that
the encoders can directly request them through RM.
changes in v4:
- absorb dpu_rm.h header change from [1]
- since its a trivial change absorbed from an approved
patch, preserving the previous ack on this
[1] https://p
Add writeback blocks to the sm8250 DPU hardware catalog. Other
chipsets support writeback too but add it to sm8250 to prototype
the feature so that it can be easily extended to other chipsets.
changes in v4:
- fix the copyright year order
Signed-off-by: Abhinav Kumar
Reviewed-by: Dmitry
Add the dpu_hw_wb abstraction to program registers related to the
writeback block. These will be invoked once all the configuration
is set and ready to be programmed to the registers.
changes in v3:
- start using the common struct dpu_hw_cdp_cfg
- leave a comment about DPU non-DPU_
For vendors drivers which pass an already allocated and
initialized encoder especially for cases where the encoder
hardware is shared OR the writeback encoder shares the resources
with the rest of the display pipeline introduce a new API,
drm_writeback_connector_init_with_encoder() which expects
an
Rename dpu_hw_pipe_cdp_cfg to dpu_hw_cdp_cfg and move it
to dpu_hw_utils file so that other modules in addition to
SSPP such as writeback can use it as all the fields can
be used by writeback as well.
Suggested-by: Dmitry Baryshkov
Signed-off-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
---
add dpu encoder APIs to prepare and cleanup writeback job
for the writeback encoder. These shall be invoked from the
prepare_wb_job/cleanup_wb_job hooks of the drm_writeback
framework.
changes in v3:
- none
Signed-off-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/
Add an API to reset the encoder related hw blocks to ensure
a proper teardown of the pipeline. At the moment this is being
used only for the writeback encoder but eventually we can start
using this for all interfaces.
changes in v4:
- none
Signed-off-by: Abhinav Kumar
Reviewed-by: Dmitry
Introduce the dpu_writeback module which serves as the
interface between dpu operations and the drm_writeback.
This module manages the connector related operations for
dpu writeback.
changes in v2:
- start using drm_writeback_connector_init_with_encoder()
- drop unnecessary argume
Make changes to dpu_encoder to support virtual encoder needed
to support writeback for dpu.
changes in v4:
- squash dpu_encoder pieces from [1]
changes in v5:
- none
changes in v6:
- fix the comment about intf_idx and wb_idx
- add the condition for valid phys_enc
kms_writeback test cases also verify with a null fb for the
writeback connector job. In addition there are also other
commit paths which can result in kickoffs without a valid
framebuffer like while closing the fb which results in the
callback to drm_atomic_helper_dirtyfb() which internally
trigger
_dpu_plane_get_qos_lut() is not specific to just dpu_plane.
It can take any fill level and return the LUT matching it.
This can be used even for other modules like dpu_writeback.
Move _dpu_plane_get_qos_lut() to the common dpu_hw_util file
and rename it to _dpu_hw_get_qos_lut().
Signed-off-by: Ab
Initialize dpu encoder and connector for writeback if the
target supports it in the catalog.
changes in v2:
- start initialing the encoder for writeback since we
have migrated to using drm_writeback_connector_init_with_encoder()
- instead of checking for WB_2 inside _dpu_km
Add writeback block information while capturing the display
snapshot.
Signed-off-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/di
Add wb_idx to existing DRM prints in dpu_encoder and also
print the intf_mode so that its clear that for any INTF_CMD/VID
there will be a valid intf_idx and any INTF_WB_* there will be a
valid wb_idx.
Update the debugfs to add the same information. Here is a sample
output with this change:
root:/
Change the DRM traces to include both the intf_mode
and wb_idx similar to the DRM prints in the previous change.
Signed-off-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 13 -
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 26 ++
Introduce the dpu_encoder_phys_* for the writeback interface
to handle writeback specific hardware programming.
changes in v4:
- squash the encoder_phys_wb bits from [1]
- since its a trivial change of a previously acked change
preserving the ack
[1] https://patchwork.fr
Applied. Thanks!
Alex
On Tue, Apr 26, 2022 at 4:50 AM Zhenneng Li wrote:
>
> Signed-off-by: Zhenneng Li
> ---
> drivers/gpu/drm/radeon/atombios.h | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/atombios.h
> b/drivers/gpu/drm/radeon/atombi
Applied the series. Thanks!
Alex
On Tue, Apr 26, 2022 at 4:49 AM Dan Carpenter wrote:
>
> If the kzalloc() fails then this code will crash. Return -ENOMEM instead.
>
> Fixes: e50d9ba0d2cd ("drm/amdgpu: Add debugfs TA load/unload/invoke support")
> Signed-off-by: Dan Carpenter
> ---
> This wou
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