On Tue, 2022-03-01 at 19:45 -0800, Niranjana Vishwanathapura wrote:
> On Tue, Feb 22, 2022 at 06:10:30PM +0100, Thomas Hellström wrote:
> > vms are not getting properly closed. Rather than fixing that,
> > Remove the vm open count and instead rely on the vm refcount.
> >
> > The vm open count exis
Support to parse multiple CEA extension blocks and HF-EEODB to
extend drm edid driver's capability.
Lee Shawn C (4):
drm/edid: seek for available CEA block from specific EDID block index
drm/edid: parse multiple CEA extension block
drm/edid: read HF-EEODB ext block
drm/edid: parse HF-EEODB
drm_find_cea_extension() always look for a top level CEA block. Pass
ext_index from caller then this function to search next available
CEA ext block from a specific EDID block pointer.
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Ankit Nautiyal
Signed-off-by: Lee Shawn C
---
drivers/gpu/drm/drm_edid
Try to find and parse more CEA ext blocks if edid->extensions
is greater than one.
v2: split prvious patch to two. And do CEA block parsing
in this one.
v3: simplify this patch based on previous change.
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Ankit Nautiyal
Signed-off-by: Lee Shawn C
---
d
According to HDMI 2.1 spec.
"The HDMI Forum EDID Extension Override Data Block (HF-EEODB)
is utilized by Sink Devices to provide an alternate method to
indicate an EDID Extension Block count larger than 1, while
avoiding the need to present a VESA Block Map in the first
E-EDID Extension Block."
I
While adding CEA modes, try to get available EEODB block
number. Then based on it to parse numbers of ext blocks,
retrieve CEA information and add more CEA modes.
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Ankit Nautiyal
Signed-off-by: Lee Shawn C
---
drivers/gpu/drm/drm_displayid.c | 5 -
dr
>-Original Message-
>From: Lucas Stach
>Sent: 2022年3月1日 21:19
>To: Adam Ford
>Cc: Marek Vasut ; Ying Liu (OSS) ;
>dri-devel ; devicetree
>; Peng Fan ; Alexander Stein
>; Rob Herring ;
>Laurent Pinchart ; Sam Ravnborg
>; Robby Cai
>Subject: [EXT] Re: [PATCH 1/9] dt-bindings: mxsfb: Add
Remove dev_err() messages after platform_get_irq*() failures.
platform_get_irq() already prints an error.
Generated by: scripts/coccinelle/api/platform_get_irq.cocci
Signed-off-by: Yihao Han
---
drivers/video/fbdev/s3c-fb.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/video/fbdev/
Hi Inki,
On Tue, Mar 01, 2022 at 04:52:20PM +0900, Inki Dae wrote:
> Hi Martin,
>
> 22. 2. 25. 18:33에 Martin Jücker 이(가) 쓴 글:
> > Hello Inki,
> >
> > On Fri, Feb 25, 2022 at 12:52:56PM +0900, Inki Dae wrote:
> >> Hi Martin,
> >>
> >> 22. 2. 25. 08:27에 Martin Jücker 이(가) 쓴 글:
> >>> Hello Inki,
>
On Mon, Feb 28, 2022 at 06:56:39PM +0900, Byungchul Park wrote:
> I didn't want to bother you so I was planning to send the next spin
> after making more progress. However, PATCH v2 reports too many false
> positives because Dept tracked the bit_wait_table[] wrong way - I
> apologize for that. So I
On Wed, Mar 02, 2022 at 04:36:38AM +, Hyeonggon Yoo wrote:
> On Mon, Feb 28, 2022 at 06:56:39PM +0900, Byungchul Park wrote:
> > I didn't want to bother you so I was planning to send the next spin
> > after making more progress. However, PATCH v2 reports too many false
> > positives because Dep
Hi!
> The value returned by an spi driver's remove function is mostly ignored.
> (Only an error message is printed if the value is non-zero that the
> error is ignored.)
>
> So change the prototype of the remove function to return no value. This
> way driver authors are not tempted to assume that
Remove dev_err() messages after platform_get_irq*() failures.
platform_get_irq() already prints an error.
Generated by: scripts/coccinelle/api/platform_get_irq.cocci
Signed-off-by: Yihao Han
---
drivers/gpu/drm/sprd/sprd_dpu.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git
Hi all,
I am getting this warning when compiling the kernel for the MSM8960 with
this defconfig:
https://raw.githubusercontent.com/apq8064-mainline/linux/qcom-apq8064-next/arch/arm/configs/qcom_apq8064_defconfig
Warning:
../drivers/gpu/drm/dp/drm_dp.c: In function
'drm_dp_get_adjust_reque
https://bugzilla.kernel.org/show_bug.cgi?id=215648
--- Comment #2 from Philipp Riederer (pr_ker...@tum.fail) ---
Hey,
this is the log I could recover:
> <4>[ 70.829010] RSP: 0018:ad060ad67838 EFLAGS: 0202
> <4>[ 70.829013] RAX: RBX: 92c82ff28000 RCX:
> 00
Il 25/02/22 10:53, xinlei@mediatek.com ha scritto:
From: Xinlei Lee
Dpi_clk is controlled by the mux selected
by TOPCKGEN and APMIXEDSYS can support small resolution.
Signed-off-by: Xinlei Lee
Hello Xinlei,
as it was pointed out by reviewers in the MT8195 DisplayPort series, that is
ad
On 01/03/2022 12:43, t...@redhat.com wrote:
> From: Tom Rix
>
> For spdx
> change tab to space delimiter
> Use // for *.c
>
> Replacements
> commited to committed, use multiline comment style
> regsiters to registers
> initialze to initialize
>
> Signed-off-by: Tom Rix
Thanks, most of the cha
Hi Kees,
On Mon, 28 Feb 2022 15:02:48 -0800 Kees Cook wrote:
>
> On Tue, Mar 01, 2022 at 09:27:30AM +1100, Stephen Rothwell wrote:
> >
> > After merging the kspp tree, today's linux-next build (x86_64
> > allmodconfig) failed like this:
> >
> > drivers/gpu/drm/drm_dp_helper.c: In function 'drm_
On 01/03/2022 19:57, John Harrison wrote:
On 3/1/2022 02:50, Tvrtko Ursulin wrote:
On 28/02/2022 18:32, John Harrison wrote:
On 2/28/2022 08:11, Tvrtko Ursulin wrote:
On 25/02/2022 17:39, John Harrison wrote:
On 2/25/2022 09:06, Tvrtko Ursulin wrote:
On 24/02/2022 19:19, John Harrison wro
Support to parse multiple CEA extension blocks and HF-EEODB to
extend drm edid driver's capability.
v4: add one more patch to support HF-SCDB
Lee Shawn C (5):
drm/edid: seek for available CEA block from specific EDID block index
drm/edid: parse multiple CEA extension block
drm/edid: read HF
drm_find_cea_extension() always look for a top level CEA block. Pass
ext_index from caller then this function to search next available
CEA ext block from a specific EDID block pointer.
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Ankit Nautiyal
Signed-off-by: Lee Shawn C
---
drivers/gpu/drm/drm_edid
Try to find and parse more CEA ext blocks if edid->extensions
is greater than one.
v2: split prvious patch to two. And do CEA block parsing
in this one.
v3: simplify this patch based on previous change.
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Ankit Nautiyal
Signed-off-by: Lee Shawn C
---
d
Find HF-SCDB information in CEA extensions block. And retrieve
Max_TMDS_Character_Rate that support by sink device.
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Ankit Nautiyal
Signed-off-by: Lee Shawn C
---
drivers/gpu/drm/drm_edid.c | 36
1 file changed, 36 inse
While adding CEA modes, try to get available EEODB block
number. Then based on it to parse numbers of ext blocks,
retrieve CEA information and add more CEA modes.
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Ankit Nautiyal
Signed-off-by: Lee Shawn C
---
drivers/gpu/drm/drm_displayid.c | 5 -
dr
According to HDMI 2.1 spec.
"The HDMI Forum EDID Extension Override Data Block (HF-EEODB)
is utilized by Sink Devices to provide an alternate method to
indicate an EDID Extension Block count larger than 1, while
avoiding the need to present a VESA Block Map in the first
E-EDID Extension Block."
I
Am Mittwoch, dem 02.03.2022 um 03:54 +0100 schrieb Marek Vasut:
> On 3/1/22 14:18, Lucas Stach wrote:
> > Am Dienstag, dem 01.03.2022 um 07:03 -0600 schrieb Adam Ford:
> > > On Tue, Mar 1, 2022 at 5:05 AM Lucas Stach wrote:
> > > >
> > > > Am Dienstag, dem 01.03.2022 um 11:19 +0100 schrieb Marek
On 02/03/2022 00.55, Linus Torvalds wrote:
> On Tue, Mar 1, 2022 at 3:19 PM David Laight wrote:
>>
> With the "don't use iterator outside the loop" approach, the exact
> same code works in both the old world order and the new world order,
> and you don't have the semantic confusion. And *if* you
On Wed, 2022-03-02 at 10:23 +0100, Lucas Stach wrote:
> Am Mittwoch, dem 02.03.2022 um 03:54 +0100 schrieb Marek Vasut:
> > On 3/1/22 14:18, Lucas Stach wrote:
> > > Am Dienstag, dem 01.03.2022 um 07:03 -0600 schrieb Adam Ford:
> > > > On Tue, Mar 1, 2022 at 5:05 AM Lucas Stach
> > > > wrote:
> >
As the potential failure of the dma_set_mask(),
it should be better to check it and return error
if fails.
Fixes: d76271d22694 ("drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort
Subsystem")
Signed-off-by: Jiasheng Jiang
---
drivers/gpu/drm/xlnx/zynqmp_dpsub.c | 4 +++-
1 file changed, 3
On 25/02/2022 20:41, john.c.harri...@intel.com wrote:
From: John Harrison
GuC converts the pre-emption timeout and timeslice quantum values into
clock ticks internally. That significantly reduces the point of 32bit
overflow. On current platforms, worst case scenario is approximately
110 secon
On Thu, Feb 17, 2022 at 01:25:19AM +0100, Marek Vasut wrote:
> The chip register layout has nothing to do with MIPI DCS, the registers
> incorrectly marked as MIPI DCS in the driver are regular chip registers
> often with completely different function.
>
> Fill in the actual register names and bit
On Thu, Feb 17, 2022 at 01:25:20AM +0100, Marek Vasut wrote:
> The HFP_HSW_HBP_HI register must be programmed with 2 LSbits of each
> Horizontal Front Porch/Sync/Back Porch. Currently the driver programs
> this register to 0, which breaks displays with either value above 255.
>
> The HFP_MIN regis
On Thu, Feb 17, 2022 at 01:25:21AM +0100, Marek Vasut wrote:
> The driver currently hard-codes HS/VS polarity to active-low and DE to
> active-high, which is not correct for a lot of supported DPI panels.
> Add the missing mode flag handling for HS/VS/DE polarity.
>
> Signed-off-by: Marek Vasut
>
On Thu, Feb 17, 2022 at 01:25:22AM +0100, Marek Vasut wrote:
> The driver currently hard-codes DSI lane count to two, however the chip
> is capable of operating in 1..4 DSI lanes mode. Parse 'data-lanes' DT
> property and program the result into DSI_CTRL register.
>
> Signed-off-by: Marek Vasut
>
On Thu, Feb 17, 2022 at 01:25:23AM +0100, Marek Vasut wrote:
> The chip contains fractional PLL, however the driver currently hard-codes
> one specific PLL setting. Implement generic PLL parameter calculation code,
> so any DPI panel with arbitrary pixel clock can be attached to this bridge.
>
> T
On Thu, Feb 17, 2022 at 01:25:24AM +0100, Marek Vasut wrote:
> The DSI burst mode is more energy efficient than the DSI sync pulse mode,
> make use of the burst mode since the chip supports it as well. Disable the
> generation of EoT packet, the chip ignores it, so no point in emitting it.
> Enable
On Thu, Feb 17, 2022 at 01:25:25AM +0100, Marek Vasut wrote:
> The chip is capable of swapping DPI RGB channels. The driver currently
> does not implement support for this functionality. Write the MIPI_PN_SWAP
> register to 0 to assure the color swap is disabled.
>
> Signed-off-by: Marek Vasut
>
On Thu, Feb 17, 2022 at 01:25:26AM +0100, Marek Vasut wrote:
> Both example code [1], [2] as well as one provided by custom panel vendor
> set register SYS_CTRL_1 to 0x88. What exactly does the value mean is unknown
> due to unavailable datasheet. Align this register value with example code.
>
> [
On Thu, Feb 17, 2022 at 01:25:27AM +0100, Marek Vasut wrote:
> Implement .atomic_get_input_bus_fmts callback, which sets up the
> input (DSI-end) format, and that format can then be used in pipeline
> format negotiation between the DSI-end of this bridge and the other
> component closer to the scan
Il 22/02/22 11:07, Nancy.Lin ha scritto:
This is a preparation for adding support for the ovl_adaptor sub driver
Ovl_adaptor is a DRM sub driver, which doesn't have dma dev. Add
dma_dev_get function for getting representative dma dev in ovl_adaptor.
Signed-off-by: Nancy.Lin
Reviewed-by: Angel
On Thu, Feb 17, 2022 at 01:25:28AM +0100, Marek Vasut wrote:
> The ICN6211 chip starts in I2C configuration mode after cold boot.
> Implement support for configuring the chip via I2C in addition to
> the current DSI LP command mode configuration support. The later
> seems to be available only on ch
On Thu, Feb 17, 2022 at 01:25:29AM +0100, Marek Vasut wrote:
> Rename and inline macro ICN6211_DSI() into function chipone_writeb()
> to keep all function names lower-case. No functional change.
>
> Signed-off-by: Marek Vasut
> Cc: Jagan Teki
> Cc: Maxime Ripard
> Cc: Robert Foss
> Cc: Sam Rav
On Thu, Feb 17, 2022 at 01:25:30AM +0100, Marek Vasut wrote:
> Read out the Vendor/Chip/Version ID registers from the chip before
> performing any configuration, and validate that the registers have
> correct values. This is mostly a simple test whether DSI register
> access does work, since that t
Il 22/02/22 11:07, Nancy.Lin ha scritto:
Add display node for vdosys1.
Signed-off-by: Nancy.Lin
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 222 +++
1 file changed, 222 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
b/arch/arm64/boot/dts/mediatek
Il 22/02/22 11:07, Nancy.Lin ha scritto:
Add vdosys1 RDMA definition.
Signed-off-by: Nancy.Lin
---
.../arm/mediatek/mediatek,mdp-rdma.yaml | 77 +++
1 file changed, 77 insertions(+)
create mode 100644
Documentation/devicetree/bindings/arm/mediatek/mediatek,mdp-rdma.y
Il 22/02/22 11:07, Nancy.Lin ha scritto:
Add vdosys1 ETHDR definition.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
.../display/mediatek/mediatek,ethdr.yaml | 147 ++
1 file changed, 147 insertions(+)
create mode 100644
Documentation/devicetree/bindings/di
Il 22/02/22 11:07, Nancy.Lin ha scritto:
Add vdosys1 reset control bit for MT8195 platform.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Reviewed-by: AngeloGioacchino Del Regno
The first patch of the series addresses a vm open count bug by
removing the vm open count.
The second patch removes the vma refcount that is no longer needed;
the vma is kept a live by taking the vm refcount and object lock.
Finally the last patch removes some unnecessary code. There should be
no
vms are not getting properly closed. Rather than fixing that,
Remove the vm open count and instead rely on the vm refcount.
The vm open count existed solely to break the strong references the
vmas had on the vms. Now instead make those references weak and
ensure vmas are destroyed when the vm is d
Now that i915_vma_parked() is taking the object lock on vma destruction,
and the only user of the vma refcount, i915_gem_object_unbind()
also takes the object lock, remove the vma refcount.
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/i915/i915_gem.c | 17 +
drivers/
The test for vma should always return true, and when assigning -EBUSY
to ret, the variable should already have that value.
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/i915/i915_gem.c | 32 ++--
1 file changed, 14 insertions(+), 18 deletions(-)
diff --git a/dr
H,
On 01/03/2022 21:37, H. Nikolaus Schaller wrote:
Hi Neil,
Am 01.03.2022 um 10:18 schrieb Neil Armstrong :
Hi,
On 26/02/2022 18:13, H. Nikolaus Schaller wrote:
Commit 7cd70656d1285b ("drm/bridge: display-connector: implement bus fmts
callbacks")
introduced a new mechanism to negotiate b
Hi,
On 3/2/22 02:34, Stephen Rothwell wrote:
> Hi all,
>
> On Wed, 2 Feb 2022 09:38:37 +0100 Hans de Goede wrote:
>>
>> On 2/2/22 05:03, Stephen Rothwell wrote:
>>>
>>> On Wed, 2 Feb 2022 15:02:01 +1100 Stephen Rothwell
>>> wrote:
After merging the drm tree, today's linux-next buil
+ Thomas, Matt
On 02/03/2022 06:19, Jiasheng Jiang wrote:
As the potential failure of the i915_gem_object_trylock(),
it should be better to check it and return error if fails.
Fixes: 94ce0d65076c ("drm/i915/gt: Setup a default migration context on the GT")
Signed-off-by: Jiasheng Jiang
---
Hi Christophe,
Le mar., mars 1 2022 at 16:31:21 +0100, Christophe Branchereau
a écrit :
This driver supports the NewVision NV3052C based LCDs. Right now, it
only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel,
which
can be found in the Anbernic RG-350M handheld console.
You'd
On 01/03/2022 20:59, John Harrison wrote:
On 3/1/2022 04:09, Tvrtko Ursulin wrote:
I'll trim it a bit again..
On 28/02/2022 18:55, John Harrison wrote:
On 2/28/2022 09:12, Tvrtko Ursulin wrote:
On 25/02/2022 18:48, John Harrison wrote:
On 2/25/2022 10:14, Tvrtko Ursulin wrote:
[snip]
Y
Hi Neil,
> Am 02.03.2022 um 11:25 schrieb Neil Armstrong :
>
>> I added a printk for hdmi->sink_is_hdmi. This returns 1. Which IMHO is to be
>> expected
>> since I am using a HDMI connector and panel... So your patch will still add
>> the UYVY formats.
>> Either the synposys module inside the j
On 28/02/2022 19:17, John Harrison wrote:
On 2/28/2022 07:32, Tvrtko Ursulin wrote:
On 25/02/2022 19:03, John Harrison wrote:
On 2/25/2022 10:29, Tvrtko Ursulin wrote:
On 25/02/2022 18:01, John Harrison wrote:
On 2/25/2022 09:39, Tvrtko Ursulin wrote:
On 25/02/2022 17:11, John Harrison wro
Hi Christophe,
Le mar., mars 1 2022 at 16:31:22 +0100, Christophe Branchereau
a écrit :
Following the introduction of bridge_atomic_enable in the ingenic
drm driver, the crtc is enabled between .prepare and .enable, if
it exists.
Add it so the backlight is only enabled after the crtc is, to a
On Tue, Mar 01, 2022 at 01:39:31PM +, Robin Murphy wrote:
> On 2022-02-28 14:19, Sascha Hauer wrote:
> > On Fri, Feb 25, 2022 at 02:11:54PM +0100, Sascha Hauer wrote:
> > > On Fri, Feb 25, 2022 at 12:41:23PM +, Robin Murphy wrote:
> > > > On 2022-02-25 11:10, Dmitry Osipenko wrote:
> > > >
Hi,
On Tue, Mar 01, 2022 at 07:42:41PM +0530, Jagan Teki wrote:
> devm_drm_of_get_bridge is capable of looking up the downstream
> bridge and panel and trying to add a panel bridge if the panel
> is found.
>
> Replace explicit finding calls with devm_drm_of_get_bridge.
>
> Cc: Guido Günther
> Si
On Tue, 01 Mar 2022, Rudraksha Gupta wrote:
> Hi all,
>
>
> I am getting this warning when compiling the kernel for the MSM8960 with
> this defconfig:
> https://raw.githubusercontent.com/apq8064-mainline/linux/qcom-apq8064-next/arch/arm/configs/qcom_apq8064_defconfig
>
>
> Warning:
>
> ../driver
Hi Liu,
On Wed, Feb 16, 2022 at 04:58:42PM +0800, Liu Ying wrote:
> To initialize register NWL_DSI_IRQ_MASK, it's enough to write it
> only once in function nwl_dsi_init_interrupts().
>
> Signed-off-by: Liu Ying
> ---
> drivers/gpu/drm/bridge/nwl-dsi.c | 14 +-
> 1 file changed, 5 in
Hi Hans,
On Wed, 2 Mar 2022 11:32:37 +0100 Hans de Goede wrote:
>
> On 3/2/22 02:34, Stephen Rothwell wrote:
> > Hi all,
> >
> > On Wed, 2 Feb 2022 09:38:37 +0100 Hans de Goede
> > wrote:
> >>
> >> On 2/2/22 05:03, Stephen Rothwell wrote:
> >>>
> >>> On Wed, 2 Feb 2022 15:02:01 +1100 Steph
On 01/03/2022 15:13, Sebastian Andrzej Siewior wrote:
On 2022-03-01 14:27:18 [+], Tvrtko Ursulin wrote:
you see:
0003-drm-i915-Use-preempt_disable-enable_rt-where-recomme.patch
0004-drm-i915-Don-t-disable-interrupts-on-PREEMPT_RT-duri.patch
Two for the display folks.
000
Am Mittwoch, dem 02.03.2022 um 17:41 +0800 schrieb Liu Ying:
> On Wed, 2022-03-02 at 10:23 +0100, Lucas Stach wrote:
> > Am Mittwoch, dem 02.03.2022 um 03:54 +0100 schrieb Marek Vasut:
> > > On 3/1/22 14:18, Lucas Stach wrote:
> > > > Am Dienstag, dem 01.03.2022 um 07:03 -0600 schrieb Adam Ford:
>
On Wed, Mar 2, 2022 at 5:37 AM Jagan Teki wrote:
> On Wed, Mar 2, 2022 at 4:50 AM Linus Walleij wrote:
> >
> > On Tue, Mar 1, 2022 at 3:13 PM Jagan Teki
> > wrote:
> >
> > > + bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, 0);
> > > + if (IS_ERR(bridge)) {
> > > +
As downstream sink was set into standby mode while bridge disabled,
this patch used for setting downstream sink into normal status
while enable bridge.
Signed-off-by: Xin Ji
---
drivers/gpu/drm/bridge/analogix/anx7625.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/
On 3/2/22 1:09 AM, Steven Price wrote:
On 01/03/2022 12:43, t...@redhat.com wrote:
From: Tom Rix
For spdx
change tab to space delimiter
Use // for *.c
Replacements
commited to committed, use multiline comment style
regsiters to registers
initialze to initialize
Signed-off-by: Tom Rix
Tha
On 3/1/22 20:12, Robin Murphy wrote:
On 2022-03-01 16:14, cyn...@kapsi.fi wrote:
From: Mikko Perttunen
Add schema information for specifying context stream IDs. This uses
the standard iommu-map property.
Signed-off-by: Mikko Perttunen
---
v3:
* New patch
v4:
* Remove memory-contexts subnode.
On 2022-03-02 11:42:35 [+], Tvrtko Ursulin wrote:
> > > > 0005-drm-i915-Don-t-check-for-atomic-context-on-PREEMPT_R.patch
> > >
> > > What do preempt_disable/enable do on PREEMPT_RT? Thinking if instead the
> > > solution could be to always force the !ATOMIC path (for the whole
> > > _wai
From: Tom Rix
For spdx
change tab to space delimiter
Use // for *.c
Replacements
commited to committed
regsiters to registers
initialze to initialize
Signed-off-by: Tom Rix
---
v2: remove multiline comment change
drivers/gpu/drm/panfrost/panfrost_drv.c | 2 +-
drivers/gpu/drm/panfro
On 2022-02-25 19:27, Michael Cheng wrote:
Hi Robin,
[ +arm64 maintainers for their awareness, which would have been a good
thing to do from the start ]
* Thanks for adding the arm64 maintainer and sorry I didn't rope them
in sooner.
Why does i915 need to ensure the CPU's instruction ca
On Wed, 2022-03-02 at 03:23 +0530, Ramalingam C wrote:
> When a driver needs extra pages in ttm_tt, to facilidate such
> requirement, parameter called "extra_pages" is added for
> ttm_tt_init
nit: Please use imperative wording in commit title and description,
"Add a parameter to add extra pages.."
On Wed, 2022-03-02 at 03:23 +0530, Ramalingam C wrote:
> On Xe-HP and later devices, we use dedicated compression control
> state (CCS) stored in local memory for each surface, to support the
> 3D and media compression formats.
>
> The memory required for the CCS of the entire local memory is 1/25
On Wed, 2 Mar 2022 at 12:35, Guido Günther wrote:
>
> Hi Liu,
> On Wed, Feb 16, 2022 at 04:58:42PM +0800, Liu Ying wrote:
> > To initialize register NWL_DSI_IRQ_MASK, it's enough to write it
> > only once in function nwl_dsi_init_interrupts().
> >
> > Signed-off-by: Liu Ying
> > ---
> > drivers/
Am 01.03.22 um 22:53 schrieb Ramalingam C:
When a driver needs extra pages in ttm_tt, to facilidate such
requirement, parameter called "extra_pages" is added for
ttm_tt_init
Signed-off-by: Ramalingam C
cc: Christian Koenig
cc: Hellstrom Thomas
With the nits pointed out by Thomas the patch i
On 02/03/2022 12:45, t...@redhat.com wrote:
> From: Tom Rix
>
> For spdx
> change tab to space delimiter
> Use // for *.c
>
> Replacements
> commited to committed
> regsiters to registers
> initialze to initialize
>
> Signed-off-by: Tom Rix
Reviewed-by: Steven Price
> ---
> v2: remove multi
Hi Andrzej
On Mon, 28 Feb 2022 at 15:36, Andrzej Hajda wrote:
>
>
>
> On 22.02.2022 09:43, Dave Stevenson wrote:
> > Hi Laurent.
> >
> > Thanks for the review.
> >
> > On Tue, 22 Feb 2022 at 06:34, Laurent Pinchart
> > wrote:
> >> Hi Dave,
> >>
> >> Thank you for the patch.
> >>
> >> On Wed, Feb
From: Xiaomeng Tong
> Sent: 02 March 2022 09:31
>
> On Mon, 28 Feb 2022 16:41:04 -0800, Linus Torvalds
> wrote:
> >
> > But basically to _me_, the important part is that the end result is
> > maintainable longer-term.
>
> I couldn't agree more. And because of that, I stick with the following
> a
https://bugzilla.kernel.org/show_bug.cgi?id=215648
--- Comment #3 from Alex Deucher (alexdeuc...@gmail.com) ---
Thanks. Can you get the dmesg output from boot prior to the hang?
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https://bugzilla.kernel.org/show_bug.cgi?id=215648
--- Comment #4 from Philipp Riederer (pr_ker...@tum.fail) ---
Created attachment 300517
--> https://bugzilla.kernel.org/attachment.cgi?id=300517&action=edit
dmesg from boot using kernel 5.15.12@94ba5b0fb52d6dbf1f200351876a839afb74aedd
--
You m
https://bugzilla.kernel.org/show_bug.cgi?id=215648
--- Comment #5 from Philipp Riederer (pr_ker...@tum.fail) ---
Hey,
Thank you for working on this!
I added the dmesg as attachment to the bug. Please note that this is from the
working kernel (commit 94ba5b0fb52d6dbf1f200351876a839afb74aedd) as t
Hi,
Please try to avoid top posting
On Wed, Feb 23, 2022 at 04:25:19PM +0100, Max Krummenacher wrote:
> The goal here is to set the element bus_format in the struct
> panel_desc. This is an enum with the possible values defined in
> include/uapi/linux/media-bus-format.h.
>
> The enum values are
When the sm712fb driver writes three bytes to the framebuffer, the
driver will crash:
BUG: unable to handle page fault for address: c90001ff
RIP: 0010:smtcfb_write+0x454/0x5b0
Call Trace:
vfs_write+0x291/0xd60
? do_sys_openat2+0x27d/0x350
? __fget_light+0x54/0x34
Hi,
On 02/03/2022 12:15, H. Nikolaus Schaller wrote:
Hi Neil,
Am 02.03.2022 um 11:25 schrieb Neil Armstrong :
I added a printk for hdmi->sink_is_hdmi. This returns 1. Which IMHO is to be
expected
since I am using a HDMI connector and panel... So your patch will still add the
UYVY formats.
On 3/2/22 10:59, Maxime Ripard wrote:
On Thu, Feb 17, 2022 at 01:25:21AM +0100, Marek Vasut wrote:
The driver currently hard-codes HS/VS polarity to active-low and DE to
active-high, which is not correct for a lot of supported DPI panels.
Add the missing mode flag handling for HS/VS/DE polarity.
On 3/2/22 11:01, Maxime Ripard wrote:
On Thu, Feb 17, 2022 at 01:25:22AM +0100, Marek Vasut wrote:
The driver currently hard-codes DSI lane count to two, however the chip
is capable of operating in 1..4 DSI lanes mode. Parse 'data-lanes' DT
property and program the result into DSI_CTRL register.
From: Zack Rusin
Series finishes 3D support on arm64 with vmwgfx. With this and changes
that add svga3 pci id's to Mesa3D - OpenGL 4.3 and GLES 3.1 work smoothly
on arm64.
Most changes are not svga3 specific but rather co
From: Zack Rusin
Capabilities were logged at the end of initialization so any early errors
would make them not appear in the logs. Which is also when they're needed
the most.
Print the the capabilities right after fetching them, before the init
code starts using them to make sure they always show
From: Zack Rusin
The results of the legacy display unit initialization were being silently
ignored. Unifying the selection of number of display units based
on whether the underlying device supports multimon makes it easier
to add error checking to all paths.
This makes the driver report the erro
From: Zack Rusin
Port of the vmwgfx to SVGAv3 lacked support for fencing. SVGAv3 removed
FIFO's and replaced them with command buffers and extra registers.
The initial version of SVGAv3 lacked support for most advanced features
(e.g. 3D) which made fences unnecessary. That is no longer the case,
From: Martin Krastev
* Add support for CursorMob
* Add support for CursorBypass 4
* Refactor vmw_du_cursor_plane_atomic_update to be kms-helper-atomic
-- move BO mappings to vmw_du_cursor_plane_prepare_fb
-- move BO unmappings to vmw_du_cursor_plane_cleanup_fb
Cursor mobs are a new svga feat
From: Zack Rusin
SVGAv3 deprecates legacy interrupts and adds support for MSI/MSI-X. With
MSI the driver visible side remains largely unchanged but with MSI-X
each interrupt gets delivered on its own vector.
Add support for MSI/MSI-X while preserving the old functionality for
SVGAv2. Code betwee
From: Zack Rusin
Mesa3D loaders require knowledge of the devices PCI id. SVGAv2 and v3
have different PCI id's, but the same driver is used to handle them both.
To allow Mesa3D svga driver to be loaded automatically for both SVGAv2
and SVGAv3 make the kernel return the PCI id of the currently run
From: Zack Rusin
Initial version of guest backed objects in the host had some performance
issues that made using surface-dma's instead of direct copies faster.
Surface dma's force a migration to vram which at best is slow and at
worst is impossible (e.g. on svga3 where there's not enough vram
to
From: Zack Rusin
Transition to drm_mode_fb_cmd2 from drm_mode_fb_cmd left the structure
unitialized. drm_mode_fb_cmd2 adds a few additional members, e.g. flags
and modifiers which were never initialized. Garbage in those members
can cause random failures during the bringup of the fbcon.
Initiali
Thanks for the feedback Robin!
Sorry my choices of word weren't that great, but what I meant is to
understand how ARM flushes a range of dcache for device drivers, and not
an equal to x86 clflush.
I believe the concern is if the CPU writes an update, that update might
only be sitting in the
On 3/2/22 15:21, Maxime Ripard wrote:
Hi,
Hi,
Please try to avoid top posting
On Wed, Feb 23, 2022 at 04:25:19PM +0100, Max Krummenacher wrote:
The goal here is to set the element bus_format in the struct
panel_desc. This is an enum with the possible values defined in
include/uapi/linux/med
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