On Thu, 3 Dec 2020 21:45:14 +0100
Daniel Vetter wrote:
> On Thu, Dec 3, 2020 at 7:55 PM James Park wrote:
> >
> > The trailing underscore for DRM_FOURCC_STANDALONE_ isn't
> > intentional, right? Should I put all the integer types, or just the
> > ones that are used in that file?
>
> Yeah tha
From: Arnd Bergmann
As the DRM_AMD_DC_DCN3_0 code was x86-only and fails to build on
arm64, merging it into DRM_AMD_DC means that the top-level symbol
is now x86-only as well.
Compilation fails on arm64 with clang-12 with
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:
Thinking more about that I came to the conclusion that the whole
approach here isn't correct.
See even when the job has been completed or canceled we still want to
restart the timer.
The reason for this is that the timer is then not restarted for the
current job, but for the next job in the
Am 04.12.20 um 04:17 schrieb Luben Tuikov:
The drm_sched_job_done() callback now moves done
jobs from the pending list to a "done" list.
In drm_sched_job_timeout, make use of the status
returned by a GPU driver job timeout handler to
decide whether to leave the oldest job in the
pending list, or
On Mon, Nov 16, 2020 at 07:54:03PM +, Paul Cercueil wrote:
> Hi Krzysztof,
>
> Le lun. 16 nov. 2020 à 18:53, Krzysztof Kozlowski a écrit
> :
> > The Ingenic DRM uses Common Clock Framework thus it cannot be built on
> > platforms without it (e.g. compile test on MIPS with RALINK and
> > SOC_R
This add support & bindings for the Khadas TS050 1080x1920 5" LCD DSI panel
designed
to work with the Khadas Edge-V, Captain, VIM3 and VIM3L Single Board Computers.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.
Changes since v1:
- removed drm_print i
This add the bindings for the Khadas TS050 1080x1920 5" LCD DSI panel designed
to work
with the Khadas Edge-V, Captain, VIM3 and VIM3L Single Board Computers.
Signed-off-by: Neil Armstrong
Reviewed-by: Sam Ravnborg
---
.../devicetree/bindings/display/panel/panel-simple-dsi.yaml | 2 ++
1 f
This add support for the Khadas TS050 1080x1920 5" LCD DSI panel designed to
work
with the Khadas Edge-V, Captain, VIM3 and VIM3L Single Board Computers.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.
The init values was taken from the vendor source t
Hi
Am 03.12.20 um 21:41 schrieb Daniel Vetter:
On Thu, Dec 03, 2020 at 07:59:04PM +0100, Thomas Zimmermann wrote:
Hi
Am 03.12.20 um 16:26 schrieb Daniel Vetter:
On Thu, Dec 03, 2020 at 03:02:59PM +0100, Thomas Zimmermann wrote:
Dma-buf's vmap and vunmap callbacks are undocumented and various
From: Mikhail Durnev
Intel 8080 type (Type B) parallel bus over GPIO.
The parallel bus is implemented partially. It supports only write
operations from the host to the display. Read operations would
require switching GPIO mode between input and output back and
forth. But this implementation is v
It's useful to know the total number of underflow events and currently
the debug stats are getting reset each time CRTC is being disabled. Let's
account the overall number of events that doesn't get a reset.
Tested-by: Peter Geis
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
dr
Hi,
Here's a series adding support for the DSI0 controller in the BCM2835 and the
DSI1 controller found in the BCM2711.
Let me know what you think,
Maxime
Dave Stevenson (5):
drm/vc4: dsi: Correct DSI register definition
drm/vc4: dsi: Add support for DSI0
dt-bindings: Add compatible for BC
fixed the coccicheck:
drivers/gpu/drm/nouveau/include/nvfw/hs.h:26:5-9: WARNING use
flexible-array member instead.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/nouveau/include/nvfw/hs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/include/nvfw/hs.h
Function dev_err() after platform_get_irq() is redundant because
platform_get_irq() already prints an error.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
b/drivers/gpu/drm/fsl-d
Replace alloc and copy with vmemdup_user()
Signed-off-by: Tian Tao
---
drivers/gpu/drm/nouveau/nouveau_gem.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c
b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 787d05e..df986d9 10064
This patch moves ACTMON driver away from generating OPP table by itself,
transitioning it to use the table which comes from device-tree. This
change breaks compatibility with older device-trees and brings support
for the interconnect framework to the driver. This is a mandatory change
which needs t
As THIS_MODULE has been set in platform_driver_register(),
so remove it.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/tilcdc/tilcdc_panel.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
index 00efc30..4235780 1006
From: Dave Stevenson
DSI1 on BCM2711 doesn't require the DMA workaround that is used
on BCM2835/6/7, therefore it needs a new compatible string.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml | 1 +
1 file change
On 18/11/2020 13:03, Lukasz Luba wrote:
> Devfreq cooling needs to now the correct status of the device in order
> to operate. Do not rely on Devfreq last_status which might be a stale data
> and get more up-to-date values of the load.
>
> Devfreq framework can change the device status in the back
From: Mikhail Durnev
Hi All,
This patch series is aiming at extending the mipi-dbi bus driver
to support Intel 8080 type parallel bus (Type B) over GPIO and
adding a new driver for ILI9341 display panels with 8- or 16-bit
parallel interface.
It was tested with the MRB2801 display module [1] tha
All warnings are related only to "wrong indentation", except one:
Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml:4:1: \
[error] missing document start "---" (document-start)
Signed-off-by: Zhen Lei
Cc: Rob Herring
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: Shawn Guo
Cc: Sascha Haue
Delete the entire file hibmc_ttm.c. drmm_vram_helper_init() can be
called directly from hibmc_load(). hibmc_dumb_create() and
hibmc_mode_funcs can go to hibmc_drm_drv.c
v2:
change Deletted to Delete
Signed-off-by: Tian Tao
Reviewed-by: Thomas Zimmermann
---
drivers/gpu/drm/hisilicon/hibmc/Make
From: Dave Stevenson
BCM2711 DSI1 doesn't have the issue with the ARM not being
able to write to the registers, therefore remove the DMA
workaround for that compatible string.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_dsi.c | 12 ++--
1 fil
From: Dave Stevenson
Updates the compatible string for DSI1 on BCM2711 to
differentiate it from BCM2835.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/bcm2711.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/
It is redundant to do irqsave and irqrestore in hardIRQ context.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index b17ac6c..b2fb5c3
Display controller (DC) performs isochronous memory transfers, and thus,
has a requirement for a minimum memory bandwidth that shall be fulfilled,
otherwise framebuffer data can't be fetched fast enough and this results
in a DC's data-FIFO underflow that follows by a visual corruption.
The Memory
Hi!
On 2020-12-03 15:42, Chuhong Yuan wrote:
> setcmap_legacy() does not call drm_modeset_unlock_all() in some exits,
> add the missed unlocks with goto to fix it.
>
> Fixes: 964c60063bff ("drm/fb-helper: separate the fb_setcmap helper into
> atomic and legacy paths")
> Signed-off-by: Chuhong Yu
Hi Daniel, Dave,
Here's this week round of fixes for drm-misc
Thanks!
Maxime
drm-misc-fixes-2020-12-03:
One bridge fix for OMAP, one for a race condition in a panel, two for
uninitialized variables in rockchip and nouveau, and two fixes for mxsfb
to fix a regression with modifiers and a fix for
As we are using bus negotiations for selecting bus format
remove the setting of bus format using the connector info
structure.
Signed-off-by: Yuti Amonkar
---
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/bridge/caden
From: Dave Stevenson
The DSI1_PHY_AFEC0_PD_DLANE1 and DSI1_PHY_AFEC0_PD_DLANE3 register
definitions were swapped, so trying to use more than a single data
lane failed as lane 1 would get powered down.
(In theory a 4 lane device would work as all lanes would remain
powered).
Correct the definitio
Support hardware versioning, which is now required for Tegra20 EMC OPP.
Clean up OPP table initialization by using a error code returned by OPP
API for judging about the OPP table presence in a device-tree and remove
OPP regulator initialization because we're now going to use power domain
instead o
Similar to a9d9fea74be2 ("drm/mediatek: mtk_dsi: Create connector for bridges"):
Use the drm_bridge_connector helper to create a connector for pipelines
that use drm_bridge. This allows splitting connector operations across
multiple bridges when necessary, instead of having the last bridge in
the
The trailing underscore for DRM_FOURCC_STANDALONE_ isn't intentional,
right? Should I put all the integer types, or just the ones that are used
in that file?
Thanks,
James
On Thu, Dec 3, 2020 at 6:52 AM Daniel Vetter wrote:
> On Thu, Dec 3, 2020 at 9:18 AM Michel Dänzer wrote:
> >
> > On 2020
There're too many people, I just send to the maintainer, reviewer, supporter.
Eliminate below warnings:
./Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml:32:13: [warning]
wrong indentation: expected 14 but found 12 (indentation)
./Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yam
Deletted the entire file hibmc_ttm.c. drmm_vram_helper_init() can be
called directly from hibmc_load(). hibmc_dumb_create() and
hibmc_mode_funcs can go to hibmc_drm_drv.c
Signed-off-by: Tian Tao
---
drivers/gpu/drm/hisilicon/hibmc/Makefile| 2 +-
drivers/gpu/drm/hisilicon/hibmc/hibmc_dr
The gvt component of this driver has ~120 pr_debugs, in 9 "classes".
Following model of drm.debug, add a parameter to map bits to these
classes.
In Makefile, add DYNAMIC_DEBUG_MODULE. This converts gvt's pr_debugs,
even if the rest of drm is not using CONFIG_DRM_USE_DYNAMIC_DEBUG.
Signed-off-by:
Sorry, Forgot to say: This patch is based on the latest linux-next code.
On 2020/12/4 10:42, Zhen Lei wrote:
> There're too many people, I just send to the maintainer, reviewer, supporter.
>
> Eliminate below warnings:
> ./Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml:32:13: [warning
The Northwest Logic MIPI DSI host controller embedded in i.MX8qxp
works with a Mixel MIPI DPHY + LVDS PHY combo to support either
a MIPI DSI display or a LVDS display. So, this patch calls
phy_set_mode() from nwl_dsi_enable() to set PHY mode to MIPI DPHY
explicitly.
Cc: Guido Günther
Cc: Robert
Document opp-supported-hw property, which is not strictly necessary to
have on Tegra20, but it's very convenient to have because all other SoC
core devices will use hardware versioning, and thus, it's good to maintain
the consistency.
Signed-off-by: Dmitry Osipenko
---
.../bindings/memory-contro
patch #1 add a new file to implements i2c adapters, #2 read the
resolution from the edid, if that fails, set the resolution to fixed.
and update the destroy callback function to release the i2c adapters
Changes since v1:
-merge patch #3 into patch #2.
-add new function to_hibmc_drm_private, modify
hello gentle readers,
These 2 rfc patches convert part of drm-world to use dynamic debug.
1st one addresses drm.debug category based logging. If DYNAMIC_DEBUG
is configured, then CONFIG_DRM_USE_DYNAMIC_DEBUG controls whether
dynamic-debug is used to avoid runtime costs of drm_debug_enabled().
We
drm_modeset_lock.h already declares struct drm_device, so there's no
need to declare it in vc4_drv.h
Signed-off-by: Tian Tao
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index 8c8d96b..8717a1c 1
On 03/12/2020 16:38, Lukasz Luba wrote:
>
>
> On 12/3/20 1:09 PM, Daniel Lezcano wrote:
>> On 18/11/2020 13:03, Lukasz Luba wrote:
>>> Devfreq cooling needs to now the correct status of the device in order
>>> to operate. Do not rely on Devfreq last_status which might be a stale
>>> data
>>> and
Add support for Mixel MIPI DPHY + LVDS PHY combo IP
as found on Freescale i.MX8qxp SoC.
Cc: Guido Günther
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Rob Herring
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt | 8 +++-
1 fil
patch #1 add a new file to implements i2c adapters, #2 read the
resolution from the edid, if that fails, set the resolution to fixed.
patch #3 update the destroy callback function to release the i2c adapters.
Tian Tao (3):
drm/hisilicon: Support i2c driver algorithms for bit-shift adapters
drm
From: Mikhail Durnev
Add binding for Ronbo MRB2801 display module.
This binding is for display panels using an Ilitek ILI9341 controller in
parallel mode.
Signed-off-by: Mikhail Durnev
---
.../devicetree/bindings/display/ronbo,mrb2801.txt | 42 ++
1 file changed, 42 inser
Add modularization support to the Tegra124 EMC driver, which now can be
compiled as a loadable kernel module.
Note that EMC clock must be registered at clk-init time, otherwise PLLM
will be disabled as unused clock at boot time if EMC driver is compiled
as a module. Hence add a prepare/complete ca
Now Internal and External memory controllers are memory interconnection
providers. This allows us to use interconnect API for tuning of memory
configuration. EMC driver now supports OPPs and DVFS. MC driver now
supports tuning of memory arbitration latency, which needs to be done
for ISO memory cli
patch #1 add a new file to implements i2c adapters, #2 read the
resolution from the edid, if that fails, set the resolution to fixed.
patch #3 update the destroy callback function to release the i2c adapters.
Tian Tao (3):
drm/hisilicon: Support i2c driver algorithms for bit-shift adapters
drm
Using drmm_mode_config_init() sets up managed release of modesetting
resources.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 13 +++--
1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
b/drivers
Add DRM_FOURCC_STANDALONE guard to skip drm.h dependency.
This will allow Mesa to port code to Windows more easily.
Signed-off-by: James Park
James Park (1):
drm: Allow drm_fourcc.h without including drm.h
include/uapi/drm/drm_fourcc.h | 6 ++
1 file changed, 6 insertions(+)
--
2.7.4
i.MX8qxp SoC embeds a Mixel MIPI DPHY + LVDS PHY combo which supports
either a MIPI DSI display or a LVDS display. The PHY mode is controlled
by SCU firmware and the driver would call a SCU firmware function to
configure the PHY mode. The single LVDS PHY has 4 data lanes to support
a LVDS display
Delete the entire file hibmc_ttm.c. drmm_vram_helper_init() can be
called directly from hibmc_load(). hibmc_dumb_create() and
hibmc_mode_funcs can go to hibmc_drm_drv.c
v2:
change Deletted to Delete
Signed-off-by: Tian Tao
Reviewed-by: Thomas Zimmermann
---
drivers/gpu/drm/hisilicon/hibmc/Make
deletted unused variable ‘priv’.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
index 04fee18..8
On 12/3/20 1:09 PM, Daniel Lezcano wrote:
On 18/11/2020 13:03, Lukasz Luba wrote:
Devfreq cooling needs to now the correct status of the device in order
to operate. Do not rely on Devfreq last_status which might be a stale data
and get more up-to-date values of the load.
Devfreq framework ca
On 18/11/2020 13:03, Lukasz Luba wrote:
> The Energy Model (EM) framework supports devices such as Devfreq. Create
> new registration functions which automatically register EM for the thermal
> devfreq_cooling devices. This patch prepares the code for coming changes
> which are going to replace old
Modify atomic_get_input_bus_format function to return input formats
supported instead of using hardcoded value.
Signed-off-by: Yuti Amonkar
---
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 83 +--
1 file changed, 74 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/b
Most of the differences between DSI0 and DSI1 are handled through the
ID. However, the BCM2711 DSI is going to introduce one more variable to
the mix and will break some expectations of the earlier, simpler, test.
Let's add a variant structure that will address most of the differences
between thos
Get the pixel format and bpc based on the output bus format
negotiated instead of hardcoding the values.
Signed-off-by: Yuti Amonkar
---
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 82 +++
1 file changed, 64 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/bridge/
This patch series add bus format negotiation support for Cadence MHDP8546
bridge driver.
The patch series has four patches in the below sequence:
1. drm: bridge: cdns-mhdp8546: Modify atomic_get_input_bus_format bridge
function.
Return all the input formats supported.
2. drm: bridge: cdns-mhd
drm's debug system uses distinct categories of debug messages, mapped
to bits in drm.debug. Currently, code does a lot of unlikely bit-mask
checks on drm.debug (in drm_debug_enabled), we can use dynamic debug
instead, and get all that jump_label goodness.
RFC: dynamic debug has no concept of cate
From: Dave Stevenson
DSI0 was partially supported, but didn't register with the main
driver, and the code was inconsistent as to whether it checked
port == 0 or port == 1.
Add compatible string and other support to make it consistent.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
Previously we were using count-weight of the T124 for T30 in order to
get EMC clock rate that was reasonable for T30. In fact the count-weight
should be x2 times smaller on T30, but then devfreq was producing a bit
too low EMC clock rate for ISO memory clients, like display controller
for example.
Now Internal and External memory controllers are memory interconnection
providers. This allows us to use interconnect API for tuning of memory
configuration. EMC driver now supports OPPs and DVFS.
Tested-by: Nicolas Chauvet
Acked-by: Georgi Djakov
Signed-off-by: Dmitry Osipenko
---
drivers/mem
The DSI clocks setup function has been using an array to store the clock
name of either the DSI0 or DSI1 blocks, using the port ID to choose the
proper one.
Let's switch to an snprintf call to do the same thing and simplify the
array a bit.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/v
setcmap_legacy() does not call drm_modeset_unlock_all() in some exits,
add the missed unlocks with goto to fix it.
Fixes: 964c60063bff ("drm/fb-helper: separate the fb_setcmap helper into atomic
and legacy paths")
Signed-off-by: Chuhong Yuan
---
drivers/gpu/drm/drm_fb_helper.c | 15 ++--
EMC driver will become mandatory after turning it into interconnect
provider because interconnect users, like display controller driver, will
fail to probe using newer device-trees that have interconnect properties.
Thus make EMC driver to probe even if timings are missing in device-tree.
Signed-o
That pointer isn't used anywhere, so there's no point in keeping it.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 -
drivers/gpu/drm/vc4/vc4_dsi.c | 9 -
2 files changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
ind
Add DRM_FOURCC_STANDALONE guard to skip drm.h dependency.
This will allow Mesa to port code to Windows more easily.
Signed-off-by: James Park
---
include/uapi/drm/drm_fourcc.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
This series brings initial support for memory interconnect to Tegra20,
Tegra30 and Tegra124 SoCs.
For the starter only display controllers and devfreq devices are getting
interconnect API support, others could be supported later on. The display
controllers have the biggest demand for interconnect
fixed the following warnings
drivers/gpu/drm/nouveau/nouveau_bo.c:1227:17: warning: variable ‘dev’
set but not used [-Wunused-but-set-variable]
drivers/gpu/drm/nouveau/nouveau_bo.c:1251:17: warning: variable ‘dev’
set but not used [-Wunused-but-set-variable]
Signed-off-by: Tian Tao
---
drivers/g
From: Mikhail Durnev
MRB2801 display module [1] is an example of ILI9341 display that connects to
Intel 8080 parallel bus. Its connector is compatible with the ALIENTEK STM32
development board.
It can be used with the drm/mipi-dbi bus driver if the bus is emulated with
GPIO.
[1] http://www.lcdw
The code has been in a irq-disabled context since it is hard IRQ. There
is no necessity to do it again.
Signed-off-by: Tian Tao
---
drivers/gpu/ipu-v3/ipu-image-convert.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-image-convert.c
b/drivers/gp
This patch allows LVDS PHYs to be configured through
the generic functions and through a custom structure
added to the generic union.
The parameters added here are based on common LVDS PHY
implementation practices. The set of parameters
should cover all potential users.
Cc: Kishon Vijay Abraham
linux/rational.h is included more than once, Remove the one that isn't
necessary.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c
b/drivers/gpu/drm/msm/dp/dp_catalog.c
index b15b4ce..105fa65 1
Hi,
This series adds i.MX8qxp LVDS PHY mode support for the Mixel PHY in the
Freescale i.MX8qxp SoC.
The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either
MIPI DPHY mode or LVDS PHY mode. The PHY mode is controlled by i.MX8qxp
SCU firmware. The PHY driver would call a SCU funct
On 12/3/20 7:01 PM, Dave Stevenson wrote:
Hi Marek
Hi,
[...]
+additionalProperties: false
+
+examples:
+ - |
+i2c1 {
Minor point.
I've just come to use this and noticed that this example puts the
device under i2c1. Seeing as it's a DSI driver with no I2C
interaction, shouldn't it be u
Am 04.12.20 um 09:32 schrieb Thomas Zimmermann:
Hi
Am 03.12.20 um 21:41 schrieb Daniel Vetter:
On Thu, Dec 03, 2020 at 07:59:04PM +0100, Thomas Zimmermann wrote:
Hi
Am 03.12.20 um 16:26 schrieb Daniel Vetter:
On Thu, Dec 03, 2020 at 03:02:59PM +0100, Thomas Zimmermann wrote:
Dma-buf's vmap
On Friday, December 4, 2020 5:53 AM, James Park
wrote:
> +#ifdef DRM_FOURCC_STANDALONE
> +#include
>
> +typedef uint32_t __u32;
> +typedef uint64_t __u64;
> +#else
> #include "drm.h"
> +#endif
C11 allows duplicate typedefs, but older versions of the standard
don't AFAIK. If this is a concern,
On 2020-11-26 at 13:07:08 +0530, Anshuman Gupta wrote:
> There can be situation when DP MST connector is created without
> mst modeset being done, in those cases connector->encoder will be
> NULL. MST connector->encoder initializes after modeset.
This patch is to reject the HDCP request on MST con
On 2020-12-04 at 14:32:16 +0530, Ramalingam C wrote:
> On 2020-11-26 at 13:07:08 +0530, Anshuman Gupta wrote:
> > There can be situation when DP MST connector is created without
> > mst modeset being done, in those cases connector->encoder will be
> > NULL. MST connector->encoder initializes after
Hi Philipp,
Thank you for the patch.
On Fri, Sep 11, 2020 at 03:57:18PM +0200, Philipp Zabel wrote:
> Add an alternative to drm_encoder_init() that allocates and initializes
> an encoder and registers drm_encoder_cleanup() with
> drmm_add_action_or_reset().
>
> Signed-off-by: Philipp Zabel
> --
Hi Linus,
On Thu, Nov 19, 2020 at 09:35:17AM +0100, Linus Walleij wrote:
> On Wed, Nov 18, 2020 at 9:29 AM Guido Günther wrote:
>
> > This adds new panel type to the mantix driver as found on the Librem 5 and
> > fixes a glitch in the init sequence (affecting both panels). The fix is at
> > the
Hi Philipp,
Thank you for the patch.
On Fri, Sep 11, 2020 at 03:57:19PM +0200, Philipp Zabel wrote:
> Add an alternative to drm_simple_encoder_init() that allocates and
> initializes a simple encoder and registers drm_encoder_cleanup() with
> drmm_add_action_or_reset().
>
> Signed-off-by: Philip
Hi Philipp,
Thank you for the patch.
On Fri, Sep 11, 2020 at 03:57:20PM +0200, Philipp Zabel wrote:
> Add an alternative to drm_universal_plane_init() that allocates
> and initializes a plane and registers drm_plane_cleanup() with
> drmm_add_action_or_reset().
>
> Signed-off-by: Philipp Zabel
>
Hi Philipp,
Thank you for the patch.
On Fri, Sep 11, 2020 at 03:57:21PM +0200, Philipp Zabel wrote:
> Add an alternative to drm_crtc_init_with_planes() that allocates
> and initializes a crtc and registers drm_crtc_cleanup() with
> drmm_add_action_or_reset().
>
> Signed-off-by: Philipp Zabel
>
The drmm_add_final_kfree() function is declared in the
include/drm/drm_managed.h public header, but has become an internal API
not exposed to drivers. Drop it from drm_managed.h as it's already
declared in drm_internal.h.
Signed-off-by: Laurent Pinchart
---
include/drm/drm_managed.h | 2 --
1 fi
Am 04.12.20 um 10:29 schrieb Laurent Pinchart:
The drmm_add_final_kfree() function is declared in the
include/drm/drm_managed.h public header, but has become an internal API
not exposed to drivers. Drop it from drm_managed.h as it's already
declared in drm_internal.h.
Signed-off-by: Laurent Pi
Hi Laurent,
On Fri, 2020-12-04 at 11:17 +0200, Laurent Pinchart wrote:
> Hi Philipp,
>
> Thank you for the patch.
Thank you for the review.
> On Fri, Sep 11, 2020 at 03:57:18PM +0200, Philipp Zabel wrote:
> > Add an alternative to drm_encoder_init() that allocates and initializes
> > an encoder
Hi Laurent,
On Fri, 2020-12-04 at 11:19 +0200, Laurent Pinchart wrote:
> Hi Philipp,
>
> Thank you for the patch.
>
> On Fri, Sep 11, 2020 at 03:57:19PM +0200, Philipp Zabel wrote:
> > Add an alternative to drm_simple_encoder_init() that allocates and
> > initializes a simple encoder and registe
On Thu, 3 Dec 2020 18:20:48 +0530
Nikhil Devshatwar wrote:
> input_bus_flags are specified in drm_bridge_timings (legacy) as well
> as drm_bridge_state->input_bus_cfg.flags
>
> The flags from the timings will be deprecated. Bridges are supposed
> to validate and set the bridge state flags from a
On Tue, 1 Dec 2020 17:48:27 +0530
Nikhil Devshatwar wrote:
> input_bus_flags are specified in drm_bridge_timings (legacy) as well
> as drm_bridge_state->input_bus_cfg.flags
>
> The flags from the timings will be deprecated. Bridges are supposed
> to validate and set the bridge state flags from a
On Tue, 1 Dec 2020 17:48:26 +0530
Nikhil Devshatwar wrote:
> With new connector model, mhdp bridge will not create the connector and
> SoC driver will rely on format negotiation to setup the encoder format.
>
> Support minimal format negotiations hooks in the drm_bridge_funcs.
> Complete format
On Tue, 1 Dec 2020 17:48:27 +0530
Nikhil Devshatwar wrote:
> input_bus_flags are specified in drm_bridge_timings (legacy) as well
> as drm_bridge_state->input_bus_cfg.flags
>
> The flags from the timings will be deprecated. Bridges are supposed
> to validate and set the bridge state flags from a
On Tue, 1 Dec 2020 17:48:28 +0530
Nikhil Devshatwar wrote:
> Remove the old code to iterate over the bridge chain, as this is
> already done by the framework.
> The bridge state should have the negotiated bus format and flags.
> Use these from the bridge's state.
> If the bridge does not support
On Fri, 4 Dec 2020 12:56:27 +0200
Tomi Valkeinen wrote:
> Hi Boris,
>
> On 04/12/2020 12:50, Boris Brezillon wrote:
> > On Tue, 1 Dec 2020 17:48:28 +0530
> > Nikhil Devshatwar wrote:
> >
> >> Remove the old code to iterate over the bridge chain, as this is
> >> already done by the framework.
Hi Sumera,
Thanks for the doc improvements.
Please see some complimentary comments below.
On 12/03, Daniel Vetter wrote:
> On Thu, Dec 3, 2020 at 8:13 PM Sumera Priyadarsini
> wrote:
> >
> > Update the vkms documentation to contain steps to:
> >
> > - setup the vkms driver
> > - run tests usin
https://bugzilla.kernel.org/show_bug.cgi?id=209123
Stuart Foster (smf-li...@virginmedia.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
On Fri, 4 Dec 2020 13:47:05 +0200
Tomi Valkeinen wrote:
> On 04/12/2020 13:12, Boris Brezillon wrote:
>
> >>> That'd be even better if you implement the bridge interface instead of
> >>> the encoder one so we can get rid of the encoder_{helper}_funcs and use
> >>> drm_simple_encoder_init().
Hi James,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-exynos/exynos-drm-next
tegra-drm/drm/tegra/for-next drm-tip/drm-tip linus/master drm/drm-next
v5.10-rc6 next-20201204]
[If your patch is
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