On 27.05.2019 12:21, Yannick Fertré wrote:
> Add power on & off optional physical operation functions, helpful to
> program specific registers of the DSI physical part.
>
> Signed-off-by: Yannick Fertré
Reviewed-by: Andrzej Hajda
--
Regards
Andrzej
> ---
> drivers/gpu/drm/bridge/synopsys/dw-mi
https://bugs.freedesktop.org/show_bug.cgi?id=110898
Bug ID: 110898
Summary: [Patch] to compile amdgpu-dkms 9.10 on debian stretch
& buster
Product: DRI
Version: DRI git
Hardware: x86-64 (AMD64)
OS: Linux (Al
On 27.05.2019 12:21, Yannick Fertré wrote:
> These new physical operations are helpful to power_on/off the dsi
> wrapper. If the dsi wrapper is powered in video mode, the display
> controller (ltdc) register access will hang when DSI fifos are full.
>
> Signed-off-by: Yannick Fertré
Reviewed-by:
https://bugs.freedesktop.org/show_bug.cgi?id=110898
Fab Stz changed:
What|Removed |Added
Component|DRM/AMDgpu |DRM/AMDgpu-pro
--
You are receiving this mai
Hi,
This serie aims at adding the support for SMMU on Komeda driver.
Also updates the device-tree doc about how to enable SMMU by devicetree.
This patch series depends on:
- https://patchwork.freedesktop.org/series/58710/
- https://patchwork.freedesktop.org/series/59000/
- https://patchwork.freed
From: "Lowry Li (Arm Technology China)"
Updates the device-tree doc about how to enable SMMU by devicetree.
Signed-off-by: Lowry Li (Arm Technology China)
Reviewed-by: Liviu Dudau
Reviewed-by: James Qian Wang (Arm Technology China)
---
Documentation/devicetree/bindings/display/arm,komeda.txt
From: "Lowry Li (Arm Technology China)"
Adds iommu_connect and disconnect for SMMU support, and configures
TBU translation once SMMU has been attached to the display device.
Signed-off-by: Lowry Li (Arm Technology China)
---
.../gpu/drm/arm/display/komeda/d71/d71_component.c | 5 +++
drivers/
On 27.05.2019 12:21, Yannick Fertré wrote:
> These patches fix a bug concerning an access issue to display controler (ltdc)
> registers.
> If the physical layer of the DSI is started too early then the fifo DSI are
> full
> very quickly which implies ltdc register's access hang up. To avoid this
>
Hi,
This serie aims at adding the support for SMMU on Komeda driver.
Also updates the device-tree doc about how to enable SMMU by devicetree.
This patch series depends on:
- https://patchwork.freedesktop.org/series/58710/
- https://patchwork.freedesktop.org/series/59000/
- https://patchwork.freed
From: "Lowry Li (Arm Technology China)"
Adds iommu_connect and disconnect for SMMU support, and configures
TBU translation once SMMU has been attached to the display device.
Signed-off-by: Lowry Li (Arm Technology China)
---
.../gpu/drm/arm/display/komeda/d71/d71_component.c | 5 +++
drivers/
From: "Lowry Li (Arm Technology China)"
Updates the device-tree doc about how to enable SMMU by devicetree.
Signed-off-by: Lowry Li (Arm Technology China)
Reviewed-by: Liviu Dudau
Reviewed-by: James Qian Wang (Arm Technology China)
---
Documentation/devicetree/bindings/display/arm,komeda.txt
Hi
Am 11.06.19 um 17:33 schrieb Daniel Vetter:
> On Tue, Jun 11, 2019 at 2:32 PM Thomas Zimmermann wrote:
>>
>> Hi
>>
>> Am 05.06.19 um 11:58 schrieb Gerd Hoffmann:
>>> On Tue, Jun 04, 2019 at 05:41:59PM +0200, Thomas Zimmermann wrote:
The cursor handling in mgag200 is complicated to underst
Hi
Am 11.06.19 um 22:29 schrieb Sam Ravnborg:
> Hi Thomas.
>
> On Tue, Jun 11, 2019 at 03:03:40PM +0200, Thomas Zimmermann wrote:
>> Another explicit lock operation of a GEM VRAM BO is located in AST's
>> framebuffer update code. Instead of locking the BO, we pin it to wherever
>> it is.
>>
>> v2
On 04.06.2019 14:22, Torsten Duwe wrote:
> From: Icenowy Zheng
>
> Some definitions currently in analogix-anx78xx.h are not restricted to
> the ANX78xx series, but also applicable to other DisplayPort
> transmitters by Analogix.
>
> Split out them to dedicated headers, and make analogix-anx78xx.h
On Thu, Jun 6, 2019 at 4:22 PM Jacopo Mondi wrote:
> Add clock definitions for CMM units on Renesas R-Car Gen3 H3.
>
> Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
i.e. will queue in clk-renesas-for-v5.3.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven
On 04.06.2019 14:22, Torsten Duwe wrote:
> From: Icenowy Zheng
>
> Some code can be shared within different DP bridges by Analogix.
> Extract them to analogix_dp.
>
> Signed-off-by: Icenowy Zheng
> Signed-off-by: Vasily Khoruzhick
> Signed-off-by: Torsten Duwe
> ---
> drivers/gpu/drm/bridge/an
On Thu, Jun 6, 2019 at 4:22 PM Jacopo Mondi wrote:
> Add clock definitions for CMM units on Renesas R-Car Gen3 M3-N.
>
> Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
i.e. will queue in clk-renesas-for-v5.3.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeve
On 6/11/2019 4:24 PM, Viresh Kumar wrote:
On 20-03-19, 15:19, Rajendra Nayak wrote:
From: Stephen Boyd
Doing this allows us to call this API with any rate requested and have
it not need to match in the OPP table. Instead, we'll round the rate up
to the nearest OPP that we see so that we can g
On 04.06.2019 14:22, Torsten Duwe wrote:
> Add bit definitions required for the anx6345 and add a
> sanity check in anx_dp_aux_transfer.
>
> Signed-off-by: Icenowy Zheng
> Signed-off-by: Vasily Khoruzhick
> Signed-off-by: Torsten Duwe
Reviewed-by: Andrzej Hajda
--
Regards
Andrzej
> ---
>
On Thu, Jun 6, 2019 at 4:25 PM Jacopo Mondi wrote:
> Add clock definitions for CMM units on Renesas R-Car Gen3 E3.
>
> Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
i.e. will queue in clk-renesas-for-v5.3.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven
On Thu, Jun 6, 2019 at 4:22 PM Jacopo Mondi wrote:
> Add clock definitions for CMM units on Renesas R-Car Gen3 D3.
>
> Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
i.e. will queue in clk-renesas-for-v5.3.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven
Am 12.06.19 um 03:22 schrieb Nicolin Chen:
> Commit f13e143e7444 ("dma-buf: start caching of sg_table objects v2")
> added a support of caching the sgt pointer into an attach pointer to
> let users reuse the sgt pointer without another mapping. However, it
> might not totally work as most of dma-bu
Hi Thomas.
> >
> > While touching this code, anyway we could get rid of drm_can_sleep()?
> > I only ask because Daniel V. said that we should not use it.
> > This was some months ago during some ehader file clean-up, so nothing
> > in particular related to the ast driver.
>
> I'm aware of what i
Hi Dave, Daniel:
This include unbind error fix, clock control flow refinement, and PRIME
mmap with page offset.
Regards,
CK
The following changes since commit
a188339ca5a396acc588e5851ed7e19f66b0ebd9:
Linux 5.2-rc1 (2019-05-19 15:47:09 -0700)
are available in the Git repository at:
https:
Hi Christian,
Thanks for the quick reply.
On Wed, Jun 12, 2019 at 07:45:38AM +, Koenig, Christian wrote:
> Am 12.06.19 um 03:22 schrieb Nicolin Chen:
> > Commit f13e143e7444 ("dma-buf: start caching of sg_table objects v2")
> > added a support of caching the sgt pointer into an attach pointer
Am 12.06.19 um 10:02 schrieb Nicolin Chen:
> Hi Christian,
>
> Thanks for the quick reply.
>
> On Wed, Jun 12, 2019 at 07:45:38AM +, Koenig, Christian wrote:
>> Am 12.06.19 um 03:22 schrieb Nicolin Chen:
>>> Commit f13e143e7444 ("dma-buf: start caching of sg_table objects v2")
>>> added a suppo
On Tue, 11 Jun 2019, Maxime Ripard wrote:
> Hi Noralf,
>
> On Fri, Apr 19, 2019 at 10:53:28AM +0200, Noralf Trønnes wrote:
>> Den 18.04.2019 18.40, skrev Noralf Trønnes:
>> >
>> >
>> > Den 18.04.2019 14.41, skrev Maxime Ripard:
>> >> Rotations and reflections setup are needed in some scenarios to
On 11/06/2019 20:36, Daniel Vetter wrote:
omapdrm changes for 5.3
- Add support for DSI command mode displays
Thanks, pulled.
Finally :)
Hm why? Pull is less than a day old, and I didn't see an older one that
Dave or me missed ...
That was directed at me =).
I've been reluctant to merg
https://bugs.freedesktop.org/show_bug.cgi?id=110795
Christian König changed:
What|Removed |Added
Resolution|--- |INVALID
Status|NEW
On Tue, Jun 11, 2019 at 03:03:36PM +0200, Thomas Zimmermann wrote:
> Pinning a buffer prevents it from being moved to a different memory
> location. For some operations, such as buffer updates, it is not
> important where the buffer is located. Setting the pin function's
> pl_flag argument to 0 wil
On Tue, Jun 11, 2019 at 03:03:39PM +0200, Thomas Zimmermann wrote:
> The ast driver used to lock the cursor source BO during updates. Locking
> should be done internally by the BO's implementation, so we pin it instead
> to system memory. The mapping information is also stored in the BO. No
> need
Hi Christian,
On Wed, Jun 12, 2019 at 08:05:53AM +, Koenig, Christian wrote:
> Am 12.06.19 um 10:02 schrieb Nicolin Chen:
> > Hi Christian,
> >
> > Thanks for the quick reply.
> >
> > On Wed, Jun 12, 2019 at 07:45:38AM +, Koenig, Christian wrote:
> >> Am 12.06.19 um 03:22 schrieb Nicolin C
https://bugs.freedesktop.org/show_bug.cgi?id=110888
--- Comment #2 from Christian König ---
Looks like a NULL pointer check is missing somewhere in amdgpu_vm_init() to me.
But in general you are running out of system memory, not video memory. So
whatever you try to do here won't work in general
On 04.06.2019 14:23, Torsten Duwe wrote:
> The anx6345 is an ultra-low power DisplayPort/eDP transmitter designed
> for portable devices.
>
> Add a binding document for it.
>
> Signed-off-by: Icenowy Zheng
> Signed-off-by: Vasily Khoruzhick
> Reviewed-by: Rob Herring
> Signed-off-by: Torsten Duw
On Tue, Jun 11, 2019 at 03:03:42PM +0200, Thomas Zimmermann wrote:
> The cursor handling in mgag200 is complicated to understand. It touches a
> number of different BOs, but doesn't really use all of them.
>
> Rewriting the cursor update reduces the amount of cursor state. There are
> two BOs for
Am 12.06.19 um 10:15 schrieb Nicolin Chen:
> Hi Christian,
>
> On Wed, Jun 12, 2019 at 08:05:53AM +, Koenig, Christian wrote:
>> Am 12.06.19 um 10:02 schrieb Nicolin Chen:
>> [SNIP]
>>> We haven't used DRM/GRM_PRIME yet but I am also curious would it
>>> benefit DRM also if we reduce this overh
On 12-06-19, 13:12, Rajendra Nayak wrote:
> so the 'fmax' tables basically say what the max frequency the device can
> operate at for a given performance state/voltage level.
>
> so in your example it would be for instance
>
> 500M, Perf state = 2
> 1G, Perf state = 3
> 1.2G, Perf state = 4
>
>
On Wed, Jun 12, 2019 at 08:20:41AM +, Koenig, Christian wrote:
> Am 12.06.19 um 10:15 schrieb Nicolin Chen:
> > Hi Christian,
> >
> > On Wed, Jun 12, 2019 at 08:05:53AM +, Koenig, Christian wrote:
> >> Am 12.06.19 um 10:02 schrieb Nicolin Chen:
> >> [SNIP]
> >>> We haven't used DRM/GRM_PRIM
Hi
Am 12.06.19 um 10:13 schrieb Gerd Hoffmann:
> On Tue, Jun 11, 2019 at 03:03:36PM +0200, Thomas Zimmermann wrote:
>> Pinning a buffer prevents it from being moved to a different memory
>> location. For some operations, such as buffer updates, it is not
>> important where the buffer is located. S
Everyone:
This series contains various improvements (at least in my mind) and
fixes that I made to tc358767 while working with the code of the
driver. Hopefuly each patch is self explanatory.
Feedback is welcome!
Thanks,
Andrey Smirnov
Changes since [v4]:
- tc_pllupdate_pllen() renamed to
Replace explicit polling loop with equivalent call to
tc_poll_timeout() for brevity. No functional change intended.
Signed-off-by: Andrey Smirnov
Reviewed-by: Andrzej Hajda
Cc: Andrzej Hajda
Cc: Laurent Pinchart
Cc: Tomi Valkeinen
Cc: Andrey Gusakov
Cc: Philipp Zabel
Cc: Cory Tusar
Cc: Chr
Transfer size of zero means a request to do an address-only
transfer. Since the HW support this, we probably shouldn't be just
ignoring such requests. While at it allow DP_AUX_I2C_MOT flag to pass
through, since it is supported by the HW as well.
Signed-off-by: Andrey Smirnov
Reviewed-by: Andrzej
Replace explicit polling in tc_link_training() with equivalent call to
tc_poll_timeout() for simplicity. No functional change intended (not
including slightly altered debug output).
Signed-off-by: Andrey Smirnov
Reviewed-by: Andrzej Hajda
Cc: Andrzej Hajda
Cc: Laurent Pinchart
Cc: Tomi Valkein
Simplify tc_set_video_mode() by replacing explicit shifting using
macros from . No functional change intended.
Signed-off-by: Andrey Smirnov
Reviewed-by: Andrzej Hajda
Cc: Andrzej Hajda
Cc: Laurent Pinchart
Cc: Tomi Valkeinen
Cc: Andrey Gusakov
Cc: Philipp Zabel
Cc: Cory Tusar
Cc: Chris He
tc_wait_pll_lock() is always called as a follow-up for updating
PLLUPDATE and PLLEN bit of a given PLL control register. To simplify
things, merge the two operation into a single helper function
tc_pllupdate() and convert the rest of the code to use it. No
functional change intended.
Signed-off-by
According to the datasheet tc358767 can transfer up to 16 bytes via
its AUX channel, so the artificial limit of 8 appears to be too
low. However only up to 15-bytes seem to be actually supported and
trying to use 16-byte transfers results in transfers failing
sporadically (with bogus status in case
A very unfortunate aspect of tc_write()/tc_read() macro helpers is
that they capture quite a bit of context around them and thus require
the caller to have magic variables 'ret' and 'tc' as well as label
'err'. That makes a number of code paths rather counter-intuitive and
somewhat clunky, for exam
Don't assume that requested data transfer size is the same as amount
of data that was transferred. Change the code to get that information
from DP0_AUXSTATUS instead.
Since the check for AUX_BUSY in tc_aux_get_status() is pointless (it
will always called after tc_aux_wait_busy()) and there's only
Simplify AUX data write by dropping index arithmetic and shifting and
replacing it with a call to a helper function that does two things:
1. Copies user-provided data into a write buffer
2. Transfers contents of the write buffer to up to 4 32-bit
registers on the chip
Note that sep
tc_get_display_props() never reads more than a byte via AUX, so
there's no need to reserve 8 for that purpose. No function change
intended.
Signed-off-by: Andrey Smirnov
Reviewed-by: Andrzej Hajda
Cc: Andrzej Hajda
Cc: Laurent Pinchart
Cc: Tomi Valkeinen
Cc: Andrey Gusakov
Cc: Philipp Zabel
We never pass anything but 100 as timeout_ms to tc_aux_wait_busy(), so
we may as well hardcode that value and simplify function's signature.
Signed-off-by: Andrey Smirnov
Reviewed-by: Andrzej Hajda
Cc: Andrzej Hajda
Cc: Laurent Pinchart
Cc: Tomi Valkeinen
Cc: Andrey Gusakov
Cc: Philipp Zabel
Simplify AUX data read by removing index arithmetic and shifting with
a helper function that does two things:
1. Fetch data from up to 4 32-bit registers from the chip
2. Copy read data into user provided array.
Signed-off-by: Andrey Smirnov
Reviewed-by: Andrzej Hajda
Cc: Andrzej Hajda
We don't need 8 byte array, DP_LINK_STATUS_SIZE (6) should be
enough. This also gets rid of a magic number as a bonus.
Signed-off-by: Andrey Smirnov
Reviewed-by: Andrzej Hajda
Cc: Andrzej Hajda
Cc: Laurent Pinchart
Cc: Tomi Valkeinen
Cc: Andrey Gusakov
Cc: Philipp Zabel
Cc: Cory Tusar
Cc:
Move common code converting clock rate to an appropriate constant and
configuring SYS_PLLPARAM register into a separate routine and convert
the rest of the code to use it. No functional change intended.
Signed-off-by: Andrey Smirnov
Reviewed-by: Laurent Pinchart
Reviewed-by: Andrzej Hajda
Cc: A
When using an I2S source using a different clock source (usually the I2S
audio HW uses dedicated PLLs, different from the HDMI PHY PLL), fixed
CTS values will cause some frequent audio drop-out and glitches as
reported on Amlogic, Allwinner and Rockchip SoCs setups.
Setting the CTS in automatic mo
https://bugs.freedesktop.org/show_bug.cgi?id=110862
Michel Dänzer changed:
What|Removed |Added
Attachment #144506|text/x-log |text/plain
mime type|
ast doesn't implement the mode_set_base_atomic hook this would need,
so this is dead code.
Signed-off-by: Daniel Vetter
Cc: Dave Airlie
Cc: Daniel Vetter
Cc: Gerd Hoffmann
Cc: Thomas Zimmermann
Cc: Alex Deucher
Cc: Sam Bobroff
Cc: Sam Ravnborg
Cc: YueHaibing
---
drivers/gpu/drm/ast/ast_f
On 04.06.2019 14:23, Torsten Duwe wrote:
> From: Icenowy Zheng
>
> The ANX6345 is an ultra-low power DisplayPower/eDP transmitter designed
> for portable devices. This driver adds initial support for RGB to eDP
> mode, without HPD and interrupts.
>
> This is a configuration usually seen in eDP app
This is a no-op on atomic drivers because with atomic it's simply too
complicated to get all the locking and workers and nonblocking
synchronization correct, from essentially an NMI context. Well, too
complicated = impossible. Also, omapdrm never implemented the
mode_set_base_atomic hook, so I kind
On 12/06/2019 12:12, Daniel Vetter wrote:
This is a no-op on atomic drivers because with atomic it's simply too
complicated to get all the locking and workers and nonblocking
synchronization correct, from essentially an NMI context. Well, too
complicated = impossible. Also, omapdrm never implemen
https://bugs.freedesktop.org/show_bug.cgi?id=110862
Michel Dänzer changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=109206
--- Comment #50 from Ondrej Lang ---
I tested this yesterday with kernel 5.1.8 and if the file raven_dmcu.bin is
present in the /lib/firmware/amdgpu/ folder when you are updating the kernel
(or manually rebuilding the initramfs), the computer wi
On 07.06.2019 11:40, Torsten Duwe wrote:
> On Fri, Jun 07, 2019 at 08:28:02AM +0200, Maxime Ripard wrote:
>> On Thu, Jun 06, 2019 at 03:59:27PM +0200, Harald Geyer wrote:
>>> If think valid compatible properties would be:
>>> compatible = "innolux,n116bge", "simple-panel";
>>> compatible = "edp-con
On 04.06.2019 14:22, Torsten Duwe wrote:
> From: Icenowy Zheng
>
> As ANA78xx chips are designed and produced by Analogix Semiconductor,
> Inc, move their driver codes into analogix subdirectory.
>
> Signed-off-by: Icenowy Zheng
> Signed-off-by: Vasily Khoruzhick
> Reviewed-by: Laurent Pinchart
Writeback split is also for workaround the size limitation of d71 scaler.
Like layer_split, writeback downscaling also can use two scalers to handle
the scaling half-by-half. The only differnence is writback needs a
standalone component (splitter)'s help to split the composition result.
The data pi
Similar to Layer Split, but Splitter is used for writeback, which splits
the compiz result to two half parts and then feed them to two scalers.
v2: Rebase
Signed-off-by: James Qian Wang (Arm Technology China)
---
.../arm/display/komeda/d71/d71_component.c| 63 +++
.../drm/ar
Writeback split is also for workaround the size limitation of d71 scaler.
Like layer_split, writeback downscaling also can use two scalers to handle
the scaling half-by-half. The only differnence is writback needs a
standalone component (splitter)'s help to split the composition result.
The data pi
Hi Simon,
On Thu, Jun 06, 2019 at 10:51:09AM +0200, Simon Horman wrote:
> On Thu, Jun 06, 2019 at 10:59:57AM +0300, Laurent Pinchart wrote:
> > On Mon, Jun 03, 2019 at 01:40:45PM +0200, Simon Horman wrote:
> >> On Tue, May 28, 2019 at 05:12:32PM +0300, Laurent Pinchart wrote:
> >>> Add the new ren
Hi Shobhit
Thanks for the patch. Feedback below...
On Tue, Jun 11, 2019 at 09:32:32PM -0700, Shobhit Kukreti wrote:
> Port the sky81452-backlight driver to adhere to new gpio descriptor based
> APIs. Modified the file sky81452-backlight.c and sky81452-backlight.h.
> The gpio descriptor property
On 12.06.2019 10:32, Andrey Smirnov wrote:
> Everyone:
>
> This series contains various improvements (at least in my mind) and
> fixes that I made to tc358767 while working with the code of the
> driver. Hopefuly each patch is self explanatory.
>
> Feedback is welcome!
>
> Thanks,
> Andrey Smirnov
On Tue, 11 Jun 2019, Paul Wise wrote:
> On Mon, 2019-06-10 at 12:30 +0300, Jani Nikula wrote:
>> We've moved the override and firmware EDID (simply "override EDID" from
>> now on) handling to the low level drm_do_get_edid() function in order to
>> transparently use the override throughout the stac
On Tue, Jun 11, 2019 at 11:13:39AM +, Lowry Li (Arm Technology China) wrote:
> From: "Lowry Li (Arm Technology China)"
>
> One crtc can use two komeda_pipeline, and one works as master and as
> slave. the slave pipeline doesn't have its own output and timing
> ctrlr, but pre-composite the inp
On Sun, 26 May 2019, Ilpo Järvinen wrote:
> Hi all,
>
> I've a workstation which has internal VGA that is detected as AST 2400 and
> with it EDID has been always quite flaky (except for some time it worked
> with 4.14 long enough that I thought the problems would be past until the
> problems re
https://bugs.freedesktop.org/show_bug.cgi?id=110904
Bug ID: 110904
Summary: [VKMS] vblank counter error
Product: DRI
Version: DRI git
Hardware: Other
OS: Linux (All)
Status: NEW
Severity: normal
On Wed, Jun 12, 2019 at 08:42:37AM +0200, Thomas Hellström (VMware) wrote:
> From: Thomas Hellstrom
>
> Add two utilities to a) write-protect and b) clean all ptes pointing into
> a range of an address space.
> The utilities are intended to aid in tracking dirty pages (either
> driver-allocated s
On Wed, Jun 12, 2019 at 01:21:24PM +0300, Laurent Pinchart wrote:
> Hi Simon,
>
> On Thu, Jun 06, 2019 at 10:51:09AM +0200, Simon Horman wrote:
> > On Thu, Jun 06, 2019 at 10:59:57AM +0300, Laurent Pinchart wrote:
> > > On Mon, Jun 03, 2019 at 01:40:45PM +0200, Simon Horman wrote:
> > >> On Tue, M
On Wed, Jun 12, 2019 at 04:23:50AM -0700, Christoph Hellwig wrote:
> friends. Also in general new core functionality like this should go
> along with the actual user, we don't need to repeat the hmm disaster.
Ok, I see you actually did that, it just got hidden by the awful
selective cc stuff a lo
On Wed, Jun 12, 2019 at 08:42:36AM +0200, Thomas Hellström (VMware) wrote:
> From: Thomas Hellstrom
>
> This is basically apply_to_page_range with added functionality:
> Allocating missing parts of the page table becomes optional, which
> means that the function can be guaranteed not to error if
On 6/12/19 1:23 PM, Christoph Hellwig wrote:
On Wed, Jun 12, 2019 at 08:42:37AM +0200, Thomas Hellström (VMware) wrote:
From: Thomas Hellstrom
Add two utilities to a) write-protect and b) clean all ptes pointing into
a range of an address space.
The utilities are intended to aid in tracking di
On 6/12/19 2:16 PM, Christoph Hellwig wrote:
On Wed, Jun 12, 2019 at 08:42:36AM +0200, Thomas Hellström (VMware) wrote:
From: Thomas Hellstrom
This is basically apply_to_page_range with added functionality:
Allocating missing parts of the page table becomes optional, which
means that the funct
On Wed, Jun 12, 2019 at 10:29:29AM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 12.06.19 um 10:13 schrieb Gerd Hoffmann:
> > On Tue, Jun 11, 2019 at 03:03:36PM +0200, Thomas Zimmermann wrote:
> >> Pinning a buffer prevents it from being moved to a different memory
> >> location. For some operations
On Wed, Jun 12, 2019 at 11:19 AM Tomi Valkeinen wrote:
>
> On 12/06/2019 12:12, Daniel Vetter wrote:
> > This is a no-op on atomic drivers because with atomic it's simply too
> > complicated to get all the locking and workers and nonblocking
> > synchronization correct, from essentially an NMI con
Hi,
On 12-06-19 02:16, dbasehore . wrote:
On Tue, Jun 11, 2019 at 1:54 AM Hans de Goede wrote:
Hi,
On 11-06-19 10:08, Jani Nikula wrote:
On Mon, 10 Jun 2019, Derek Basehore wrote:
This removes the orientation quirk detection from the code to add
an orientation property to a panel. This is
Hi,
On 12/06/2019 11:32, Andrey Smirnov wrote:
Everyone:
This series contains various improvements (at least in my mind) and
fixes that I made to tc358767 while working with the code of the
driver. Hopefuly each patch is self explanatory.
I haven't had time to debug, but I did a quick test wi
Den 11.06.2019 14.49, skrev Maxime Ripard:
> Hi Noralf,
>
> On Thu, Apr 18, 2019 at 06:40:42PM +0200, Noralf Trønnes wrote:
>> Den 18.04.2019 14.41, skrev Maxime Ripard:
>>> + /**
>>> +* We want the rotation on the command line to overwrite
>>> +* whatever comes from the panel.
>>> +
Hi,
On 12/06/2019 11:32, Andrey Smirnov wrote:
Transfer size of zero means a request to do an address-only
transfer. Since the HW support this, we probably shouldn't be just
ignoring such requests. While at it allow DP_AUX_I2C_MOT flag to pass
through, since it is supported by the HW as well.
On Mon, 10 Jun 2019 at 19:06, Rob Herring wrote:
>
> The midgard/bifrost GPUs need to allocate GPU memory which is allocated
> on GPU page faults and not pinned in memory. The vendor driver calls
> this functionality GROW_ON_GPF.
>
> This implementation assumes that BOs allocated with the
> PANFRO
Den 11.06.2019 15.20, skrev Maxime Ripard:
> Hi Noralf,
>
> On Fri, Apr 19, 2019 at 10:53:28AM +0200, Noralf Trønnes wrote:
>> Den 18.04.2019 18.40, skrev Noralf Trønnes:
>>>
>>>
>>> Den 18.04.2019 14.41, skrev Maxime Ripard:
Rotations and reflections setup are needed in some scenarios to i
b20c5249aa6a ("backlight: Fix compile error if CONFIG_FB is unset")
added 'default m' for BACKLIGHT_CLASS_DEVICE and LCD_CLASS_DEVICE.
Let's go back to not building support by default.
Signed-off-by: Marc Gonzalez
---
drivers/video/backlight/Kconfig | 2 --
1 file changed, 2 deletions(-)
diff
Mark the access to reservation_object.fence as being protected to
silence sparse.
Signed-off-by: Chris Wilson
---
include/linux/reservation.h | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/include/linux/reservation.h b/include/linux/reservation.h
index ee750765cc94..
Hi Daniel,
First of all, thank you very much for your patchset.
I tried to make a detailed review of your series, and you can see my
comments in each patch. You’ll notice that I asked many things related
to the DRM subsystem with the hope that I could learn a little bit
more about DRM from your c
Am 12.06.19 um 15:28 schrieb Chris Wilson:
Mark the access to reservation_object.fence as being protected to
silence sparse.
Signed-off-by: Chris Wilson
Reviewed-by: Christian König
---
include/linux/reservation.h | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git
We need to handle the case when of_drm_find_bridge() returns
NULL.
Reported-by: Dan Carpenter
Cc: Dan Carpenter
Signed-off-by: Linus Walleij
---
drivers/gpu/drm/mcde/mcde_drv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/mcde/mcde_drv.c b/drivers/gpu
On Thu, Jun 6, 2019 at 7:28 PM Daniel Vetter wrote:
>
> The issue we have is that the crc worker might fall behind. We've
> tried to handle this by tracking both the earliest frame for which it
> still needs to compute a crc, and the last one. Plus when the
> crtc_state changes, we have a new work
On Thu, Jun 6, 2019 at 7:28 PM Daniel Vetter wrote:
>
> The worker is always in process context, no need for the _irqsafe
> version. Same for the set_source callback, that's only called from the
> debugfs handler in a syscall.
>
> Cc: Shayenne Moura
> Cc: Rodrigo Siqueira
> Signed-off-by: Daniel
On Thu, Jun 6, 2019 at 7:28 PM Daniel Vetter wrote:
>
> Plus add a comment about what it actually protects. It's very little.
>
> Signed-off-by: Daniel Vetter
> Cc: Rodrigo Siqueira
> Cc: Haneen Mohammed
> Cc: Daniel Vetter
> ---
> drivers/gpu/drm/vkms/vkms_crc.c | 4 ++--
> drivers/gpu/drm/
On Thu, Jun 6, 2019 at 7:28 PM Daniel Vetter wrote:
>
> No need to have them multiple times.
>
> Signed-off-by: Daniel Vetter
> Cc: Rodrigo Siqueira
> Cc: Haneen Mohammed
> Cc: Daniel Vetter
> ---
> drivers/gpu/drm/vkms/vkms_drv.h | 8
> drivers/gpu/drm/vkms/vkms_plane.c | 8 ++
On Thu, Jun 6, 2019 at 7:28 PM Daniel Vetter wrote:
>
> Currently we flush pending crc workers very late in the commit flow,
> when we destry all the old crtc states. Unfortunately at that point
destry -> destroy
> the framebuffers are already unpinned (and our vaddr possible gone),
> so this is
On Wed, Jun 12, 2019 at 03:30:38PM +0200, Linus Walleij wrote:
> We need to handle the case when of_drm_find_bridge() returns
> NULL.
>
> Reported-by: Dan Carpenter
> Cc: Dan Carpenter
> Signed-off-by: Linus Walleij
> ---
> drivers/gpu/drm/mcde/mcde_drv.c | 4 ++--
> 1 file changed, 2 insertio
On Thu, Jun 6, 2019 at 7:28 PM Daniel Vetter wrote:
>
> irqs are already off.
>
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/vkms/vkms_crtc.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/vkms/vkms_crtc.c
> b/drivers/gpu/drm/vkms/vkms_cr
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