hi,
is it possible to control the drm bridge from another driver in irq
handler(enable/disable the bridge)?
is there a way to control the "dpms force off" and "dpms force on" in the
interrupt handler?
--
regards,
vinaysimha
___
dri-devel mailing list
Bartlomiej Zolnierkiewicz writes:
> On 10/17/2018 01:52 AM, Michael Ellerman wrote:
>> YueHaibing writes:
>>
>>> Fixes gcc '-Wunused-but-set-variable' warning:
>>>
>>> drivers/video/fbdev/chipsfb.c: In function 'chipsfb_pci_init':
>>> drivers/video/fbdev/chipsfb.c:352:22: warning:
>>> variable
Lenovo Ideapad D330 Pentium CPU version has 1920x1200 LCD. Console
ouput gets rotated at boot as Miix 310.
Signed-off-by: David Santamaría Rogado
---
drivers/gpu/drm/drm_panel_orientation_quirks.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/drm_panel_orient
Dear Sir,
I'm using ArchLinux distribution. After kernel upgrade form 4.19.14 to
4.19.15 my X environment stopped working. I have AMD HD3300 (RS780D)
graphics card. I have bisected kernel and found a failing commit:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v4
On Fri, Feb 08, 2019 at 03:01:03PM +0100, Noralf Trønnes wrote:
> This makes it possible to use drm_dev_unplug() with the upcoming
> devm_drm_dev_init() which will do drm_dev_put() in its release callback.
>
> Cc: Alex Deucher
> Cc: Christian König
> Cc: David (ChunMing) Zhou
> Cc: Dave Airlie
On Fri, Feb 08, 2019 at 05:53:12PM -0200, Shayenne Moura wrote:
> Remove KMS cleanup task from documentation solved by patchset
> https://patchwork.freedesktop.org/series/54310/
>
> Signed-off-by: Shayenne Moura
Thanks for your patch, applied to drm-misc-next.
-Daniel
> ---
> Documentation/gpu
On Sat, Feb 09, 2019 at 12:42:30PM +0530, Ramalingam C wrote:
> From: Daniel Vetter
>
> Now that component has docs it's worth spending a few words and
> hyperlinks on recommended best practices in drm.
>
> Cc: Russell King - ARM Linux admin
> Signed-off-by: Daniel Vetter
Just a quick reminde
On 11.02.2019 07:52, Vinay Simha B N wrote:
> hi,
>
> is it possible to control the drm bridge from another driver in irq
> handler(enable/disable the bridge)?
If you mean 'in irq context' the answer is no, usually enable/disable
callbacks can sleep, so cannot be called from atomic context.
>
>
On Mon, Feb 11, 2019 at 04:22:24AM +0100, Mario Kleiner wrote:
> The pageflip completion timestamps transmitted to userspace
> via pageflip completion events are supposed to describe the
> time at which the first pixel of the new post-pageflip scanout
> buffer leaves the video output of the gpu. Th
On Mon, Feb 11, 2019 at 09:32:54AM +0100, Andrzej Hajda wrote:
> On 11.02.2019 07:52, Vinay Simha B N wrote:
> > hi,
> >
> > is it possible to control the drm bridge from another driver in irq
> > handler(enable/disable the bridge)?
>
>
> If you mean 'in irq context' the answer is no, usually ena
https://bugzilla.kernel.org/show_bug.cgi?id=202555
Bug ID: 202555
Summary: nouveau: KMS is broken on last kernels (9700M GT)
Product: Drivers
Version: 2.5
Kernel Version: 4.11-4.20
Hardware: All
OS: Linux
Tree
On 08/02/2019 17:20, Laurent Pinchart wrote:
> Hi Tomi,
>
> On Fri, Jan 18, 2019 at 12:33:03PM +0200, Tomi Valkeinen wrote:
>> On 11/01/19 05:51, Laurent Pinchart wrote:
>>> Hook up drm_bridge support in the omapdrm driver. Despite the recent
>>> extensive preparation work, this is a rather intrus
On Fri, Feb 08, 2019 at 11:13:24PM +0100, Sam Ravnborg wrote:
> With drmP.h removed from drm_modeset_helper.h the build of
> komeda filed as reported by linux-next
>
> Add missing include files to fix build.
> For the files touched group include files and sort them.
>
> The fix was tested on a tr
Hello,
This patch series consolidates the three pending series for the omapdrm and
tfp410 drivers that all together implement drm_bridge and drm_panel support
for omapdrm.
Compared to v2, patch 50/50 has been added, the series has been rebased
on drm-next, review comments have been incorporated a
The mode_valid_path() function validates the mode it receives without
ever modifying it. Constify the mode pointer argument to make that
explicit.
Signed-off-by: Laurent Pinchart
Reviewed-by: Ville Syrjälä
Reviewed-by: Tomi Valkeinen
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
From: Tomi Valkeinen
Since commit b4935e3a3cfa ("drm/omap: Store bus flags in the
omap_dss_device structure") video mode flags are managed by the omapdss
(and later omapdrm) core based on bus flags stored in omap_dss_device.
This works fine for all devices whose video modes are set by the omapdss
The kobj field from struct omap_dss_device is not used. Remove it.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
Reviewed-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/dss/omapdss.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu
From: Tomi Valkeinen
Reading any of the DSI debugfs files results in a crash, as wrong
pointer is passed to the dump functions, and the dump functions use a
wrong pointer. This patch fixes DSI debug dumps.
Fixes: f3ed97f9ae7d ("drm/omap: dsi: Simplify debugfs implementation")
Signed-off-by: Tomi
The omap_dss_device .check_timings() and .set_timings() operations
operate on struct videomode, while the DRM API operates on struct
drm_display_mode. This forces conversion from to videomode in the
callers. While that's not a problem per se, it creates a difference with
the drm_bridge API.
Replac
The displays (connectors, panels and encoders) bail out from their
.enable() and .disable() handlers if the dss device is already enabled
or disabled. Those safety checks are not needed when the functions are
called through the omapdss_device_ops, as the .enable() and .disable()
handlers are called
The DT bindings for the OMAP DSS allow assigning numerical IDs to
display outputs through display entries in the alias node. The driver
uses this information to sort pipelines according to the order specified
in DT, making it possible for a system to give a priority order to
outputs.
Retrieval of
The mode setting handler of the VENC stores the video mode internally,
to then convert it to a configuration when programming the hardware. The
stored mode is otherwise unused. Cache the configuration directly
instead.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Seb
omap_dss_device operations expose fixed video timings through a
.get_timings() operation that return a single timing for the device. To
prepare for the move to drm_bridge, modify the API to instead add DRM
modes directly to the connector.
As this puts more burden on display devices, we also create
From: Tomi Valkeinen
Commit edb715dffdee ("drm/omap: dss: dsi: Move initialization code from
bind to probe") moved the of_platform_populate() call from dsi_bind() to
dsi_probe(), but failed to move the corresponding
of_platform_depopulate() from dsi_unbind() to dsi_remove(). This results
in OF ch
Instead of manually iterating over the dss devices in the pipeline to
find the first one that implements the .get_modes() operation, add a new
operation flag for .get_modes() and use the omap_connector_find_device()
helper function to locate the right dss device.
Signed-off-by: Laurent Pinchart
R
The TV encoder supports both PAL and NTSC modes, but when queried for
the list of modes it supports, only the currently selected mode is
reported. Fix it and report the two modes unconditionally.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
---
dr
All the internal encoders share common init and cleanup code. Factor it
out to separate functions.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/dss/dpi.c | 17 +++--
drivers/gpu/drm/omapdrm/dss/dsi.c
The omap_connector_attached_encoder() doesn't exist anymore, remove its
declaration from omap_connector.h.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
Reviewed-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/omap_connector.h | 2 --
1 file change
The DISPC timings checks relate to the CRTC, but they're performed in
the encoder and connector .atomic_check() and .mode_valid() operations.
Move them to the CRTC .mode_valid() operation.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
---
drivers/g
All .enable() and .disable() handlers for panels and connectors share
common code that validates and updates the device's state. Move it to
common locations in the omap_encoder_enable() and omap_encoder_disable()
handlers.
The enabled check in the .disable() handler is left untouched, it will
be a
Now that the direction of OF graph walk has been reversed, there's no
need to lookup devices by port as we have no sink device connected
through multiple sink ports. Simplify OF lookup of the DSS devices to
look them up by node only.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
The omapdrm and omapdss drivers are architectured based on display
pipelines made of multiple components handled from sink (display) to
source (DSS output). This is incompatible with the DRM bridge and panel
APIs that handle components from source to sink.
Reconcile the omapdrm and omapdss drivers
Instead of rolling out custom suspend/resume implementations based on
state information stored in the driver's data structures, use the atomic
suspend/resume helpers that rely on a DRM atomic state object.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reiche
The venc_device structure wss_data field is set to 0 and never otherwise
modified, remove it.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
Reviewed-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/dss/venc.c | 11 +--
1 file changed, 1 inse
Now that the .get_modes() operations takes a drm_connector and fills it
with modes, it becomes easy to fill display information in the same
operation without requiring a separate .get_size() opearation.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
The TFP410 supports configuration of several input bus parameters
through either the I2C port or chip pins. In the latter case, we need to
specify those parameters in DT.
Two new properties are added, ti,deskew to specify the data de-skew
configuration (as set through the DK[3:1] pins), and pclk-s
The DPI and SDI encoders store the full videomode upon mode set, to only
use the value of the pixel clock when enabling the encoder. This wastes
memory. Store the pixel clock value only.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
---
drivers/gpu
The source pointer will be removed to the omap_dss_device structure.
Store it internally in the DSI panel driver data.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
---
.../gpu/drm/omapdrm/displays/panel-dsi-cm.c | 55 ++-
1 file
The field is only used in a safety check during device
connection/disconnection, where the src field can be easily used
instead. Remove it and use src.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/dss/base.c| 6 ++--
The displays (connectors, panels and encoders) return an error from
their .enable() handler when the dss device is not connected. They also
disconnect the dss device explicitly from their .remove() handler if it
is still connected.
Those safety checks are not needed:
- The .enable() handler is ca
The internal encoders return an error from their .enable() handler when
their are not connected to a dss manager. As the flag used is set and
cleared in the connect and disconnect handlers, this effectively checks
whether the omap_dss_device is connected.
The .enable() handler is called from code
Hook up drm_bridge support in the omapdrm driver. Despite the recent
extensive preparation work, this is a rather intrusive change, as the
management of outputs needs to be adapted through the driver to handle
both omap_dss_device and drm_bridge.
Connector creation is skipped when using a drm_brid
Replace internal usage of struct videomode with struct drm_display_mode
in order to avoid converting needlessly between the data structures.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
---
Changes since v1:
- Set mode.crtc_* fields and mode name
Display pipelines based on drm_bridge are handled from the bridge
closest to the CRTC. To move to that model we thus need to transition
away from walking pipelines in the other direction, and from accessing
the device at the end of the pipeline when possible.
Remove most accesses to the display de
The TFP410 supports configurable pixel clock sampling edge and data
de-skew adjustments. The configuration can be set through I2C or
dedicated chip pins.
Report the configuration through the drm_bridge timings. As the
ti-tftp410 driver doesn't support configuring the chip through I2C, we
simply us
The encoder .atomic_check() and connector .mode_valid() operations both
walk through the dss devices in the pipeline to validate the mode.
Factor out the common code in a new omap_drm_connector_mode_fixup()
function.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebas
The display isn't used by the encoder implementation, don't pass it to
the initialization function and store it internally needlessly.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/omap_drv.c | 2 +-
drivers/gpu/drm/
From: Stefan Agner
The DRM bus flags convey additional information on pixel data on
the bus. All current available bus flags might be of interest for
a bridge. Remove the sampling_edge field and use bus_flags.
In the case at hand a dumb VGA bridge needs a specific data enable
polarity (DRM_BUS_F
From: Laurent Pinchart
The DRM_BUS_FLAG_PIXDATA_(POS|NEG)EDGE and
DRM_BUS_FLAG_SYNC_(POS|NEG)EDGE flags are deprecated in favour of the
new DRM_BUS_FLAG_PIXDATA_(DRIVE|SAMPLE)_(POS|NEG)EDGE and
new DRM_BUS_FLAG_SYNC_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags. Replace them
through the code.
This effectiv
For HDMI pipelines, when the output gets disconnected the device
handling CEC needs to be notified. Instead of guessing which device that
would be (and sometimes getting it wrong), notify all devices in the
pipeline.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebas
Add support for the OSD070T1718-19TS 7" 800x480 panel from One Stop
Displays to the panel-simple driver.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Reviewed-by: Tomi Valkeinen
Tested-by: Sebastian Reichel
---
drivers/gpu/drm/panel/panel-simple.c | 29 ++
The TFP410 has a powerdown pin that can be connected to a GPIO to
control power saving. The DT bindings define a corresponding property,
but the driver doesn't implement support for it. Fix that.
Signed-off-by: Laurent Pinchart
Reviewed-by: Tomi Valkeinen
Reviewed-by: Jyri Sarha
Tested-by: Seba
The omap_dss_device type and output_type fields differ mostly for
historical reasons. The output_type field is required for all devices
but the display at the end of the pipeline, and must be set to
OMAP_DISPLAY_TYPE_NONE for the latter. The type field is required for
all devices but the internal e
The OSD Displays OSD070T1718-19TS is a 7" WVGA (800x480) 24bit RGB panel
and is compatible with the simple-panel bindings.
Signed-off-by: Laurent Pinchart
Reviewed-by: Tomi Valkeinen
Tested-by: Sebastian Reichel
---
Changes since v2:
- Specify which of the simple-panel properties are valid
---
OSD Displays is a panel manufacturer. It has been acquired by New Vision
Displays in 2015 but continues to operate under its own brand name.
Signed-off-by: Laurent Pinchart
Reviewed-by: Tomi Valkeinen
Reviewed-by: Rob Herring
Tested-by: Sebastian Reichel
---
Documentation/devicetree/bindings/
Those components are supported by the drm_bridge infrastructure, remove
the omapdrm-specific driver.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/displays/Kconfig | 11 -
drivers/gpu/drm/omapdrm/displays/Makefile
Hook up drm_panel support in the omapdrm driver. The change is
relatively simply as the way has been paved by drm_bridge support
already. In addition to looking up, attaching to and detaching from the
panel, we only need to add panel support in the connector .get_modes()
handler, take connector bus
The TI TFP410 is a DVI encoder, not a full HDMI encoder. Its output can
be routed to a DVI-D connector, even if in many cases embedded systems
will use an HDMI connector to carry the DVI signals.
Instead of hardcoding the connector type to HDMI, retrieve the connector
type from its DT node.
Signe
The field is only used to check whether the device is connected, and we
can do so by checking the dss field instead. Remove the src field.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/dss/base.c| 14 +-
This allows nicer kerneldoc with an easy way to reference the enum and
the values.
Signed-off-by: Laurent Pinchart
---
include/drm/drm_connector.h | 108 +---
1 file changed, 64 insertions(+), 44 deletions(-)
diff --git a/include/drm/drm_connector.h b/include/drm
The omapdrm driver initialization procedure starts by connecting all
available pipelines, gathering related information (such as output and
display DSS devices, and DT aliases), sorting them by alias, and finally
creates all the DRM/KMS objects.
When using DRM bridges instead of DSS devices, we wi
The omapdss driver patches DT at runtime to prepend an "omapdss," prefix
to the compatible string of all encoders, panels and connectors. This
mechanism ensures they get bound to the omapdss-specific drivers instead
of generic drivers.
Now that we have drm_bridge support in omapdrm, we need to sel
From: Laurent Pinchart
The DRM_BUS_FLAG_PIXDATA_POSEDGE and DRM_BUS_FLAG_PIXDATA_NEGEDGE macros
and their DRM_BUS_FLAG_SYNC_* counterparts define on which pixel clock
edge data and sync signals are driven. They are however used in some
drivers to define on which pixel clock edge data and sync sig
Panels are now supported through the drm_panel infrastructure, remove
the omapdrm-specific driver.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Reichel
Tested-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/displays/Kconfig | 6 -
drivers/gpu/drm/omapdrm/displays/Makefile
On Fri, Feb 08, 2019 at 06:20:14PM +0100, Bartlomiej Zolnierkiewicz wrote:
>
> On 01/17/2019 02:33 PM, Alexander Shiyan wrote:
> > This patch removes dependencies on BACKLIGHT_CLASS_DEVICE for items
> > that are already placed under #if BACKLIGHT_CLASS_DEVICE.
> >
> > Signed-off-by: Alexander Shi
https://bugzilla.kernel.org/show_bug.cgi?id=202537
Michel Dänzer (mic...@daenzer.net) changed:
What|Removed |Added
CC||harry.wentl...@amd.co
Hi Brendan,
On 09/02/2019 00:56, Brendan Higgins wrote:
> On Thu, Dec 6, 2018 at 4:16 AM Kieran Bingham
> wrote:
>>
>> Hi Brendan,
>>
>> On 03/12/2018 23:53, Brendan Higgins wrote:
>>> On Thu, Nov 29, 2018 at 7:45 PM Luis Chamberlain wrote:
On Thu, Nov 29, 2018 at 01:56:37PM +, Kie
https://bugs.freedesktop.org/show_bug.cgi?id=109607
Bug ID: 109607
Summary: [CI][DRMTIP] Time is passing at a different rate
between IGT machines and the controller
Product: DRI
Version: DRI git
Hardware: Other
https://bugs.freedesktop.org/show_bug.cgi?id=109607
--- Comment #1 from CI Bug Log ---
The CI Bug Log issue associated to this bug has been updated.
### New filters associated
* fi-icl-u3: random tests - incomplete
-
https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_212/fi-icl-u3/igt@kms_plane_
On Wed, Feb 06, 2019 at 02:57:51PM -0600, Rob Herring wrote:
> On Wed, Feb 6, 2019 at 1:42 PM Maxime Ripard
> wrote:
> >
> > Some SoCs have devices that are using a separate bus from the main bus to
> > perform DMA.
> >
> > These buses might have some restrictions and/or different mapping than fr
Hi Maxime,
On Fri, Feb 1, 2019 at 8:01 PM Maxime Ripard wrote:
>
> On Tue, Jan 29, 2019 at 11:01:31PM +0530, Jagan Teki wrote:
> > On Tue, Jan 29, 2019 at 8:43 PM Maxime Ripard
> > wrote:
> > >
> > > On Mon, Jan 28, 2019 at 03:06:10PM +0530, Jagan Teki wrote:
> > > > On Sat, Jan 26, 2019 at 2:5
On 2/9/19 1:52 AM, Mario Kleiner wrote:
> In VRR mode, keep track of the vblank count of the last
> completed pageflip in amdgpu_crtc->last_flip_vblank, as
> recorded in the pageflip completion handler after each
> completed flip.
>
> Use that count to prevent mmio programming a new pageflip
> wit
hi,
On Fri, Feb 08, 2019 at 03:24:12PM +0300, Konstantin Sudakov wrote:
> Hello, Maxime!
>
> >+mode = drm_mode_duplicate(panel->drm, &default_mode);
> >+if (!mode) {
> >+DRM_DEV_ERROR(&ctx->dsi->dev,
> >+ "Failed to add mode " DRM_MODE_FMT "\n",
> >+ DRM_MODE_ARG(mode));
> >+return -EIN
The Allwinner BSP makes sure that we don't end up with a null start delay
or with a delay larger than vtotal.
The former condition is likely to happen now with the reworked start delay,
so make sure we enforce the same boundaries.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun6i_mip
Hi,
Here is a series implementing the burst mode support for DSI.
It's been tested on an A33 board with the panel supported on the last
patch, which should remove all quirks due to a different SoC from the
equation.
Let me know what you think,
Maxime
Changes from v3:
- Fixed error in Ronbo pa
The current code allows the TCON clock divider to have a range between 4
and 127 when feeding the DSI controller.
The only display supported so far had a display clock rate that ended up
using a divider of 4, but testing with other displays show that only 4
seems to be functional.
This also align
The current calculation for the video start delay in the current DSI driver
is that it is the total vertical size, minus the front porch and sync length,
plus 1. This equals to the active vertical size plus the back porch plus 1.
That 1 is coming in the Allwinner BSP from an variable that is set t
It turns out that the hblk calculation actually follows a similar pattern
than the other packets. Rework a bit the calculation and add a comment.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/dr
From: Konstantin Sudakov
The Ronbo RB070D30 panel is a MIPI-DSI panel based on a Fitipower EK79007
controller and a 1024x600 panel.
Reviewed-by: Sam Ravnborg
Signed-off-by: Konstantin Sudakov
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/panel/Kconfig| 9 +-
drivers/gpu/
Since I always confuse the back and front porches, a few miscalculation
slipped through. Fix them.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
b/drivers
From: Konstantin Sudakov
The current driver doesn't support the DSI burst operation mode.
Let's add the needed quirks to make it work.
Signed-off-by: Konstantin Sudakov
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 171 --
1 file changed, 1
The DRQ calculation code in the Allwinner BSP uses the vertical front
porch value as the condition, but we're using the video back porch.
Since I always confuse the two, and I'm the original author of that code, I
guess I deserved a brown paper bag.
Signed-off-by: Maxime Ripard
---
drivers/gpu/
The MBUS (and its associated controller) is the bus in the Allwinner SoCs
that DMA devices use in the system to access the memory.
Among other things (and depending on the SoC generation), it can also
enforce priorities or report bandwidth usages on a per-master basis.
One of the most notable thi
The current DT bindings assume that the DMA will be performed by the
devices through their parent DT node, and rely on that assumption for the
address translation using dma-ranges.
However, some SoCs have devices that will perform DMA through another bus,
with separate address translation rules. W
So far we've received a couple of nominations for four open spots. The official
nomination period ends this Thursday. Please let us know if you'd like to
nominate someone including yourself.
Harry
On 2019-01-31 5:08 p.m., Wentland, Harry wrote:
> We are seeking nominations for candidates for el
The MBUS controller drives the MBUS that other devices in the SoC will
use to perform DMA. It also has a register interface that allows to
monitor and control the bandwidth and priorities for masters on that
bus.
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/arm/sunxi/sunxi-
https://bugs.freedesktop.org/show_bug.cgi?id=109608
Bug ID: 109608
Summary: Regression from llvm-6: llvm-7 replaces 'undef' with
'NaN', and generates NaN at the assembler level - This
issue generates black screen on some fragment shade
Some SoCs have devices that are using a separate bus from the main bus to
perform DMA.
These buses might have some restrictions and/or different mapping than from
the CPU side, so we'd need to express those using the usual dma-ranges, but
using a different DT node than the node's parent.
Now that
On 02.02.2019 15:27, Paweł Chmiel wrote:
> This patch adds Samsung S6E63M0 AMOLED LCD panel driver, connected over
> spi. It's based on already removed, non dt s6e63m0 driver and
> panel-samsung-ld9040. It can be found for example in some of Samsung
> Aries based phones.
>
> Signed-off-by: Paweł Ch
On 2/11/19 3:35 AM, Daniel Vetter wrote:
> On Mon, Feb 11, 2019 at 04:22:24AM +0100, Mario Kleiner wrote:
>> The pageflip completion timestamps transmitted to userspace
>> via pageflip completion events are supposed to describe the
>> time at which the first pixel of the new post-pageflip scanout
>
On 2019-02-09 7:52 a.m., Mario Kleiner wrote:
> In VRR mode, keep track of the vblank count of the last
> completed pageflip in amdgpu_crtc->last_flip_vblank, as
> recorded in the pageflip completion handler after each
> completed flip.
>
> Use that count to prevent mmio programming a new pageflip
The __of_translate_address function is used to translate the device tree
addresses to physical addresses using the various ranges property to create
the offset.
However, it's shared between the CPU addresses (based on the ranges
property) and the DMA addresses (based on dma-ranges). Since we're go
Hi,
We've had for quite some time to hack around in our drivers to take into
account the fact that our DMA accesses are not done through the parent
node, but through another bus with a different mapping than the CPU for the
RAM (0 instead of 0x4000 for most SoCs).
After some discussion after
Now that we can express our DMA topology, rely on those property instead of
hardcoding an offset from the dma_addr_t which wasn't really great.
We still need to add some code to deal with the old DT that would lack that
property, but we move the offset to the DRM device dma_pfn_offset to be
able t
Hi all,
Here's the typed component topic branch.
drm-intel maintainers: Please pull, I need this for the mei hdcp work from Ram.
drm-misc maintainers: Please pull, there's a drm doc patch follow-up
that I want to stuff into drm-misc-next.
Greg: The drm side missed our feature cutoff, so will on
On Mon, Feb 11, 2019 at 4:01 PM Kazlauskas, Nicholas
wrote:
>
> On 2/11/19 3:35 AM, Daniel Vetter wrote:
> > On Mon, Feb 11, 2019 at 04:22:24AM +0100, Mario Kleiner wrote:
> >> The pageflip completion timestamps transmitted to userspace
> >> via pageflip completion events are supposed to describe
Hi Maxime.
Looks good, but spotted two small issues.
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +#include
> +#include
These are no longer used as far as I can see.
> +
> + /* Reset */
/* Enable power and de-assert reset */?
> + msleep(20);
> + gpiod
https://bugzilla.kernel.org/show_bug.cgi?id=202537
--- Comment #3 from Bernd Steinhauser (li...@bernd-steinhauser.de) ---
Sure, I can try to bisect it, but it would help if I could narrow the amount of
commits down, because usually the problem doesn't come right away, so it would
take some time to
https://bugs.freedesktop.org/show_bug.cgi?id=109587
Eero Tamminen changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
The MBUS clock is used by the MBUS controller, so let's export it so that
we can use it in our DT node.
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/ccu-sun5i.h | 4
include/dt-bindings/clock/sun5i-ccu.h | 2 +-
2 files changed, 1 insertion(+), 5 dele
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