HDMI on Allwinner A64 has similar like H3/H5/A83T.
Add compatible a64 and update A83T compatible as fallback.
Signed-off-by: Jagan Teki
Reviewed-by: Rob Herring
---
Changes for v3:
- collect Rob r-w-b tag
Changes for v2:
- Add fallback compatible
Documentation/devicetree/bindings/display/sunx
Mixers in Allwinner have similar capabilities as others SoCs with DE2.
Mixer1 has 1 VI and 1 UI planes and supports HW scaling on all
planes.
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
Changes for v2:
- New patch
drivers/gpu/drm/sun4i/sun8i_mixer.c | 12
1 file changed,
Hi Sean,
On 18/07/18 04:57, Sean Wang wrote:
> On Wed, 2018-07-18 at 00:03 +0200, matthias@kernel.org wrote:
>> From: Matthias Brugger
>>
>> The MMSYS subsystem includes clocks and drm components.
>> This patch adds an initailization path through a platform device
>> for the clock part, so th
Enable all necessary HDMI pipeline nodes with HDMI out
connector on Bananpi-m64 board.
Signed-off-by: Jagan Teki
---
Changes for v3:
- Enable all pipeline components
Changes for v2:
- none
.../dts/allwinner/sun50i-a64-bananapi-m64.dts | 34 +++
1 file changed, 34 insertions(+)
Enable DRM Support for Allwinner Display Engine, built as a module.
Signed-off-by: Jagan Teki
---
Changes for v3, v2:
- none
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index c192a42c2ba3..7c362b0ea
Hi Fabio,
On 07/17/2018 02:28 PM, Fabio Estevam wrote:
> Hi Sébastien,
>
> On Tue, Jul 17, 2018 at 4:23 AM, Sébastien Szymanski
> wrote:
>> This patch adds support for the Armadeus ST0700 Adapt. It comes with a
>> Santek ST0700I5Y-RBSLW 7.0" WVGA (800x480) TFT and an adapter board so
>> that it
On 18/07/18 09:27, Matthias Brugger wrote:
> Hi Sean,
>
> On 18/07/18 04:57, Sean Wang wrote:
>> On Wed, 2018-07-18 at 00:03 +0200, matthias@kernel.org wrote:
>>> From: Matthias Brugger
>>>
>>> The MMSYS subsystem includes clocks and drm components.
>>> This patch adds an initailization pat
On Wed, 2018-07-18 at 09:27 +0200, Matthias Brugger wrote:
> Hi Sean,
>
> On 18/07/18 04:57, Sean Wang wrote:
> > On Wed, 2018-07-18 at 00:03 +0200, matthias@kernel.org wrote:
> >> From: Matthias Brugger
> >>
> >> The MMSYS subsystem includes clocks and drm components.
> >> This patch adds an
HDMI on Allwinner A64 similar behaviour like H3 with
PHY of two clock parents (pll-0, pll-1) connected via
second mixer and tcon.
Add all require entries needed for HDMI to function.
Note, that Figure 3-3.Module Clock Diagram also showing
HDMI connected via TCON0 with PLL_VIDEO0. this can be add
Allwinner A64 has DE2 pipeline with tcon0 and tcon1 block
which is similar Allwinner A83T.
This patch adds dt-binding documentation for A64 DE2 tcon1 blocks.
Mixer1 has different configuration for A64 so use separate compatible
but tcon1 has similar behaviour with A83T so add fallback compatible.
On Wed, 2018-07-18 at 11:05 +0300, Laurent Pinchart wrote:
> Hi Sean,
>
> On Wednesday, 18 July 2018 05:57:35 EEST Sean Wang wrote:
> > On Wed, 2018-07-18 at 00:03 +0200, matthias@kernel.org wrote:
> > > From: Matthias Brugger
> > >
> > > The MMSYS subsystem includes clocks and drm component
Enable all necessary HDMI pipeline nodes with HDMI out
connector on Orangepi-win board.
Signed-off-by: Jagan Teki
---
Changes for v3:
- Enable all pipeline components
Changes for v2:
- none
.../dts/allwinner/sun50i-a64-orangepi-win.dts | 34 +++
1 file changed, 34 insertions(+)
Allwinner SoC like SUN8I and SUN50I are now using DE2 Mixer
so enable them as default.
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
Changes for v2:
- Enable for SUN8I
drivers/gpu/drm/sun4i/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/
From: Icenowy Zheng
Allwinner SoCs with DWC HDMI controller have a "HVCC" power pin for the
HDMI part, and on some boards it's connected to a dedicated regulator
rather than the main 3.3v.
Add support for optional HVCC regulator. For boards that doesn't use a
dedicated regulator to power it, the
Display Engine(DE2) in Allwinner A64 has two mixers and tcons.
The routing for mixer0 is through tcon0 and connected to
LVDS/RGB/MIPI-DSI controller.
The routing for mixer1 is through tcon1 and connected to HDMI.
Signed-off-by: Jagan Teki
---
Changes for v3, v2:
- none
drivers/gpu/drm/sun4i/s
* Miquel Raynal [180718 07:24]:
> Hi Janusz, Tony
>
> Janusz Krzysztofik wrote on Wed, 18 Jul 2018
> 01:14:47 +0200:
>
> > Now as Amstrad Delta board - the only user of this driver - provides
> > GPIO lookup tables, switch from GPIO numbers to GPIO descriptors and
> > use the table to locate re
Enable all necessary HDMI pipeline nodes with HDMI out
connector on a64-olinuxino board.
Signed-off-by: Jagan Teki
---
Changes for v3:
- Enable all pipeline components
Changes for v2:
- none
.../dts/allwinner/sun50i-a64-olinuxino.dts| 34 +++
1 file changed, 34 insertions(+)
Allwinner A64 has two clock parents PLL_VIDEO0 and PLL_VIDEO1.
Include these macros on dt-bindings so-that the same can be
used while defining CCU clock phadles.
Signed-off-by: Jagan Teki
Reviewed-by: Rob Herring
---
Changes for v3:
- collect Rob r-w-b tag
Changes for v2:
- new patch
include/
On Wed, Jul 18, 2018 at 6:14 PM, Maxime Ripard
wrote:
> On Wed, Jul 18, 2018 at 04:24:40PM +0530, Jagan Teki wrote:
>> Allwinner A64 has display engine pipeline like other Allwinner SOC's
>> A83T/H3/H5.
>>
>> A64 behaviour similar to Allwinner A83T where
>> Mixer0 => TCON0 => LVDS/RGB/MIPI-DSI
>>
Handle both positive and negative dclk polarity,
according to bus_flags, taking care of this:
On A20 and similar SoCs, the only way to achieve Positive Edge
(Rising Edge), is setting dclk clock phase to 2/3(240°).
By default TCON works in Negative Edge(Falling Edge), this is why phase
is set to 0
Hi Janusz,
On mer., juil. 18 2018, Janusz Krzysztofik wrote:
> This is a follow up of initial submission of a series consisted of
> 6 changes, 3 of which have been already applied or reworkeed.
>
> V2 changelog:
> [PATCH 1/6] ARM: OMAP1: ams-delta: add GPIO lookup tables
> - already in
This patch add the necessary functions to map/unmap GEM
backing memory to the kernel's virtual address space.
Signed-off-by: Haneen Mohammed
---
Changes in v2:
- add vkms_gem_vunmap
- use vmap_count to guard against multiple prepare_fb calls on the same
fb
Changes in v3:
- change vkms_gem_vmap
Enable all necessary HDMI pipeline nodes with HDMI out
connector on pine64 board.
Signed-off-by: Jagan Teki
---
Changes for v3:
- Enable all pipeline components
Changes for v2:
- none
.../boot/dts/allwinner/sun50i-a64-pine64.dts | 34 +++
1 file changed, 34 insertions(+)
diff
Allwinner A64 has display engine pipeline like other Allwinner SOC's A83T/H3/H5.
A64 behaviour similar to Allwinner A83T where
Mixer0 => TCON0 => LVDS/RGB/MIPI-DSI
Mixer1 => TCON1 => HDMI
as per Display System Block Diagram from Allwinner_A64_User_Manual_V1.1.pdf
This is third patch-set followed
On 18/07/18 16:53, Julia Lawall wrote:
> Hello,
>
> Please check on whether the kfree in the remove function is still needed.
> Also the platform_driver structure has two probe fields.
Fair enough, kfree(private) is not needed, because it is allocated with
devm_kzalloc.
I'll fix both errors. T
Hi Russell,
On mar., juil. 10 2018, Russell King wrote:
> Add DT configuration for the HDMI display output on the Dove Cubox.
> This adds support for the LCD0 controller which is connected to a
> TDA19988 HDMI encoder.
>
> Signed-off-by: Russell King
> ---
> arch/arm/boot/dts/dove-cubox.dts
According to documentation and experience with other similar SoCs, video
PLLs don't work stable if their output frequency is set below 192 MHz.
Because of that, set minimal rate to both A64 video PLLs to 192 MHz.
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
Changes for v2:
- New patch
convert drm_atomic_helper_suspend/resume() to use
drm_mode_config_helper_suspend/resume().
exynos_drm_fbdev_suspend/resume can be removed
as drm_mode_config_helper_suspend/resume has
implement the same in generic way.
Signed-off-by: Souptick Joarder
Signed-off-by: Ajit Negi
---
drivers/gpu/drm
Ahoj,
I encountered an error in etnaviv driver on one of my two very similar SBCs.
They have the same board design but slightly different HW configuration.
SW configuration/setup is the same for both. Including kernel configuration.
1. is based on i.MX6S, single core, 512MB RAM, parallel LCD.
2.
This patchset implement CRC debugfs API and add the necessary
infrastructure required to enable to compute and add CRCs entries.
1. add functions to map/unmap buffers to kernel address space.
2. map/unmap buffers in the prepare/cleanup_fb hooks.
3. compute crc using crc32 on the visible portion of
Enable all necessary HDMI pipeline nodes with HDMI out
connector on sopine board.
Signed-off-by: Jagan Teki
---
Changes for v3:
- Enable all pipeline components
Changes for v2:
- none
.../allwinner/sun50i-a64-sopine-baseboard.dts | 34 +++
1 file changed, 34 insertions(+)
diff
Allwinner SUN50I are now using DesignWare HDMI so enable
them as default. This can build DRM_SUN8I_DW_HDMI as module
since DRM in arm64 has module.
Making this as defult to SUN8I, may cause an issue while
loading since arm32 DRM built as static.
Signed-off-by: Jagan Teki
---
Changes for v3:
- sk
于 2018年7月18日 GMT+08:00 下午6:54:47, Jagan Teki 写到:
>HDMI on Allwinner A64 similar behaviour like H3 with
>PHY of two clock parents (pll-0, pll-1) connected via
>second mixer and tcon.
>
>Add all require entries needed for HDMI to function.
>
>Note, that Figure 3-3.Module Clock Diagram also showing
On 18/07/18 16:54, Julia Lawall wrote:
> Please check on whether the kfree is still needed.
No it is not needed, thanks for noting.
Matthias
>
> julia
>
> -- Forwarded message --
> Date: Wed, 18 Jul 2018 22:03:48 +0800
> From: kbuild test robot
> To: kbu...@01.org
> Cc: Julia
This patch map/unmap GEM backing memory to kernel address space
in prepare/cleanup_fb respectively and cache the virtual address
for later use.
Signed-off-by: Haneen Mohammed
---
Changes in v2:
- use vkms_gem_vunmap
Changes in v3:
- return error number instead of vkms_obj->vaddr
drivers/gpu/dr
On 2018-07-19 10:57, Andrzej Hajda wrote:
On 16-Jul-18 17:43, Sandeep Panda wrote:
Add support for TI's sn65dsi86 dsi2edp bridge chip.
The chip converts DSI transmitted signal to eDP signal,
which is fed to the connected eDP panel.
This chip can be controlled via either i2c interface or
dsi int
Hi Paul,
can you give a try to this patch on A13 with VGA DAC?
Unfortunately I don't have an A13 board to test it.
Thanks in advance.
Giulio
Il 18/07/2018 16:23, Giulio Benetti ha scritto:
Handle both positive and negative dclk polarity,
according to bus_flags, taking care of this:
On A20 an
On Wed, 2018-07-18 at 09:09 +0100, Lee Jones wrote:
> On Mon, 16 Jul 2018, Daniel Thompson wrote:
>
> > Currently, if the DT does not define num-interpolated-steps then
> > num_steps is undefined and the interpolation code will deploy
> > randomly.
> > Fix this.
> >
> > Fixes: 573fe6d1c25c ("back
On Wed, Jul 18, 2018 at 02:44:18PM -0400, Sean Paul wrote:
> On Wed, Jul 18, 2018 at 07:24:34PM +0300, Haneen Mohammed wrote:
> > First, just so you have the complete view, this is the missing part in this
> > patch:
> > -- vkms_crc.c
> > static uint32_t _vkms_get_crc(struct vkms_crc_data *crc
On Wed, 2018-07-18 at 14:08 +0100, Lee Jones wrote:
> On Wed, 18 Jul 2018, Marcel Ziswiler wrote:
>
> > On Wed, 2018-07-18 at 11:12 +0100, Daniel Thompson wrote:
> > > On Wed, Jul 18, 2018 at 10:53:35AM +0100, Lee Jones wrote:
> > > > On Wed, 18 Jul 2018, Marcel Ziswiler wrote:
> > > >
> > > > >
Subclass CRTC state struct to enable storing driver's private
state. This patch only adds the base drm_crtc_state struct and
the atomic functions that handle it.
Signed-off-by: Haneen Mohammed
Reviewed-by: Daniel Vetter
Reviewed-by: Sean Paul
---
drivers/gpu/drm/vkms/vkms_crtc.c | 53 +
On 07/17/2018 04:26 AM, Takashi Iwai wrote:
Hi,
this is a preliminiary patch set to convert the existing i915 /
HD-audio component binding to be applicable to other drivers like
radeon / amdgpu. This patchset itself doesn't change the
functionality but only renames and split to a new drm_audi
First, just so you have the complete view, this is the missing part in this
patch:
-- vkms_crc.c
static uint32_t _vkms_get_crc(struct vkms_crc_data *crc_data)
{
struct drm_framebuffer *fb = &crc_data->fb;
struct drm_gem_object *gem_obj = drm_gem_fb_get_obj(fb, 0);
struc
Implement the set_crc_source() callback.
Compute CRC using crc32 on the visible part of the framebuffer.
Use ordered workqueue to compute and add CRC at the end of a vblank.
Use appropriate synchronization methods since the CRC computation must
be atomic wrt the generated vblank event for a given
On Wed, 2018-07-18 at 11:12 +0100, Daniel Thompson wrote:
> On Wed, Jul 18, 2018 at 10:53:35AM +0100, Lee Jones wrote:
> > On Wed, 18 Jul 2018, Marcel Ziswiler wrote:
> >
> > > On Wed, 2018-07-18 at 09:09 +0100, Lee Jones wrote:
> > > > On Mon, 16 Jul 2018, Daniel Thompson wrote:
> > > >
> > > >
Call atomic_helper_check_plane_state to clip plane coordinates.
Signed-off-by: Haneen Mohammed
Reviewed-by: Sean Paul
---
Changes in v2:
- check for plane_state->visible since we can't handle a disabled
primary plane yet.
drivers/gpu/drm/vkms/vkms_plane.c | 29 +
Allwinner SoC like SUN8I and SUN50I has DE2 CCU so enable them
as default.
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
Changes for v2:
- Enable for MACH_SUN8I
drivers/clk/sunxi-ng/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/s
Enable all necessary HDMI pipeline nodes with HDMI out
connector on nanopi-a64 board.
Signed-off-by: Jagan Teki
---
Changes for v3:
- Enable all pipeline components
Changes for v2:
- none
.../dts/allwinner/sun50i-a64-nanopi-a64.dts | 34 +++
1 file changed, 34 insertions(+)
d
On Wed, Jul 18, 2018 at 04:56:39PM -0400, Lyude Paul wrote:
> When DP MST hubs get confused, they can occasionally stop responding for
> a good bit of time up until the point where the DRM driver manages to
> do the right DPCD accesses to get it to start responding again. In a
> worst case scenario
On Wed, Jul 18, 2018 at 04:56:40PM -0400, Lyude Paul wrote:
> For nouveau, while the GPU is guaranteed to be on when a hotplug has
> been received, the same assertion does not hold true if a connector
> probe has been started by userspace without having had received a sysfs
> event.
>
> So ensure
In prevision for introducing a new quirk that will be used at atomic
plane check time, register the quirks structure with the backend
structure. This way, it can easily be grabbed where needed.
Signed-off-by: Paul Kocialkowski
---
Version 2 of this series was resent to include this patch, that w
Not all sunxi platforms with the first version of the Display Engine
support an alpha component on the plane with the lowest z position
(as in: lowest z-pos), that gets blended with the background color.
In particular, the A13 is known to have this limitation. However, it was
recently discovered t
Hello Nicholas Mc Guire,
The patch d530b5f1ca0b: "drm: re-enable error handling" from Jul 14,
2018, leads to the following static checker warning:
drivers/gpu/drm/drm_context.c:375 drm_legacy_addctx()
warn: unsigned 'ctx->handle' is never less than zero.
drivers/gpu/drm/drm_conte
The xen_drm_front_gem_get_sg_table() function is supposed to return
error pointer. The current code, would trigger a NULL dereference in
drm_gem_map_dma_buf().
Fixes: c575b7eeb89f ("drm/xen-front: Add support for Xen PV display frontend")
Signed-off-by: Dan Carpenter
diff --git a/drivers/gpu/dr
This funciton is only called from drm_gem_map_dma_buf(). It's supposed
to return error pointers on failure and returning a NULL pointer will
lead to a NULL dereference.
Fixes: 78467dc5f70f ("drm/cma: add low-level hook functions to use prime
helpers")
Signed-off-by: Dan Carpenter
diff --git a/
Hi, Dan!
Thank you for the patch and sorry I was clumsy sending v3.
Do you want me to send v3 now with the fixes for both Xen and CMA?
Thank you,
Oleksandr
On 07/19/2018 11:11 AM, Dan Carpenter wrote:
The xen_drm_front_gem_get_sg_table() function is supposed to return
error pointer. The cu
Does anybody see any reasons why this should get into mmotm tree?
I do not want to rush this in but if general feeling is to push it for
the upcoming merge window then I will not object.
--
Michal Hocko
SUSE Labs
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Roger unfortunately doesn't work for AMD any longer. So add Rui and
Jerry as co-maintainer as well.
Signed-off-by: Christian König
---
MAINTAINERS | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9d5eeff51b5f..e613df455ae0 100644
--- a/MAINTAI
On Thu, Jul 19, 2018 at 12:06:38PM +0300, Oleksandr Andrushchenko wrote:
> Hi, Dan!
>
> Thank you for the patch and sorry I was clumsy sending v3.
>
> Do you want me to send v3 now with the fixes for both Xen and CMA?
>
> Thank you,
Sorry, I forgot that you had sent these earlier. After a whil
Oleksandr sent this patch already. Please disregard mine.
regards,
dan carpenter
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On 07/19/2018 12:20 PM, Dan Carpenter wrote:
On Thu, Jul 19, 2018 at 12:06:38PM +0300, Oleksandr Andrushchenko wrote:
Hi, Dan!
Thank you for the patch and sorry I was clumsy sending v3.
Do you want me to send v3 now with the fixes for both Xen and CMA?
Thank you,
Sorry, I forgot that you had
From: Oleksandr Andrushchenko
Dan Carpenter has reported that there is the following static checker
warning:
drivers/gpu/drm/drm_prime.c:317 drm_gem_map_dma_buf()
warn: 'sgt' can also be NULL
314 sgt = obj->dev->driver->gem_prime_get_sg_table(obj);
315
316 if (!IS_ERR(sgt
Hi,
this is version 3 of the WARN_CONSOLE_UNLOCKED patch set. The
macro prints a warning if the console's critical sections are
entered without holding the console lock. This patch set allows
to disable the warnings while debugging the console.
In the original approach, WARN_CONSOLE_UNLOCKED was
If the console is unlocked during registration, the console subsystem
generates significant amounts of warnings, which obfuscate actual
debugging messages. Setting ignore_console_lock_warning while debugging
console registration avoid the noise.
v3:
- manipulate ignore_console_lock_warning
The macro WARN_CONSOLE_UNLOCKED prints a warning when a thread enters
the console's critical section without having acquired the console
lock. The console lock can be ignored when debugging the console using
printk, but this makes WARN_CONSOLE_UNLOCKED generate unnecessary
warnings.
The variable i
Hi
Am 19.07.2018 um 12:05 schrieb Sergey Senozhatsky:
> On (07/19/18 10:53), Petr Mladek wrote:
>> Hmm, this approach is racy if there are other users
>> saving/setting/restoring ignore_console_lock_warning in parallel.
>> I mean that this works only when the entire safe/set/restore
>> operation i
Reviewed-by: Dan Carpenter
regards,
dan carpenter
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On 07/19/2018 01:24 PM, Dan Carpenter wrote:
Reviewed-by: Dan Carpenter
Thank you,
if nobody objects I'll push it to drm-misc-next next Monday
regards,
dan carpenter
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Hi Mahesh,
Thank you for the patch.
On Friday, 13 July 2018 16:59:37 EEST Mahesh Kumar wrote:
> This patch implements "verify_crc_source" callback function for
> rcar drm driver.
>
> Changes Since V1:
> - avoid duplication of code
> Changes Since V2:
> - further optimize the code
>
> Signed-o
On Thu, Jul 19, 2018 at 11:10:30AM +0300, Dan Carpenter wrote:
> Hello Nicholas Mc Guire,
>
> The patch d530b5f1ca0b: "drm: re-enable error handling" from Jul 14,
> 2018, leads to the following static checker warning:
>
> drivers/gpu/drm/drm_context.c:375 drm_legacy_addctx()
> warn: u
On (07/19/18 10:53), Petr Mladek wrote:
> Hmm, this approach is racy if there are other users
> saving/setting/restoring ignore_console_lock_warning in parallel.
> I mean that this works only when the entire safe/set/restore
> operation is nested or sequential.
Good point!
However, I tend to thin
On Wed 2018-07-18 11:30:02, Thomas Zimmermann wrote:
> If the console is unlocked during registration, the console subsystem
> generates significant amounts of warnings, which obfuscate actual
> debugging messages. Setting ignore_console_lock_warning while debugging
> console registration avoid the
Hi,
On (07/19/18 12:20), Thomas Zimmermann wrote:
> Am 19.07.2018 um 12:05 schrieb Sergey Senozhatsky:
> > On (07/19/18 10:53), Petr Mladek wrote:
> >> Hmm, this approach is racy if there are other users
> >> saving/setting/restoring ignore_console_lock_warning in parallel.
> >> I mean that this w
Hi,
On 19-07-18 10:53, Petr Mladek wrote:
On Wed 2018-07-18 11:30:02, Thomas Zimmermann wrote:
If the console is unlocked during registration, the console subsystem
generates significant amounts of warnings, which obfuscate actual
debugging messages. Setting ignore_console_lock_warning while de
Hi,
On 19-07-18 12:15, Thomas Zimmermann wrote:
Hi,
this is version 3 of the WARN_CONSOLE_UNLOCKED patch set. The
macro prints a warning if the console's critical sections are
entered without holding the console lock. This patch set allows
to disable the warnings while debugging the console.
I
https://bugs.freedesktop.org/show_bug.cgi?id=107153
Leo Li changed:
What|Removed |Added
Attachment #140678|0 |1
is obsolete|
https://bugs.freedesktop.org/show_bug.cgi?id=107153
--- Comment #19 from Leo Li ---
(In reply to Patrik Kullman from comment #17)
> Created attachment 140685 [details]
> 4.18-rc5 dmesg with debug (-freesync)
>
> Could also not build with freesync.
>
> Mine seem to crash a lot faster.
Ah, I got
On Thu, Jul 19, 2018 at 5:17 AM, Christian König
wrote:
> Roger unfortunately doesn't work for AMD any longer. So add Rui and
> Jerry as co-maintainer as well.
>
> Signed-off-by: Christian König
Acked-by: Alex Deucher
David was also interested in helping out as a maintainer. I don't
remember
https://bugs.freedesktop.org/show_bug.cgi?id=105760
--- Comment #53 from Thomas Martitz ---
Alright, after some digging I found that that the ACPI address of my dgpu is
\_SB_.PCI0.RP01.PXSX
Then I used https://github.com/mkottman/acpi_call to execute
\_SB_.PCI0.RP01.PXSX._PR3 as you suggested, b
https://bugs.freedesktop.org/show_bug.cgi?id=106544
--- Comment #9 from Przemek ---
I am not sure if my problem is related, but on every boot I get WARNING
message:
[ 2791.454011] WARNING: CPU: 0 PID: 313 at
drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:132
generic_reg_update_ex+0xe4/0x
tree: git://people.freedesktop.org/~agd5f/linux.git drm-next-4.19-wip
head: 73b1f7132d9ad442b24d70d8769a4642302d6b49
commit: ce7577a2194b58bf7faf303612a24b7cd5210afc [101/128] drm/amdgpu/pp: split
out common smumgr smu9 code
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/vega1
On Thu, Jul 19, 2018 at 10:08:37AM +0200, Paul Kocialkowski wrote:
> In prevision for introducing a new quirk that will be used at atomic
> plane check time, register the quirks structure with the backend
> structure. This way, it can easily be grabbed where needed.
>
> Signed-off-by: Paul Kocialk
https://bugs.freedesktop.org/show_bug.cgi?id=107277
--- Comment #7 from Michel Dänzer ---
(In reply to Paul Menzel from comment #6)
> I increased the maximum depth to 10,
Can you attach the resulting HTML output, or is it too large?
> and according to the trace the loop in `gfx_v9_0_enter_rlc_s
On Wed, Jul 18, 2018 at 04:23:57PM +0200, Giulio Benetti wrote:
> Handle both positive and negative dclk polarity,
> according to bus_flags, taking care of this:
>
> On A20 and similar SoCs, the only way to achieve Positive Edge
> (Rising Edge), is setting dclk clock phase to 2/3(240°).
> By defau
https://bugs.freedesktop.org/show_bug.cgi?id=107277
--- Comment #8 from Paul Menzel ---
(In reply to Michel Dänzer from comment #7)
> (In reply to Paul Menzel from comment #6)
> > I increased the maximum depth to 10,
>
> Can you attach the resulting HTML output, or is it too large?
With a max-d
https://bugs.freedesktop.org/show_bug.cgi?id=107153
--- Comment #20 from Patrik Kullman ---
Yes this actually fixes the crash and I do get picture on the TV!
Not sure if related but I can't interact with the system/desktop with keyboard
or mouse. Either it's a separate input issue (although it w
https://bugs.freedesktop.org/show_bug.cgi?id=107277
--- Comment #9 from Paul Menzel ---
Created attachment 140713
--> https://bugs.freedesktop.org/attachment.cgi?id=140713&action=edit
Trimmed ftrace output
Here is the trimmed ftrace output.
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Currently, if the DT does not define num-interpolated-steps then
num_steps is undefined and the interpolation code will deploy randomly.
Fix this.
Additionally fix a small grammar error that was identified and
tighten up return code checking of DT properties, both of which came
up during review of
https://bugs.freedesktop.org/show_bug.cgi?id=107277
--- Comment #10 from Michel Dänzer ---
Created attachment 140714
--> https://bugs.freedesktop.org/attachment.cgi?id=140714&action=edit
drm/amdgpu: Fix RLC safe mode test in gfx_v9_0_enter_rlc_safe_mode
Does this patch help?
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https://bugs.freedesktop.org/show_bug.cgi?id=107065
Andrey Grodzovsky changed:
What|Removed |Added
Assignee|dri-devel@lists.freedesktop |andrey.grodzov...@amd.com
el-next-2018-07-19
for you to fetch changes up to ef821e3f14e868779505bf08f96afb4eade53652:
drm/i915: Update DRIVER_DATE to 20180719 (2018-07-19 08:47:59 -0700)
On GEM side:
- GuC related fixes (Chris, Michal)
- GTT read-only
https://bugs.freedesktop.org/show_bug.cgi?id=107296
Bug ID: 107296
Summary: WARNING: CPU: 0 PID: 370 at
drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_cal
cs.c:1355 dcn_bw_update_from_pplib+0x16b/0x280
[amdgpu]
https://bugs.freedesktop.org/show_bug.cgi?id=105684
--- Comment #33 from Paul Menzel ---
With Linux 4.18-rc5+ and merged drm-tip, the general protection fault happens
at a different point from `initialize_plane`.
```
15.389: [ 24.739453] [drm] Display Core initialized with v3.1.52!
15.389: [
https://bugzilla.kernel.org/show_bug.cgi?id=200605
Bug ID: 200605
Summary: Screen flickering on AMD graphics in 4.18
Product: Drivers
Version: 2.5
Kernel Version: 4.18-rc5
Hardware: All
OS: Linux
Tree: Mainlin
https://bugzilla.kernel.org/show_bug.cgi?id=200605
--- Comment #1 from ric...@gmx.at ---
Just for completeness: I did not have this problem on 4.17.5 (again, the
mainline kernel from the ubuntu kernel team)
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On Thu, 19 Jul 2018 15:05:45 +0200,
Pierre-Louis Bossart wrote:
>
> On 7/19/18 12:50 AM, Takashi Iwai wrote:
> > On Wed, 18 Jul 2018 22:54:35 +0200,
> > Pierre-Louis Bossart wrote:
> >>
> >>
> >>
> >> On 07/17/2018 04:26 AM, Takashi Iwai wrote:
> >>> Hi,
> >>>
> >>> this is a preliminiary patch se
https://bugzilla.kernel.org/show_bug.cgi?id=200607
Bug ID: 200607
Summary: [amdgpu] Polaris10 driver crash with the recent
linux-firmware update
Product: Drivers
Version: 2.5
Kernel Version: 4.17.6
Hardware: All
https://bugzilla.kernel.org/show_bug.cgi?id=200607
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC||alexdeuc...@gmail.c
https://bugzilla.kernel.org/show_bug.cgi?id=200607
--- Comment #2 from Parker Reed (parker.l.r...@gmail.com) ---
I'm streaming via Steam in-home streaming and occasionally a fullscreen
application will mess things up. When I reboot, SDDM/Plasma hang because of
that driver crash. Leaving the up to
https://bugzilla.kernel.org/show_bug.cgi?id=200607
--- Comment #3 from Alex Deucher (alexdeuc...@gmail.com) ---
Do you have similar issues with a newer kernel?
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