From: "uma.shankar at intel.com (Uma Shankar)"
Add Plane Degamma as a blob property and plane
degamma size as a range property.
(am from https://patchwork.kernel.org/patch/10046515/)
Change-Id: Iaead6f944a8b677227d1be11169f46178de533b1
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_atomic
Parts of PHY code could be useful also for custom PHYs. For example,
Allwinner A83T has custom PHY which is probably Synopsys gen2 PHY
with few additional memory mapped registers, so most of the Synopsys PHY
related code could be reused.
Functions exported here are actually not specific to Synopsy
Allwinner SoCs have dw hdmi controller v1.32a which exhibits same
magenta line issue as i.MX6Q and i.MX6DL. Enable workaround for it.
Tests show that one iteration is enough.
Acked-by: Laurent Pinchart
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 8 +---
1
Currently, if one of the factors isn't present, bit 0 gets always set to
1. For example, A83T has NMP PLLs modelled as NKMP PLL without K. Since
K is not specified, it's offset, width and shift is 0. Driver assumes
that lowest value possible is 1, otherwise we would get division by 0.
That situatio
Hi all,
I was just wondering about the status of this patch.
Thanks
--
Gustavo
On 01/19/2018 04:18 PM, Felix Kuehling wrote:
Looks good. This change is Reviewed-by: Felix Kuehling
Regards,
Felix
On 2018-01-18 07:39 PM, Gustavo A. R. Silva wrote:
Use ARRAY_SIZE instead of dividing sizeo
It supports 1 VI and 1 UI plane and HW scaling on both planes.
Acked-by: Maxime Ripard
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
b/drivers/gpu/drm/sun4i/sun8i_mixer.
On Wed, Feb 14, 2018 at 9:09 PM, Jernej Skrabec wrote:
> A83T has DW HDMI IP block with a custom PHY similar to Synopsys gen2
> HDMI PHY.
>
> Only video output was tested, while HW also supports audio and CEC.
> Support for them will be added later.
>
> Signed-off-by: Jernej Skrabec
...
> --- /
Validate drm PLANE_CTM matrix and map it to YUV2YUV registers.
Change-Id: Ib4fe49558c6266bf0c310af121d625cd7b2cedf6
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 45 +
1 file changed, 45 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
b/drivers/gpu
Currently, if amdgpu_vm_bo_update() fails, the returned error
is being ignored.
Fix this by properly checking _r_ after calling amdgpu_vm_bo_update.
Also, remove redundant code just before label _error_.
Addresses-Coverity-ID: 1464280 ("Unused value")
Fixes: 0abc6878fc2d ("drm/amdgpu: update VM P
From: "uma.shankar at intel.com (Uma Shankar)"
Define helper function to enable Plane color features
to attach plane color properties to plane structure.
(am from https://patchwork.kernel.org/patch/9971333/)
Change-Id: I0a6647607fe482786e7cdb5f997faf196b2f59a2
Signed-off-by: Uma Shankar
---
d
From: "uma.shankar at intel.com (Uma Shankar)"
Add a blob property for plane CSC usage.
(am from https://patchwork.kernel.org/patch/9971339/)
Change-Id: I688ce7c95c20d307cb0aa35c5eba5ce2e1e88314
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_atomic.c| 10 ++
drivers/gpu/dr
>
>
> >
> > My requirement:
> > 1. support non-contiguous memory allocation as GPU buffer
> > 2. support contiguous memory allocation too for exporting to some
> > display DRM driver as framebuffer
>
> btw, I think etnaviv deals w/ contiguous scanout buffer by just
> importing the scanout buffer fr
Enable and expose 'PLANE_CTM' matrix on primary and overaly planes.
The property can be use to set a RGB to RGB 3X3 color conversion
matrix that will be applied to planes at scanout.
Change-Id: Ifb7a680ab84c17557b8b3c5aaba1aa3b4eecfcaa
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 5 +
1
On 2018-02-14 — 09:36, Ilia Mirkin wrote:
> On Wed, Feb 14, 2018 at 9:35 AM, Ilia Mirkin wrote:
> > On Wed, Feb 14, 2018 at 9:29 AM, Meelis Roos wrote:
> >>> This is 4.16-rc1+todays git on a lowly P4 with NV5, worked fine in 4.15:
> >>
> >> NV5 in another PC (secondary card in x86-64) made the sy
Currently NV12 hardware overlays scheduled with atomic interface are
converted to RGB using a color space conversion different than BT.601.
The result is that colors of NV12 buffers composited with Mali don't
match colors of YUV hardware overlays.
Running modetest with an NV12 plane also shows co
Since its inclusion in 2012 via commit bea8a429d91a ("drm/exynos: add rotator
ipp driver")
this header is not used by any source files and is empty.
Lets just remove it.
Signed-off-by: Corentin Labbe
---
drivers/gpu/drm/exynos/exynos_drm_rotator.h | 19 ---
1 file changed, 19 de
Some TCONs on newer SoCs doesn't support channel 0, since they are meant
to be used only with TV or HDMI encoder.
Prepare support for them with adding has_channel_0 quirk.
Acked-by: Maxime Ripard
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 41
BananaPi M3 includes HDMI connector, so add support for it.
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
b/arch/arm/boot/dts/sun8i-a83t-b
dw_hdmi shouldn't set drvdata since some drivers might need to store
it's own data there. Rework dw_hdmi in a way to return struct dw_hdmi
instead to store it in drvdata. This way drivers are responsible to
store and pass structure when needed.
Idea was taken from the following commit:
8242ecbd597
From: "uma.shankar at intel.com (Uma Shankar)"
Add plane gamma as blob property and size as a
range property.
(am from https://patchwork.kernel.org/patch/9971325/)
Change-Id: I606cd40c9748b136fc2bf4750bea1da285add62d
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_atomic.c| 8
Hello,
this patch series adds a per plane color matrix property as well as an
implementation for rockchip.
This patch series builds on and includes previous work done by uma.shankar:
https://lists.freedesktop.org/archives/dri-devel/2017-September/153347.html
The first rockchip patch of this serie
Fix inconsistent IS_ERR and PTR_ERR in shrink_boom.
The proper pointer to use is _explode_ instead of _purge_.
This issue was detected with the help of Coccinelle.
Fixes: fe215c8bc426 ("drm/i915/selftests: add missing gtt shrinker test")
Signed-off-by: Gustavo A. R. Silva
---
drivers/gpu/drm/i9
rk3399_vop_yuv2yuv registers can be used also by vop_lit (less capable
crtc) to control per-plane color conversion pipeline.
Change-Id: Iaad1efeae7141959c61e976988bd9d699ce3858f
---
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/roc
When parent rate is 24MHz and multiplier N >= 180, intermediate clock
rate doesn't fit in 32 bit variable anymore.
Because of that, introduce function for calculating clock rate which
uses 64 bit variable for intermediate result.
Acked-by: Maxime Ripard
Signed-off-by: Jernej Skrabec
---
driver
From: "uma.shankar at intel.com (Uma Shankar)"
Define a helper function to set legacy gamma table
size for planes.
(am from https://patchwork.kernel.org/patch/9971343/)
Change-Id: I3d0c3e71d92300259cdfcebed4349207f64e4083
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_color_mgmt.c | 41 ++
This commit adds all bits necessary for HDMI on A83T - mixer1, tcon1,
hdmi, hdmi phy and hdmi pinctrl entries.
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 108 +-
1 file changed, 107 insertions(+), 1 deletion(-)
diff --git a/arch/arm
...instead of open coding file operations followed by custom ->open()
callbacks per each attribute.
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/gvt/debugfs.c | 13 +--
drivers/gpu/drm/i915/i915_debugfs.c | 76 ++---
2 files changed, 12 insertions(
A83T has DW HDMI IP block with a custom PHY similar to Synopsys gen2
HDMI PHY.
Only video output was tested, while HW also supports audio and CEC.
Support for them will be added later.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/Kconfig | 9 ++
drivers/gpu/drm/sun4i/Makef
From: Kieran Bingham
The D3 supports two LVDS channels. Extend the binding to support them.
Signed-off-by: Kieran Bingham
---
Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/r
This patch adds YUV2YUV registers to enable and control per-plane
RGB2RGB colos space conversion matrix.
Change-Id: I8f421222da3587caea6373e2201e918f0c5e2646
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 7 +++
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 48 +
2 files c
This commit adds all necessary compatibles and descriptions needed to
implement A83T HDMI pipeline.
Mixer is already properly described, so only compatible is added.
However, A83T TV TCON, which is connected to HDMI, doesn't have channel 0,
contrary to all TCONs currently described. Because of th
This TCON is connected to HDMI encoder.
Acked-by: Maxime Ripard
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index 32d9a5eb9e25..48678705ef43
This patch series implements support for A83T DW HDMI and PHY. Contrary to
v1 series, this one is based on latest linux-next, since all needed patches
were merged.
While exactly this combination of HDMI controller and PHY is not common in
Allwinner SoCs, this patch series nevertheless makes ground
From: Kieran Bingham
Document the D3 (r8a77995) SoC in the R-Car DU bindings.
Signed-off-by: Kieran Bingham
---
Documentation/devicetree/bindings/display/renesas,du.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt
b/Documentati
On 15/02/18 08:38, Kieran Bingham wrote:
> From: Kieran Bingham
>
> The D3 supports two LVDS channels. Extend the binding to support them.
>
> Signed-off-by: Kieran Bingham
> ---
> Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> di
On Wed, 14 Feb 2018, "Gustavo A. R. Silva" wrote:
> Fix inconsistent IS_ERR and PTR_ERR in shrink_boom.
> The proper pointer to use is _explode_ instead of _purge_.
>
> This issue was detected with the help of Coccinelle.
>
> Fixes: fe215c8bc426 ("drm/i915/selftests: add missing gtt shrinker test"
Hi Laurent,
On Thu, Feb 15, 2018 at 1:04 AM, Laurent Pinchart
wrote:
> The internal LVDS encoders now have their own DT bindings. Before
> switching the driver infrastructure to those new bindings, implement
> backward-compatibility through live DT patching.
>
> Patching is disabled and will be e
On Thu, Feb 15, 2018 at 1:04 AM, Laurent Pinchart
wrote:
> The internal LVDS encoder now has DT bindings separate from the DU. Port
> the device tree over to the new model.
>
> Signed-off-by: Laurent Pinchart
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -106
On 02/08/2018 02:11 PM, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> [ dri-devel ML & arch/[score,um] Maintainers added to Cc: ]
>
> On Friday, February 02, 2018 08:59:57 AM Christian Borntraeger wrote:
>> On 02/01/2018 07:41 PM, Farhan Ali wrote:
>>> The 'commit e25df1205f37 ("[S390] Kconfig:
https://bugs.freedesktop.org/show_bug.cgi?id=105076
Marta Löfstedt changed:
What|Removed |Added
Summary|[CI] results file indicate |[CI] results file indicate
Hi Gustavo,
The patch is queued for the merge window of kernel 4.17 (opens in
about 7 weeks from now).
Oded
On Wed, Feb 14, 2018 at 11:30 PM, Gustavo A. R. Silva
wrote:
> Hi all,
>
> I was just wondering about the status of this patch.
>
> Thanks
> --
> Gustavo
>
>
> On 01/19/2018 04:18 PM, Feli
The plane buffer address/stride/height was incorrectly updated in the
plane_atomic_update operation instead of the vsync irq.
This patch delays this operation in the vsync irq along with the
other plane delayed setup.
This issue was masked using legacy framebuffer and X11 modesetting, but
is clear
OF graph describes MHL data lanes between MHL and respective USB
connector.
Signed-off-by: Andrzej Hajda
---
.../boot/dts/exynos/exynos5433-tm2-common.dtsi | 31 +++---
1 file changed, 28 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-co
Samsung micro-USB 11-pin connector beside standard micro-USB pins,
has pins dedicated to route MHL traffic.
Signed-off-by: Andrzej Hajda
---
.../connector/samsung,usb-connector-11pin.txt | 51 ++
1 file changed, 51 insertions(+)
create mode 100644
Documentation/devicet
Hi,
Thanks for reviews of previous iterations.
This patchset introduces USB physical connector bindings, together with working
example.
v2: I have addressed comments by Rob and Laurent, thanks
v3: Separate binding for Samsung 11-pin connector, added full-blown USB-C
example.
Changes are also
Since USB connector bindings are available we can describe it on TM2(e).
Signed-off-by: Andrzej Hajda
---
arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
b/arch/arm64/boot/dts/
These bindings allow to describe most known standard USB connectors
and it should be possible to extend it if necessary.
USB connectors, beside USB can be used to route other protocols,
for example UART, Audio, MHL. In such case every device passing data
through the connector should have appropriat
From: Maciej Purski
Currently MHL chip must be turned on permanently to detect MHL cable. It
duplicates micro-USB controller's (MUIC) functionality and consumes
unnecessary power. Lets use extcon attached to MUIC to enable MHL chip
only if it detects MHL cable.
Signed-off-by: Maciej Purski
Sign
Since extcon property is not allowed in DT, extcon subsystem requires
another way to get extcon device. Lets try the simplest approach - get
edev by of_node.
Signed-off-by: Andrzej Hajda
Acked-by: Chanwoo Choi
---
v2: changed label to follow local convention (Chanwoo)
---
drivers/extcon/extcon.
An even simpler approach would be:
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index cbe1d978693a..35b7aba4b6a0 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -952,6 +952,10 @@ config S390_HYPFS_FS
source "arch/s390/kvm/Kconfig"
+config DUMMY_CONSOLE
+ bool
+ def
Hi Geert,
On Thursday, 15 February 2018 11:18:25 EET Geert Uytterhoeven wrote:
> On Thu, Feb 15, 2018 at 1:04 AM, Laurent Pinchart wrote:
> > The internal LVDS encoders now have their own DT bindings. Before
> > switching the driver infrastructure to those new bindings, implement
> > backward-comp
To enable the virtual terminal layer with virtio-gpu, we need to
provide the dummy console. This console is hidden behind CONFIG_IOMEM
via the graphics support. Instead of fully enabling the graphic
drivers lets just provide a Kconfig option for the dummy console.
Signed-off-by: Christian Borntrae
Hi Christian,
On Thu, Feb 15, 2018 at 12:14 PM, Christian Borntraeger
wrote:
> To enable the virtual terminal layer with virtio-gpu, we need to
> provide the dummy console. This console is hidden behind CONFIG_IOMEM
> via the graphics support. Instead of fully enabling the graphic
> drivers lets
Hi Geert,
On Thursday, 15 February 2018 11:20:22 EET Geert Uytterhoeven wrote:
> On Thu, Feb 15, 2018 at 1:04 AM, Laurent Pinchart wrote:
> > The internal LVDS encoder now has DT bindings separate from the DU. Port
> > the device tree over to the new model.
> >
> > Signed-off-by: Laurent Pinchart
Hi Laurent,
On Thu, Feb 15, 2018 at 12:03 PM, Laurent Pinchart
wrote:
> On Thursday, 15 February 2018 11:18:25 EET Geert Uytterhoeven wrote:
>> On Thu, Feb 15, 2018 at 1:04 AM, Laurent Pinchart wrote:
>> > The internal LVDS encoders now have their own DT bindings. Before
>> > switching the driver
When we descend the tree to find our slot, if we step to the right, we
are no longer the leftmost node.
Fixes: f808c13fd373 ("lib/interval_tree: fast overlap detection")
Signed-off-by: Chris Wilson
Cc: Davidlohr Bueso
Cc: Jérôme Glisse
Cc: Christian König
Cc: # v4.14+
---
drivers/gpu/drm/drm
On 02/15/2018 12:26 PM, Geert Uytterhoeven wrote:
> Hi Christian,
>
> On Thu, Feb 15, 2018 at 12:14 PM, Christian Borntraeger
> wrote:
>> To enable the virtual terminal layer with virtio-gpu, we need to
>> provide the dummy console. This console is hidden behind CONFIG_IOMEM
>> via the graphics s
Hi Ville,
I have addressed your review comments (including the policy regarding,
rejection of mode with aspect ratio, if no aspect ratio cap)
and other suggestions in the next patch-set. I will be sending the next
patch-set, shortly.
Regards,
Ankit
On 2/13/2018 10:15 PM, Ville Syrjälä wr
On 15.02.2018 12:26, Geert Uytterhoeven wrote:
> Hi Christian,
>
> On Thu, Feb 15, 2018 at 12:14 PM, Christian Borntraeger
> wrote:
>> To enable the virtual terminal layer with virtio-gpu, we need to
>> provide the dummy console. This console is hidden behind CONFIG_IOMEM
>> via the graphics supp
On 02/15/2018 12:57 PM, Thomas Huth wrote:
> On 15.02.2018 12:26, Geert Uytterhoeven wrote:
>> Hi Christian,
>>
>> On Thu, Feb 15, 2018 at 12:14 PM, Christian Borntraeger
>> wrote:
>>> To enable the virtual terminal layer with virtio-gpu, we need to
>>> provide the dummy console. This console is
On Thu, Feb 15, 2018 at 11:39 AM, Andrzej Hajda wrote:
> OF graph describes MHL data lanes between MHL and respective USB
> connector.
>
> Signed-off-by: Andrzej Hajda
> ---
> .../boot/dts/exynos/exynos5433-tm2-common.dtsi | 31
> +++---
> 1 file changed, 28 insertions(+), 3
On Wed, Feb 07, 2018 at 01:41:18AM +, Pandiyan, Dhinakaran wrote:
> On Fri, 2018-02-02 at 21:12 -0800, Dhinakaran Pandiyan wrote:
> > 570e86963a51 ("drm: Widen vblank count to 64-bits [v3]") changed the
> > return type for drm_crtc_vblank_count() to u64. This could cause
> > potential problems
From: Ankit Nautiyal
This patch series is a re-attempt to enable aspect ratio support in DRM layer.
Currently the aspect ratio information gets lost in translation during a
user->kernel mode or vice versa.
The old patch series (https://pw-emeril.freedesktop.org/series/10850/) had
4 patches, out
From: Ville Syrjälä
Use drm_mode_equal_no_clocks_no_stereo() in
drm_match_hdmi_mode_clock_tolerance() for consistency as we
also use it in drm_match_hdmi_mode() and the cea mode matching
functions.
This doesn't actually change anything since the input mode
comes from detailed timings and we matc
From: Ville Syrjälä
commit 6dffd431e229 ("drm: Add aspect ratio parsing in DRM layer")
cause us to not send out any VICs in the AVI infoframes. That commit
was since reverted, but if and when we add aspect ratio handing back
we need to be more careful.
Let's handle this by considering the aspect
From: Ankit Nautiyal
To enable aspect-ratio support in DRM, blindly exposing the aspect
ratio information along with mode, can break things in existing
user-spaces which have no intention or support to use this aspect
ratio information.
To avoid this, a new drm client cap is required to enable a
From: Ville Syrjälä
Make mode matching less confusing by allowing the caller to specify
which parts of the modes should match via some flags.
Signed-off-by: Ville Syrjälä
Reviewed-by: Shashank Sharma
---
drivers/gpu/drm/drm_modes.c | 134 ++--
include/d
From: Ankit Nautiyal
If the user space does not support aspect-ratio, then getblob called
with the blob id of a user mode, should clear the aspect ratio
information in the blob data.
Currently for a given blob id, there is no way to determine if the
blob stores user mode or not. This can only b
Quoting Chris Wilson (2018-02-15 11:36:51)
> When we descend the tree to find our slot, if we step to the right, we
> are no longer the leftmost node.
Fortunately, the cached leftmost node is unused here and no drm_mm API
exposes it. So probably doesn't make sense to send it to stable@ as no
bug e
From: Ankit Nautiyal
We parse the EDID and add all the modes in the connector's modelist.
This adds CEA modes with aspect ratio information too, regadless of
whether user space requested this information or not.
This patch prunes the modes with aspect-ratio information, from a
connector's modeli
From: Ankit Nautiyal
If the user-space does not support aspect-ratio, and requests for a
modeset with mode having aspect ratio bits set, then the given
user-mode must be rejected. Secondly, while preparing a user-mode from
kernel mode, the aspect-ratio info must not be given, if aspect-ratio
is n
From: "Sharma, Shashank"
Current DRM layer functions don't parse aspect ratio information
while converting a user mode->kernel mode or vice versa. This
causes modeset to pick mode with wrong aspect ratio, eventually
causing failures in HDMI compliance test cases, due to wrong VIC.
This patch add
From: "Sharma, Shashank"
HDMI 2.0/CEA-861-F introduces two new aspect ratios:
- 64:27
- 256:135
This patch:
- Adds new DRM flags for to represent these new aspect ratios.
- Adds new cases to handle these aspect ratios while converting
from user->kernel mode or vise versa.
This patch was once
Am 15.02.2018 um 06:20 schrieb Gustavo A. R. Silva:
Currently, if amdgpu_vm_bo_update() fails, the returned error
is being ignored.
Fix this by properly checking _r_ after calling amdgpu_vm_bo_update.
Also, remove redundant code just before label _error_.
Addresses-Coverity-ID: 1464280 ("Unused
https://bugs.freedesktop.org/show_bug.cgi?id=100759
--- Comment #2 from Nicola Mori ---
Is there any chance that this bug report will be addressed?
--
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dri
https://bugs.freedesktop.org/show_bug.cgi?id=100759
--- Comment #3 from Alex Deucher ---
Sorry, slipped off my radar. I just sent the revert out for review.
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On Wed, Feb 14, 2018 at 09:08:54PM +0100, Jernej Skrabec wrote:
> This patch series implements support for A83T DW HDMI and PHY. Contrary to
> v1 series, this one is based on latest linux-next, since all needed patches
> were merged.
>
> While exactly this combination of HDMI controller and PHY is
On Wed, 14 Feb 2018, Anusha Srivatsa wrote:
> Forward Error Correction is supported on DP 1.4.
> This patch adds corresponding DPCD register definitions.
>
> v2: Add dri-devel mailing list to the CC list(Jani)
>
> v3: Change names, add missing masks (Manasi)
>
> v4: Add missing shifts to mask (Man
Hi Kieran,
Thank you for the patch.
On Thursday, 15 February 2018 10:38:17 EET Kieran Bingham wrote:
> From: Kieran Bingham
>
> Document the D3 (r8a77995) SoC in the R-Car DU bindings.
>
> Signed-off-by: Kieran Bingham
Reviewed-by: Laurent Pinchart
and applied to my tree.
> ---
> Documen
The recently committed gralloc handle definition has a few issues like
not actually compiling. This series fixes those issues. I now have
things working with these fixes and switching mesa, gbm_gralloc, and
drm_hwcomposer to use this header.
Rob
Rob Herring (4):
android: revert making handle
Const members are problematic for dynamically allocating struct
gralloc_handle_t, so just drop the const modifier.
Signed-off-by: Rob Herring
---
android/gralloc_handle.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/android/gralloc_handle.h b/android/gralloc_handle.h
i
Fix a typo where alloc_handle_t should be gralloc_handle_t. One still
remains in gralloc_handle_create, but a subsequent commit will fix that
along with other problems in gralloc_handle_create.
Signed-off-by: Rob Herring
---
android/gralloc_handle.h | 2 +-
1 file changed, 1 insertion(+), 1 dele
There's a number of problems with gralloc_handle_create starting with it
doesn't even compile. More importantly, it doesn't really create (i.e.
allocate) a handle. It allocates a native_handle_t, copies it to a
struct gralloc_handle_t on the stack and returns the struct (not a ptr).
So the caller s
Clients frequently need to convert a buffer_handle_t (aka
native_handle_t *) to a gralloc_handle_t ptr. This is a simple cast, but
add an inline function to do the conversion.
Signed-off-by: Rob Herring
---
android/gralloc_handle.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/android
Hi Kieran,
Thank you for the patch.
On Thursday, 15 February 2018 10:38:18 EET Kieran Bingham wrote:
> From: Kieran Bingham
>
> The D3 supports two LVDS channels. Extend the binding to support them.
>
> Signed-off-by: Kieran Bingham
> ---
> Documentation/devicetree/bindings/display/bridge/re
Hi Kieran,
On Thursday, 15 February 2018 10:45:33 EET Kieran Bingham wrote:
> On 15/02/18 08:38, Kieran Bingham wrote:
> > From: Kieran Bingham
> >
> > The D3 supports two LVDS channels. Extend the binding to support them.
> >
> > Signed-off-by: Kieran Bingham
> > ---
> >
> > Documentation/d
On Wed, Feb 14, 2018 at 11:09 PM, Tomasz Figa wrote:
> On Thu, Feb 15, 2018 at 1:12 AM, Rob Clark wrote:
>> On Wed, Feb 14, 2018 at 10:48 AM, Jordan Crouse
>> wrote:
>>> On Wed, Feb 14, 2018 at 12:31:29PM +0900, Tomasz Figa wrote:
- When submitting commands to the GPU, the GPU driver
This solves the problem that when we swapout a BO from a domain we
sometimes couldn't make room for it because holding the lock blocks all
other BOs with this reservation object.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 33 -
1 file change
This avoids problems when BOs are evicted but directly moved back into
the domain from other threads.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 37 +
1 file changed, 29 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm
amdgpu needs to verify if userspace sends us valid addresses and the simplest
way of doing this is to check if the buffer object is locked with the ticket
of the current submission.
Clean up the access to the ww_mutex internals by providing a function
for this and extend the check to the thread ow
On Tue, Feb 13, 2018 at 09:34:26PM +0800, Qiang Yu wrote:
> Hi guys,
>
> I'm working on the Lima project for ARM mali400/450 GPU. Now lima
> kernel driver uses CMA for all buffers, but mali400/450 GPU has MMU
> for each vertex/fragment shader processor, so I want to refine the lima
> kernel driver
https://bugs.freedesktop.org/show_bug.cgi?id=99353
--- Comment #30 from Bong Cosca ---
Created attachment 137374
--> https://bugs.freedesktop.org/attachment.cgi?id=137374&action=edit
Gnome desktop
The situation has improved somehow - but screen is still unusable. I tried to
patch si_state.c wi
https://bugs.freedesktop.org/show_bug.cgi?id=99353
Bong Cosca changed:
What|Removed |Added
Product|DRI |Mesa
Component|DRM/Radeon
https://bugs.freedesktop.org/show_bug.cgi?id=105113
Bug ID: 105113
Summary: [hawaii] Running Piglit
cl/program/execute/calls-struct.cl causes GPU VM error
and ring stalled GPU lockup
Product: Mesa
Version: git
On 15.02.2018 13:14, Krzysztof Kozlowski wrote:
> On Thu, Feb 15, 2018 at 11:39 AM, Andrzej Hajda wrote:
>> OF graph describes MHL data lanes between MHL and respective USB
>> connector.
>>
>> Signed-off-by: Andrzej Hajda
>> ---
>> .../boot/dts/exynos/exynos5433-tm2-common.dtsi | 31
>>
On 02/12/2018 12:45 PM, Gerd Hoffmann wrote: 4. QEMU pops
data+buffers from the virtqueue, looks up shmem FD for each
resource, sends data + FDs to the compositor with SCM_RIGHTS
>>>
>>> BTW: Is there a 1:1 relationship between buffers and shmem blocks? Or
>>> does the wayland protocol
Hey Rob,
Thanks for ironing out the kinks, and the new helper.
If you need reviews for any of the related changes, CC me.
This all looks good to me. Feel free to add my r-b.
Rob.
On 02/15/2018 02:59 PM, Rob Herring wrote:
The recently committed gralloc handle definition has a few issues like
https://bugs.freedesktop.org/show_bug.cgi?id=105113
--- Comment #1 from Vedran Miletić ---
Same story with
tests/cl/program/execute/calls-struct.cl
tests/cl/program/execute/calls-workitem-id.cl
tests/cl/program/execute/calls.cl
tests/cl/program/execute/tail-calls.cl
while
tests/cl/program/exec
https://bugs.freedesktop.org/show_bug.cgi?id=105113
Vedran Miletić changed:
What|Removed |Added
CC||arse...@gmail.com
Summary|[
This threw me for a loop when I read the docs. I imagine this is the
intended definition:
http://www.dictionary.com/browse/nerf
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/drm_ioctl.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_ioct
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