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- dev is redundant, we have state->atomic
- add stall parameter, which must be set when swapping needs to stall
for preceeding commits to stop looking at ->state pointers. Currently
all drivers need this to be, just prep work for a glorious future.
v2: Rebased on top of
commit e7cf0963f816fa4
Now that the core helpers support nonblocking atomic commits there's
no need to invent that wheel separately (instead of fixing the bug in
the atomic implementation of virtio, as it should have been done!).
v2: Rebased on top of
commit e7cf0963f816fa44190caaf51aeffaa614c340c6
Author: Gerd Hoffman
On Thu, Jun 09, 2016 at 12:05:28PM -0300, Gustavo Padovan wrote:
> From: Gustavo Padovan
>
> Signalling doesn't need to be enabled at sync_file creation, it is only
> required if userspace waiting the fence to signal through poll().
>
> Thus we delay fence_add_callback() until poll is called. It
It's a legacy helper function which won't do good with atomic helpers.
Cc: Tomi Valkeinen
Cc: Laurent Pinchart
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/omapdrm/omap_fbdev.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/omap_fbdev.c
b/drivers/gpu/drm/oma
Hi Javier,
2016ë
06ì 09ì¼ 09:17ì Javier Martinez Canillas ì´(ê°) ì´ ê¸:
> Hello Inki,
>
> Thanks for your feedback.
>
> On 06/08/2016 07:09 PM, Inki Dae wrote:
>> Hi Javier,
>>
>> 2016ë
06ì 02ì¼ 23:20ì Javier Martinez Canillas ì´(ê°) ì´ ê¸:
>>> Commit a6f75aa161c5 ("drm/exy
Hi Daniel,
Thank you for the patch.
On Friday 10 Jun 2016 00:14:39 Daniel Vetter wrote:
> It's a legacy helper function which won't do good with atomic helpers.
>
> Cc: Tomi Valkeinen
> Cc: Laurent Pinchart
> Signed-off-by: Daniel Vetter
Acked-by: Laurent Pinchart
> ---
> drivers/gpu/drm/
Hi Rob,
On 9 June 2016 at 22:19, Rob Herring wrote:
> Ioctls generally have DRM_AUTH and DRM_RENDER_ALLOW set to restrict them
> to authorized clients and render nodes. Without this, access from render
> nodes fails.
>
> Signed-off-by: Rob Herring
> ---
> drivers/gpu/drm/vc4/vc4_drv.c | 18
On 10 June 2016 at 00:42, Eric Anholt wrote:
> Rob Herring writes:
>
>> Ioctls generally have DRM_AUTH and DRM_RENDER_ALLOW set to restrict them
>> to authorized clients and render nodes. Without this, access from render
>> nodes fails.
>
> We've already got a fix to add RENDER_ALLOW submitted in
Hi Thierry,
2016ë
06ì 08ì¼ 00:26ì Thierry Reding ì´(ê°) ì´ ê¸:
> From: Thierry Reding
>
> Move the modeset locking from drivers into FB helpers.
>
> Signed-off-by: Thierry Reding
> ---
> drivers/gpu/drm/drm_fb_helper.c| 59
> +-
> drivers/gp
å¨ 2016å¹´06æ10æ¥ 01:46, Brian Norris åé:
> Rockchip DRM does not yet build properly for ARM64, but we might as well
> get the printf formatting correct now, to avoid the following warnings:
>
> drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c: In function
> 'rockchip_drm_fbdev_create':
> d
e assignee for the bug.
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Hi,
On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
wrote:
> From: Simon Xue
>
> Even though the iommu shares irq with its master, using the *dev of iommu
> instead of master's *dev for devm_{request,free}_irq makes things clear.
>
> Signed-off-by: Simon Xue
> Signed-off-by: Shunqian Zheng
>
Hi,
On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
wrote:
> From: Simon Xue
>
> The iommu_dma_alloc() in iommu/dma-iommu.c calls iommu_map_sg()
> that requires the callback iommu_ops .map_sg(). Adding the
> default_iommu_map_sg() to rockchip iommu accordingly.
>
> Signed-off-by: Simon Xue
> S
Hi Linus,
This weeks instalment of fixes:
amdgpu: Lots of memory leak and firmware leak fixes.
nouveau: Collection of display fixes, KASAN fixes.
vc4: vblank/pageflipping fixes
fsl-dcu: Regmap cache fix
omap: Unused variable warning fix.
Nothing too surprising so far.
Dave.
The following chan
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Hi,
On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
wrote:
> An virtual iommu without reg or interrupts for display.
> Adding this according to iommu driver changes.
>
> Signed-off-by: Shunqian Zheng
> ---
> arch/arm/boot/dts/rk3288.dtsi | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff -
fig(helper, 32);
> if (ret)
> goto fini;
>
Acked-by: Tomi Valkeinen
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.. I was about to ask if
I should pick this up?
Tomi
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Hi,
On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
wrote:
> An virtual master device like DRM need to attach to iommu
> domain to share the domain with VOP(the one with actual
> iommu slave). We currently check the group is NULL to indicate
> a virtual master, which is not true since we decide
On Jun 09 Zanoni, Paulo R wrote:
> Em Qui, 2016-06-09 Ã s 11:58 -0400, Lyude escreveu:
> > From https://bugs.freedesktop.org/show_bug.cgi?id=96461 :
> >
> > This was kind of a difficult bug to track down. If you're using a
> > Haswell system running GNOME and you have fbc completely enabled and
>
Hi,
On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
wrote:
> Rockchip DRM used the arm special API, arm_iommu_*(), to attach
> iommu for ARM32 SoCs. This patch convert to common iommu API
> so it would support ARM64 like RK3399.
>
> The general idea is domain_alloc(), attach_device() and
> arch_
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Hi Peter,
Only a few comments ;)
2016-06-09 18:25 GMT+02:00 Peter Senna Tschudin :
> Add a driver that create a drm_bridge and a drm_connector for the LVDS
> to DP++ display bridge of the GE B850v3.
>
> There are two physical bridges on the video signal pipeline: a
> STDP4028(LVDS to DP) and a ST
On Thu, Jun 09, 2016 at 08:56:29PM +0200, Daniel Vetter wrote:
> On Thu, Jun 09, 2016 at 05:18:18PM +0100, Liviu Dudau wrote:
> > Add support for the new family of Display Processors from ARM Ltd.
> > This commit adds basic support for Mali DP500, DP550 and DP650
> > parts, with only the display en
From: Michel Dänzer
Consolidate the _DRM_VBLANK_NEXTONMISS handling between drm_wait_vblank
and drm_queue_vblank_event.
This is a cleanup spotted while working on the next change.
(The way it was previously handled could also theoretically result in
drm_queue_vblank_event unnecessarily bumping
From: Michel Dänzer
With the previous change, it's safe to let page flips take effect
anytime during a vertical blank period.
This can avoid delaying a flip by a frame in some cases where we only
get to amdgpu_flip_work_func -> adev->mode_info.funcs->page_flip during
the target vertical blank p
The main purpose of this series is patch 5, which can avoid delaying
flips for a frame in some cases. It depends on patch 4 to prevent flips
from taking effect too early, which in turn depends on the core DRM
patch 2.
Patches 1 & 3 are cleanups I noticed while working on the other patches.
Mario,
From: Michel Dänzer
The per-device tracking hasn't been used since commit dafffda0
("drm/info: Remove unused code").
The per-file-descriptor tracking will be used by a following amdgpu
driver change.
Note that last_vblank_wait is only updated when the corresponding wait
completes, and is set t
From: Michel Dänzer
If reservation_object_get_fences_rcu failed, we'd previously go directly
to the cleanup label, so we'd leave the BO pinned.
While we're at it, remove two amdgpu_bo_unreserve calls in favour of two
new labels.
Signed-off-by: Michel Dänzer
---
drivers/gpu/drm/amd/amdgpu/am
From: Michel Dänzer
If userspace wants a page flip to take effect during vblank sequence n,
it has to wait for vblank seqno n-1 before calling the
DRM_IOCTL_MODE_PAGE_FLIP ioctl.
This change makes sure that we do not program the flip to the hardware
before the end of vblank seqno n-1 in this ca
Am 10.06.2016 um 10:57 schrieb Michel Dänzer:
> The main purpose of this series is patch 5, which can avoid delaying
> flips for a frame in some cases. It depends on patch 4 to prevent flips
> from taking effect too early, which in turn depends on the core DRM
> patch 2.
>
> Patches 1 & 3 are clea
Hi,
On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
wrote:
> From: Simon Xue
>
It is usual a good practice to include at least a single sentence
here, even if the patch is trivial. In this case it could say
"This patch makes it possible to compile the rockchip-iommu driver on
ARM64 platform t
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.width_mux = 2,
> > + .flags = CLK_SET_RATE_PARENT,
> > };
> >
> > static void __init sun4i_a10_tcon_ch0_setup(struct device_node *node)
> > --
> > 2.8.2
> >
>
> Acked-by: Chen-Yu Tsai
Applied,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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Ping!
- Tobias
Tobias Jakobi wrote:
> The current bitwise AND should result in the same assembler
> but this is what the code is actually supposed to do.
>
> Signed-off-by: Tobias Jakobi
> ---
> drivers/gpu/drm/exynos/exynos_drm_plane.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Split out subsystem specific changes for easier reviews. This will be
squashed with main commit.
Signed-off-by: Krzysztof Kozlowski
---
drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 2 +-
drivers/gpu/drm/exynos/exynos_drm_g2d.c | 12 +---
drivers/gpu/drm/exynos/exynos_drm_gem.c | 20 +
Ping!
- Tobias
Tobias Jakobi wrote:
> Neither of these files issue any fbdev related calls.
>
> Signed-off-by: Tobias Jakobi
> ---
> drivers/gpu/drm/exynos/exynos7_drm_decon.c | 1 -
> drivers/gpu/drm/exynos/exynos_drm_core.c | 1 -
> drivers/gpu/drm/exynos/exynos_drm_fimd.c | 1 -
> 3 fil
Split out subsystem specific changes for easier reviews. This will be
squashed with main commit.
Signed-off-by: Krzysztof Kozlowski
---
drivers/gpu/drm/mediatek/mtk_drm_gem.c | 13 ++---
drivers/gpu/drm/mediatek/mtk_drm_gem.h | 2 +-
2 files changed, 7 insertions(+), 8 deletions(-)
dif
Split out subsystem specific changes for easier reviews. This will be
squashed with main commit.
Signed-off-by: Krzysztof Kozlowski
---
drivers/gpu/drm/msm/msm_drv.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/
Split out subsystem specific changes for easier reviews. This will be
squashed with main commit.
Signed-off-by: Krzysztof Kozlowski
---
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nv
Split out subsystem specific changes for easier reviews. This will be
squashed with main commit.
Signed-off-by: Krzysztof Kozlowski
---
drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 17 +++--
drivers/gpu/drm/rockchip/rockchip_drm_gem.h | 2 +-
2 files changed, 8 insertions(+), 11 de
Ping!
- Tobias
Tobias Jakobi wrote:
> This makes the defines consistent with the rest.
>
> Signed-off-by: Tobias Jakobi
> ---
> drivers/gpu/drm/exynos/exynos_drm_g2d.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
On Thu, Jun 09, 2016 at 09:57:24PM +0100, Chris Wilson wrote:
> On Fri, Jun 03, 2016 at 05:59:11PM +0300, Ville Syrjälä wrote:
> > On Fri, Jun 03, 2016 at 03:36:49PM +0100, Chris Wilson wrote:
> > > When trying to split up the initialisation phase and the registration
> > > phase, one immediate p
Currently, none of the upstream Qualcomm DT files have the display device
nodes populated, even when the DT binding documents are upstream.
This revision drops the patches that add components via parsing ports.
The component addition changes will be handled in a separate patchset
later. These cont
The driver expects DT to provide the parent to MDP core clock. The only
operation done to the parent clock is to set a rate. This can be
achieved by setting the rate on the core clock itsef. Don't try to
get the parent clock anymore.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/
Fix some issues with MDP4 clocks:
- mdp4_dtv_encoder tries to get "src_clk", which is a RCG(TV_SRC) in
MSM8960 and APQ8064. This isn't something the driver should access or
configure. Instead of this, configure the "mdp_clk" (MDP_TV_CLK), a
branch clock in MMCC that has the TV_SRC as its par
MDP5:
- Don't ask for source clock
MDP4:
- Give a better name for MDP_TV_CLK
- Remove TV_SRC
- Add MDP_AXI_CLK
Signed-off-by: Archit Taneja
---
Documentation/devicetree/bindings/display/msm/mdp.txt | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/Documentation/devi
The DSI host links to the DSI PHY device using a custom binding. Switch to
the generic PHY bindings. The DSI PHY driver itself doesn't use the common
PHY framework for now.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
The "qcom,data-lane-map" binding mentioned in the document is changed to
the more generic "data-lanes" property specified in:
Documentation/devicetree/bindings/media/video-interfaces.txt
The previous binding expressed physical to logical data lane mappings,
the standard "data-lanes" binding uses
The PLL in the DSI PHY block generates 2 clock outputs (Byte and Pixel
clocks) that are fed into the Multimedia Clock Controller (MMCC). The MMCC
uses these as source clocks for some of its RCGs to generate clocks that
finally feed to the DSI host controller.
Use the assigned clocks DT bindings to
Some cleanups:
- Use simpler names for DT nodes in the example
- Use references instead of dumping Document links everywhere
Signed-off-by: Archit Taneja
---
.../devicetree/bindings/display/msm/dsi.txt| 45 +++---
1 file changed, 22 insertions(+), 23 deletions(-)
diff -
The DSI interface is going to have two ports defined in its device node.
The first port is always going to be the link between the MDP output
and the input to DSI, the second port is going to be the link between
the DSI output and the connected panel/bridge:
- - --
A more standard DT binding describing data lanes already exists here:
Documentation/devicetree/bindings/media/video-interfaces.txt
Use this binding instead of "qcom,data-lane-map". One difference
in the standard binding w.r.t to the existing binding is that it
provides a logical to physical mappin
The DSI node now has two ports that describe the connection between the
MDP interface output and the DSI input, and the connection between the DSI
output and the connected panel/bridge. Update the properties and the
example.
Also, use generic PHY bindings instead of the custom one.
Signed-off-by:
On Fri, Jun 10, 2016 at 01:26:24PM +0300, Ville Syrjälä wrote:
> On Thu, Jun 09, 2016 at 09:57:24PM +0100, Chris Wilson wrote:
> > On Fri, Jun 03, 2016 at 05:59:11PM +0300, Ville Syrjälä wrote:
> > > On Fri, Jun 03, 2016 at 03:36:49PM +0100, Chris Wilson wrote:
> > > > When trying to split up t
On Wed, May 25, 2016 at 02:30:07PM +0200, Tobias Jakobi wrote:
> The current bitwise AND should result in the same assembler
> but this is what the code is actually supposed to do.
>
> Signed-off-by: Tobias Jakobi
Reviewed-by: Eric Engestrom
> ---
> drivers/gpu/drm/exynos/exynos_drm_plane.c |
Hi,
On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
wrote:
> Use DMA API instead of architecture internal functions like
> __cpuc_flush_dcache_area() etc.
>
> To support the virtual device like DRM the virtual slave iommu
> added in the previous patch, attaching to which the DRM can use
> it own
Hi Enric,
On Friday, June 10, 2016 09:39 CEST, Enric Balletbo Serra wrote:
> Hi Peter,
>
> Only a few comments ;)
Thanks a lot for the review!
>
> 2016-06-09 18:25 GMT+02:00 Peter Senna Tschudin collabora.com>:
> > Add a driver that create a drm_bridge and a drm_connector for the LVDS
> >
This patch adds support to generic audio codec via
ASoC hdmi-codec infrastucture which is merged recently.
Signed-off-by: Srinivas Kandagatla
---
Changes since v1:
-Fixed typo for 44.1Kz case spotted by Jyri Sarha
drivers/gpu/drm/msm/Kconfig | 1 +
drivers/gpu/drm/msm/hdmi/hdmi.c
After switching DMA attributes to unsigned long it is easier to just
compare the bits.
Signed-off-by: Krzysztof Kozlowski
[for avr32]
Acked-by: Hans-Christian Noren Egtvedt
---
Documentation/DMA-API.txt | 4 +--
arch/arc/mm/dma.c | 4 +--
arch
On Friday 10 June 2016 03:44 PM, Krzysztof Kozlowski wrote:
> After switching DMA attributes to unsigned long it is easier to just
> compare the bits.
>
> Signed-off-by: Krzysztof Kozlowski
> [for avr32]
> Acked-by: Hans-Christian Noren Egtvedt
Acked-by: Vineet Gupta#for arch/arc
Hi,
This is fourth approach for replacing struct dma_attrs with unsigned
long.
The main patch (1/44) doing the change is split into many subpatches
for easier review (2-42). They should be squashed together when
applying.
*Important:* Patchset is tested on my ARM platforms and *only* build
te
On 10/06/16 11:12, Krzysztof Kozlowski wrote:
> After switching DMA attributes to unsigned long it is easier to just
> compare the bits.
>
> Signed-off-by: Krzysztof Kozlowski
> [for avr32]
> Acked-by: Hans-Christian Noren Egtvedt
> ---
[...]
> arch/arm64/mm/dma-mapping.c| 1
They are deprecated and by moving their implementations to bind/unbind
we can call drm_connector_register_all instead of open-coding it.
Signed-off-by: Tomeu Vizoso
Cc: Daniel Vetter
---
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 87 ++---
1 file changed, 30 insertion
for the bug.
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I sometimes see:
[drm:drm_framebuffer_remove [drm]] *ERROR* failed to reset crtc ed2a6c00
when fb was deleted: -22
which comes from drm_framebuffer_remove() when it's disabling the crtc
with zeroed drm_mode_set.
The problem in omap_plane_atomic_check() is that it will use those
zeroed fields to
Clean up omap_plane_atomic_check() with:
- Check state->fb first. If no fb, return 0.
- use drm_atomic_get_existing_crtc_state() instead of
drm_atomic_get_crtc_state()
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/omap_plane.c | 21 -
1 file changed, 12 inserti
omap_plane_atomic_update() does WARN_ON() if dispc rejects the given
plane config. Change that to dev_err() to lessen the possible spam.
To fix this correctly, the plane setup needs much more work by creating
a check function for dispc setup, so that we could reliably check the
config in atomic_ch
M_FORMAT_RGB565:
> break;
> - case 32:
> + case DRM_FORMAT_XRGB:
> + case DRM_FORMAT_ARGB:
I'm not sure what's the common way, but tilcdc doesn't support alpha.
ARGB works, of course, by ignori
;
>
Reviewed-by: Tomi Valkeinen
Tomi
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On Fri, Jun 10, 2016 at 02:51:45PM +0300, Tomi Valkeinen wrote:
>
>
> On 09/06/16 02:32, Laurent Pinchart wrote:
> > The driver needs the number of bytes per pixel, not the bpp and depth
> > info meant for fbdev compatibility. Use the right API.
> >
> > In the tilcdc_crtc_mode_set() function com
Hi Tomi,
On Friday 10 Jun 2016 14:51:45 Tomi Valkeinen wrote:
> On 09/06/16 02:32, Laurent Pinchart wrote:
> > The driver needs the number of bytes per pixel, not the bpp and depth
> > info meant for fbdev compatibility. Use the right API.
> >
> > In the tilcdc_crtc_mode_set() function compute th
The driver needs the number of bytes per pixel, not the bpp and depth
info meant for fbdev compatibility. Use the right API.
In the tilcdc_crtc_mode_set() function compute the hardware register
value directly from the pixel format instead of computing the number of
bits per pixels first.
Signed-o
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eep ARGB allowed for now. If we want to disallow
it, it's better to be done in a separate patch.
Reviewed-by: Tomi Valkeinen
Tomi
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On Fri, Jun 10, 2016 at 03:08:18PM +0300, Tomi Valkeinen wrote:
> On 10/06/16 15:05, Ville Syrjälä wrote:
>
> >> I'm not sure what's the common way, but tilcdc doesn't support alpha.
> >> ARGB works, of course, by ignoring A, but... If an userspace app creates
> >> ARGB buffer, does the app expe
On Thu, Jun 09, 2016 at 12:05:29PM -0300, Gustavo Padovan wrote:
> From: Gustavo Padovan
>
> Creates a function that given an sync file descriptor returns a
> fence_collection containing all fences in the sync_file.
>
> If there is only one fence in the sync_file this fence itself is returned,
>
ending to black
or to anything else.
Tomi
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On Fri, Jun 10, 2016 at 03:26:30PM +0300, Tomi Valkeinen wrote:
> On 10/06/16 15:23, Ville Syrjälä wrote:
> > On Fri, Jun 10, 2016 at 03:08:18PM +0300, Tomi Valkeinen wrote:
> >> On 10/06/16 15:05, Ville Syrjälä wrote:
> >>
> I'm not sure what's the common way, but tilcdc doesn't support a
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it.
Ok. We need to wait some time to see which prediction is correct.
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will be fixed as the driver can define the formats.
Tomi
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L:
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ports "XR24 AR24".
BR,
Jyri
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On Fri, Jun 10, 2016 at 04:16:06PM +0300, Jyri Sarha wrote:
> On 06/10/16 16:08, Tomi Valkeinen wrote:
> > On 10/06/16 15:48, Tomi Valkeinen wrote:
> >> On 10/06/16 15:29, Ville Syrjälä wrote:
> >>
> The HW does not support any kind of blending to black
> or to anything else.
> >>>
> >>
x27;ve reviewed more carefully.
Thanks for bringing that to my attention, I'll go fix those up.
Thierry
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t does, I just tested it with the trace I've shared with you.
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On Wed, Jun 08, 2016 at 07:52:45PM +0800, Yakir Yang wrote:
> The Sharp LQ123P1JX31 is an 12.3" 2400x1600 TFT-LCD panel
> connected using eDP interfaces.
>
> Signed-off-by: Yakir Yang
> ---
> Changes in v2:
> - Add dt-bindings of Sharp LQ123P1JX31 panel in v2
>
> .../devicetree/bindings/display
Hi,
[auto build test WARNING on drm/drm-next]
[also build test WARNING on v4.7-rc2 next-20160609]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Mika-Kahola/drm-i915-DP-branch-devices/20160610
Ping.
On 13.05.2016 08:14, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> Previously, (*device)->businfo.pci would end up misaligned, which results
> in undefined behavior.
>
> Signed-off-by: Nicolai Hähnle
> ---
> xf86drm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> dif
On Fri, Jun 10, 2016 at 11:54:50AM +0100, Eric Engestrom wrote:
> On Wed, May 25, 2016 at 02:30:07PM +0200, Tobias Jakobi wrote:
> > The current bitwise AND should result in the same assembler
> > but this is what the code is actually supposed to do.
> >
> > Signed-off-by: Tobias Jakobi
>
> Revi
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