On 3 May 2016 at 18:48, Philipp Zabel wrote:
> Hi Dave,
>
> here is the imx-ipuv3-crtc autoloading fix so you don't have to revert commit
> 304e6be652e2 ("gpu: ipu-v3: Assign of_node of child platform devices to
> corresponding ports").
I didn't pull this, but I cherry-picked the patch out and ad
Hi Stefan
Actually, the pixel clock or data enable polarity are also needed by
drm/rockchip,
but I have a question:
why not add these polarity into drm_display_mode->flags.
drm_display_mode->flags has hsync and vsync polarity,
I think it's cool that add pixel clock or data enable polarity on
Replacing magic numbers in calculation of sleep divider id for fiji
and polaris.
Signed-off-by: Nils Wallménius
---
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 3 ++-
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 4 ++--
2 files changed, 4 insertions(+), 3 deletions(-)
di
Signed-off-by: Nils Wallménius
---
drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 3 +--
drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 3 +--
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 3 +--
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 3 +--
4 files changed, 4 insert
a / (1 << b) is equivalent to a >> b for unsigned values
Signed-off-by: Nils Wallménius
---
drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 2 +-
drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 7 +--
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 2 +-
drivers/gpu/
Signed-off-by: Nils Wallménius
---
drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 6 ++
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 6 +++---
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 6 +++---
3 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu
Add support for TPK U.S.A. LLC Fusion 7", 10.1"
panels to the DRM simple panel driver.
Signed-off-by: Bhuvanchandra DV
---
This patch is based on top of Stefan's clock polarity patches[1]
[1] https://lkml.org/lkml/2016/5/5/20
.../bindings/display/panel/tpk,f07a-0102.txt | 8
.../
On Sun, May 01, 2016 at 09:15:03AM +0100, Chris Wilson wrote:
> This effectively reverts
>
> commit afcd950cafea6e27b739fe7772cbbeed37d05b8b
> Author: Chris Wilson
> Date: Wed Jun 10 15:58:01 2015 +0100
>
> drm: Avoid the double clflush on the last cache line in
> drm_clflush_virt_range()
On 04/05/16 13:38, Maarten Lankhorst wrote:
> It turns out that preserving framebuffers after the rmfb call breaks
> vmwgfx userspace. This was originally introduced because it was thought
> nobody relied on the behavior, but unfortunately it seems there are
> exceptions.
>
> drm_framebuffer_remov
Hi,
On 04/05/16 13:10, Maarten Lankhorst wrote:
> Add some tests to BAT to ensure rmfb/lastclose handling doesn't break again.
>
> The test will set framebuffers on each crtc, and then try rmfb or close.
> Afterwards it rechecks to make sure the framebuffers are removed.
>
> Signed-off-by: Maarte
Hi Tobias, Daniel,
Little late, but maybe helpful anyway...
On 05/02/2016 11:00 PM, Daniel Vetter wrote:
> On Mon, May 2, 2016 at 10:30 PM, Tobias Jakobi
> wrote:
>>> drm_mode_set_crtcinfo() is meant to be used to fill in all the derived
>>> values. We might or might not want to have a default c
On DCE6.1 PPLL2 is exclusively available to UNIPHYA, so it should not
be taken into consideration when looking for an already enabled PLL
to be shared with other outputs.
This fixes the broken VGA port (TRAVIS DP->VGA bridge) on my Richland
based laptop, where the internal display is connected to
This effectively reverts
commit afcd950cafea6e27b739fe7772cbbeed37d05b8b
Author: Chris Wilson
Date: Wed Jun 10 15:58:01 2015 +0100
drm: Avoid the double clflush on the last cache line in
drm_clflush_virt_range()
as we have observed issues with serialisation of the clflush operations
on B
On 05/05/2016 11:12 AM, Andrzej Hajda wrote:
>
> Regarding the initial question, mode->vrefresh is set in
> drm_helper_probe_single_connector_modes. I guess division by zero could
> be caused by lack of clock in timings provided by dts timing node.
> As I remember in the past dts timings were pass
On 20 April 2016 at 16:23, Tomeu Vizoso wrote:
> On 11 April 2016 at 03:15, Mark yao wrote:
>> On 2016å¹´04æ08æ¥ 18:54, Tomeu Vizoso wrote:
>>>
>>> On 8 April 2016 at 03:07, Mark yao wrote:
On 2016å¹´04æ06æ¥ 18:14, Tomeu Vizoso wrote:
When a plane is being disabled but
If we fail to setup the debugfs we lose debugging convenience, but we
should still endeavour to enable modesetting so that we can control the
outputs and enable use of the system to debug the issue. In all
likelihood if we can not create our debugfs files then there is a larger
underlying issue tha
On 04/05/16 12:39, Laxman Dewangan wrote:
> The function tegra_pmc_readl() returns the u32 type data and hence
> change the data type of variable where this data is stored to u32
> type.
>
> Signed-off-by: Laxman Dewangan
>
> ---
> Changes from V1:
> -This is new in series as per discussion on
On Wed, May 04, 2016 at 10:08:59PM -0700, Stefan Agner wrote:
> Introduce bus_flags to specify display bus properties like signal
> polarities. This is useful for parallel display buses, e.g. to
> specify the pixel clock or data enable polarity.
>
> Suggested-by: Thierry Reding
> Acked-by: Philip
On 04/05/16 12:39, Laxman Dewangan wrote:
> The IO pins of Tegra SoCs are grouped for common control of IO
> interface like setting voltage signal levels and power state of
> the interface. The group is generally referred as IO pads. The
> power state and voltage control of IO pins can be done at
On 04/05/16 12:39, Laxman Dewangan wrote:
> Power Management Controller(PMC) of Tegra does the multiple chip
> power related functionality for internal and IO interfacing.
> Some of the functionalities are power gating of IP blocks, IO pads
> voltage and power state configuration, system power sta
https://bugzilla.kernel.org/show_bug.cgi?id=115051
Filipp Andjelo changed:
What|Removed |Added
CC||filipp.andjelo at gmail.com
--- Comment
https://bugzilla.kernel.org/show_bug.cgi?id=115051
--- Comment #4 from Filipp Andjelo ---
May be someone should change the bug subject, because this problem doesn't seem
to be only HD5870 related
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https://bugzilla.kernel.org/show_bug.cgi?id=115051
--- Comment #5 from Filipp Andjelo ---
I forgot the most important part :)
I'm using ArchLinux with latest stock kernel:
Linux hoth 4.5.1-1-ARCH #1 SMP PREEMPT Thu Apr 14 19:19:32 CEST 2016 x86_64
GNU/Linux
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On Thursday 05 May 2016 03:19 PM, Jon Hunter wrote:
> On 04/05/16 12:39, Laxman Dewangan wrote:
>> The function tegra_pmc_readl() returns the u32 type data and hence
>> change the data type of variable where this data is stored to u32
>> type.
>>
>> Signed-off-by: Laxman Dewangan
>>
>> ---
>> Cha
On Thursday 05 May 2016 03:43 PM, Jon Hunter wrote:
> On 04/05/16 12:39, Laxman Dewangan wrote:
> + return -EINVAL;
> +
> + for (i = 0; i < soc->num_io_pads; ++i) {
> + if (soc->io_pads_control[i].pad_id == pad_id)
> + return soc->io_pads_control[i]
On Thu, May 05, 2016 at 10:11:27AM +0100, Tvrtko Ursulin wrote:
>
> Hi,
>
> On 04/05/16 13:10, Maarten Lankhorst wrote:
> >Add some tests to BAT to ensure rmfb/lastclose handling doesn't break again.
> >
> >The test will set framebuffers on each crtc, and then try rmfb or close.
> >Afterwards it
On Thu, May 05, 2016 at 10:07:57AM +0100, Tvrtko Ursulin wrote:
>
> On 04/05/16 13:38, Maarten Lankhorst wrote:
> >It turns out that preserving framebuffers after the rmfb call breaks
> >vmwgfx userspace. This was originally introduced because it was thought
> >nobody relied on the behavior, but u
On Thu, May 05, 2016 at 10:47:10AM +0100, Chris Wilson wrote:
> If we fail to setup the debugfs we lose debugging convenience, but we
> should still endeavour to enable modesetting so that we can control the
> outputs and enable use of the system to debug the issue. In all
> likelihood if we can no
On 2 May 2016 at 22:49, Daniel Vetter wrote:
> Patches get misrouted and lost otherwise. And use * to future-proof
> for sphinx (or whatever the documentation nirvana toolchain will be).
>
> Cc: Jonathan Corbet
> Cc: David Airlie
> Signed-off-by: Daniel Vetter
> ---
> MAINTAINERS | 1 +
> 1 fi
On Thu, May 05, 2016 at 12:55:19PM +0100, Emil Velikov wrote:
> On 2 May 2016 at 22:49, Daniel Vetter wrote:
> > Patches get misrouted and lost otherwise. And use * to future-proof
> > for sphinx (or whatever the documentation nirvana toolchain will be).
> >
> > Cc: Jonathan Corbet
> > Cc: David
On Thu, May 05, 2016 at 01:53:57PM +0200, Daniel Vetter wrote:
> On Thu, May 05, 2016 at 10:47:10AM +0100, Chris Wilson wrote:
> > If we fail to setup the debugfs we lose debugging convenience, but we
> > should still endeavour to enable modesetting so that we can control the
> > outputs and enable
On 05/05/16 10:52, Laxman Dewangan wrote:
>
> On Thursday 05 May 2016 03:19 PM, Jon Hunter wrote:
>> On 04/05/16 12:39, Laxman Dewangan wrote:
>>> The function tegra_pmc_readl() returns the u32 type data and hence
>>> change the data type of variable where this data is stored to u32
>>> type.
>>>
On 05/05/16 13:35, Laxman Dewangan wrote:
>
> On Thursday 05 May 2016 06:13 PM, Jon Hunter wrote:
>> On 05/05/16 10:52, Laxman Dewangan wrote:
>>> On Thursday 05 May 2016 03:19 PM, Jon Hunter wrote:
On 04/05/16 12:39, Laxman Dewangan wrote:
> The function tegra_pmc_readl() returns the u3
On 05/05/16 11:32, Laxman Dewangan wrote:
>
> On Thursday 05 May 2016 03:43 PM, Jon Hunter wrote:
>> On 04/05/16 12:39, Laxman Dewangan wrote:
>
>> +return -EINVAL;
>> +
>> +for (i = 0; i < soc->num_io_pads; ++i) {
>> +if (soc->io_pads_control[i].pad_id == pad_id)
>> +
This patchset adds various helpers that was originally part of the
tinydrm patchset.
Essentially it adds 3 functions:
- drm_fb_cma_create_with_funcs()
CMA backed framebuffer supporting a dirty() callback.
- drm_simple_display_pipe_init()
Plane, crtc and encoder are collapsed into one entity.
-
Add drm_fb_cma_create_with_funcs() for drivers that need to set the
dirty() callback.
Cc: laurent.pinchart at ideasonboard.com
Signed-off-by: Noralf Trønnes
---
drivers/gpu/drm/drm_fb_cma_helper.c | 29 +++--
include/drm/drm_fb_cma_helper.h | 3 +++
2 files changed,
Make drm_encoder_helper_funcs and it's functions optional to avoid
having dummy functions.
Signed-off-by: Noralf Trønnes
---
drivers/gpu/drm/drm_atomic_helper.c | 11 --
drivers/gpu/drm/drm_crtc_helper.c | 41 +
2 files changed, 42 insertions(+), 10
Provides helper functions for drivers that have a simple display
pipeline. Plane, crtc and encoder are collapsed into one entity.
Signed-off-by: Noralf Trønnes
---
drivers/gpu/drm/Kconfig | 7 ++
drivers/gpu/drm/Makefile| 1 +
drivers/gpu/drm/drm_simple_kms_h
Add function to create a simple connector for a panel.
Signed-off-by: Noralf Trønnes
---
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/drm_panel_helper.c | 117 +
drivers/gpu/drm/panel/Kconfig | 7 +++
include/drm/drm_panel_helper.h |
On Thu, 5 May 2016 12:55:19 +0100
Emil Velikov wrote:
> Any ideas when the sphinx and/or other work might be
> kicking in, or it's still in very early stage ?
We've started talking about it again; I sure hope we'll have something
ready to pull for 4.8.
jon
On 05/05/16 14:09, Laxman Dewangan wrote:
>
> On Thursday 05 May 2016 06:38 PM, Jon Hunter wrote:
>> On 05/05/16 11:32, Laxman Dewangan wrote:
>>> On Thursday 05 May 2016 03:43 PM, Jon Hunter wrote:
On 04/05/16 12:39, Laxman Dewangan wrote:
+return -EINVAL;
+
+for
On 05/05/16 14:35, Laxman Dewangan wrote:
>
> On Thursday 05 May 2016 07:03 PM, Jon Hunter wrote:
>> On 05/05/16 14:09, Laxman Dewangan wrote:
>>> On Thursday 05 May 2016 06:38 PM, Jon Hunter wrote:
On 05/05/16 11:32, Laxman Dewangan wrote:
> On Thursday 05 May 2016 03:43 PM, Jon Hunter
On Thursday 05 May 2016 06:13 PM, Jon Hunter wrote:
> On 05/05/16 10:52, Laxman Dewangan wrote:
>> On Thursday 05 May 2016 03:19 PM, Jon Hunter wrote:
>>> On 04/05/16 12:39, Laxman Dewangan wrote:
The function tegra_pmc_readl() returns the u32 type data and hence
change the data type of
On Thursday 05 May 2016 06:38 PM, Jon Hunter wrote:
> On 05/05/16 11:32, Laxman Dewangan wrote:
>> On Thursday 05 May 2016 03:43 PM, Jon Hunter wrote:
>>> On 04/05/16 12:39, Laxman Dewangan wrote:
>>> +return -EINVAL;
>>> +
>>> +for (i = 0; i < soc->num_io_pads; ++i) {
>>> +if
On Thursday 05 May 2016 07:03 PM, Jon Hunter wrote:
> On 05/05/16 14:09, Laxman Dewangan wrote:
>> On Thursday 05 May 2016 06:38 PM, Jon Hunter wrote:
>>> On 05/05/16 11:32, Laxman Dewangan wrote:
On Thursday 05 May 2016 03:43 PM, Jon Hunter wrote:
> On 04/05/16 12:39, Laxman Dewangan wro
ist
> dri-devel at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
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From: Arindam Nath
There is an issue observed when we hotplug a second DP
4K monitor to the system. Sometimes, the link training
fails for the second monitor after HPD interrupt
generation.
The issue happens when some queued or deferred transactions
are already present on the AUX channel when we
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On Thu, May 5, 2016 at 3:07 AM, Nils Wallménius
wrote:
> Replacing magic numbers in calculation of sleep divider id for fiji
> and polaris.
>
> Signed-off-by: Nils Wallménius
Applied. Thanks,
Alex
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 3 ++-
> drivers/gpu/drm/amd/
I would Cc it to stable just in case tbh. I picked up on this one since KASAN
was picking up on some of the memcpy() calls around here going out of bounds. I
can include some of the backtraces from that if needed.
On Wed, 2016-05-04 at 19:11 +0200, Daniel Vetter wrote:
> On Wed, May 04, 2016 at 11
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Until an encoder component is available to trigger the HDLCD's component
master bind callback, the drm_device we keep in drvdata isn't allocated.
Since it is quite possible to, say, hibernate the system without having
loaded the encoder driver, the PM callbacks need to check for a valid
drm_device
The current PM ops simply unconditionally enable/disable the HDLCD,
which proves problematic when there is no display plugged in - since
without a crtc the hardware itself is still in an uninitialised state,
coming out of suspend results in it being enabled without a valid
framebuffer address, whic
Hi Mark,
On 2016-05-04 23:18, Mark yao wrote:
> Hi Stefan
>
> Actually, the pixel clock or data enable polarity are also needed by
> drm/rockchip,
>
> but I have a question:
>
> why not add these polarity into drm_display_mode->flags.
> drm_display_mode->flags has hsync and vsync polarity,
> I
Hello Andrzej,
Andrzej Hajda wrote:
> On 05/05/2016 11:12 AM, Andrzej Hajda wrote:
>>
>> Regarding the initial question, mode->vrefresh is set in
>> drm_helper_probe_single_connector_modes. I guess division by zero could
>> be caused by lack of clock in timings provided by dts timing node.
>> As
Don't use the vrefresh field of the DRM mode since this
one is supposed to only be used for debug purpose.
Instead use the clock field which should also provide
much more precise information.
Also sanitize the case in which the clock value
should be zero. We then just default to the maximum
clock
On Thu, May 05, 2016 at 03:24:32PM +0200, Noralf Trønnes wrote:
> Make drm_encoder_helper_funcs and it's functions optional to avoid
> having dummy functions.
>
> Signed-off-by: Noralf Trønnes
Please also update the kerneldoc and mention there that the enable/disable
hooks are optional. You ca
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On 2016-05-05 03:06, Daniel Vetter wrote:
> On Wed, May 04, 2016 at 10:08:59PM -0700, Stefan Agner wrote:
>> Introduce bus_flags to specify display bus properties like signal
>> polarities. This is useful for parallel display buses, e.g. to
>> specify the pixel clock or data enable polarity.
>>
>>
On Thu, May 05, 2016 at 03:24:31PM +0200, Noralf Trønnes wrote:
> Add drm_fb_cma_create_with_funcs() for drivers that need to set the
> dirty() callback.
>
> Cc: laurent.pinchart at ideasonboard.com
> Signed-off-by: Noralf Trønnes
> ---
> drivers/gpu/drm/drm_fb_cma_helper.c | 29 ++
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On Thu, May 05, 2016 at 03:24:33PM +0200, Noralf Trønnes wrote:
> Provides helper functions for drivers that have a simple display
> pipeline. Plane, crtc and encoder are collapsed into one entity.
>
> Signed-off-by: Noralf Trønnes
When resubmitting a patch please always have a per-patch chang
On Thu, May 05, 2016 at 05:13:38PM +0100, Robin Murphy wrote:
> The current PM ops simply unconditionally enable/disable the HDLCD,
> which proves problematic when there is no display plugged in - since
> without a crtc the hardware itself is still in an uninitialised state,
> coming out of suspend
now yet what that is or how to do that, even after reading the
man pages about checkout, tag, revert and commit; but I'm convinced I'll get
there in the end ;-)
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On Thu, May 05, 2016 at 03:24:34PM +0200, Noralf Trønnes wrote:
> Add function to create a simple connector for a panel.
>
> Signed-off-by: Noralf Trønnes
Like in the previous patch please also add a new section for the panel
helpers to gpu.tmpl. I don't think this needs an overview section, i
On Thu, May 05, 2016 at 05:13:38PM +0100, Robin Murphy wrote:
> The current PM ops simply unconditionally enable/disable the HDLCD,
> which proves problematic when there is no display plugged in - since
> without a crtc the hardware itself is still in an uninitialised state,
> coming out of suspend
patches mentioned by Ilia don't help, an apitrace showing the problem
> would be useful.
Ok, I'll do that.
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On Thu, May 05, 2016 at 07:06:02PM +0200, Daniel Vetter wrote:
> On Thu, May 05, 2016 at 05:13:38PM +0100, Robin Murphy wrote:
> > The current PM ops simply unconditionally enable/disable the HDLCD,
> > which proves problematic when there is no display plugged in - since
> > without a crtc the hard
Am Donnerstag, den 05.05.2016, 10:22 -0400 schrieb Alex Deucher:
> On Thu, May 5, 2016 at 5:02 AM, Lucas Stach wrote:
> >
> > On DCE6.1 PPLL2 is exclusively available to UNIPHYA, so it should
> > not
> > be taken into consideration when looking for an already enabled PLL
> > to be shared with oth
tps://lists.freedesktop.org/archives/dri-devel/attachments/20160505/a9f07357/attachment.html>
Hello,
here's another issue I experience when enabling FIMD on the ODROID-X2.
I can trigger a IOMMU pagefault by starting X once, quitting, and
restarting X again.
I've put the full logs from both startx runs below.
I think the interesting part is the following:
> [ 326.603473] [drm:fimd_updat
?
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all the kernel.
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You could help by providing the output when running with
R600_DEBUG=ps,vs,tcs,tes,gs.
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On Apr 30 Stefan Richter wrote:
> On Apr 29 Stefan Richter wrote:
> > On Apr 26 Stefan Richter wrote:
> > > v4.6-rc solidly hangs after a short while after boot, login to X11, and
> > > doing nothing much remarkable on the just brought up X desktop.
> > >
> > > Hardware: x86-64, E3-1245 v3 (Hasw
Hi Daniel,
On 05/05/16 18:06, Daniel Vetter wrote:
> On Thu, May 05, 2016 at 05:13:38PM +0100, Robin Murphy wrote:
>> The current PM ops simply unconditionally enable/disable the HDLCD,
>> which proves problematic when there is no display plugged in - since
>> without a crtc the hardware itself is
..
URL:
<https://lists.freedesktop.org/archives/dri-devel/attachments/20160505/0154c784/attachment.html>
Hi Dave,
This pull adds bus flags which allows to specify pixel clock polarity.
It includes changes outside of fsl-dcu, the patch has been acked by
Daniel.
--
Stefan
The following changes since commit 0552f7651bc233e5407ab06ba97a9d7c25e19580:
drm/i915/mst: use reference counted connectors. (v
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rofile.
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On May 05 Stefan Richter wrote:
> Quoting the changelog of the commit:
[...]
> - Boot with drm.debug=0xe, reproduce the problem, then send us the
>dmesg file.
>
> I can try this, but I am skeptical about getting any useful kernel
> messages from before the hang.
I booted 4.6-rc5 with
On Thu, May 05, 2016 at 06:50:14PM +, Zanoni, Paulo R wrote:
> Em Qui, 2016-05-05 Ã s 19:45 +0200, Stefan Richter escreveu:
> > On Apr 30 Stefan Richter wrote:
> > >
> > > On Apr 29 Stefan Richter wrote:
> > > >
> > > > On Apr 26 Stefan Richter wrote:Â Â
> > > > >
> > > > > v4.6-rc solidly
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gcc points out a possible uninitialized variable use in
sun4i_dclk_create():
drivers/gpu/drm/sun4i/sun4i_dotclock.c: In function 'sun4i_dclk_create':
drivers/gpu/drm/sun4i/sun4i_dotclock.c:139:12: error: 'clk_name' may be used
uninitialized in this function [-Werror=maybe-uninitialized]
init.na
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On Thu, May 05, 2016 at 11:47:07AM +0530, Bhuvanchandra DV wrote:
> Add support for TPK U.S.A. LLC Fusion 7", 10.1"
> panels to the DRM simple panel driver.
>
> Signed-off-by: Bhuvanchandra DV
> ---
>
> This patch is based on top of Stefan's clock polarity patches[1]
>
> [1] https://lkml.org/lk
Hi Dave, Daniel,
This is a regression causing many failures in intel-gfx CI.
[ 295.164523] [drm:drm_debugfs_init] *ERROR* Cannot create
/sys/kernel/debug/dri/0
[ 295.164531] [drm:drm_minor_register] *ERROR* DRM: Failed to
initialize /sys/kernel/debug/dri.
[ 295.167544] i915: probe of :
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