Signed-off-by: Nils Wallménius <nils.wallmenius at gmail.com>
---
drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 6 ++----
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 6 +++---
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 6 +++---
3 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index b2c2f37..31b38bd 100644
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -2549,8 +2549,7 @@ static int ci_get_dependency_volt_by_clk(struct
amdgpu_device *adev,
return 0;
}
-static u8 ci_get_sleep_divider_id_from_clock(struct amdgpu_device *adev,
- u32 sclk, u32 min_sclk_in_sr)
+static u8 ci_get_sleep_divider_id_from_clock(u32 sclk, u32 min_sclk_in_sr)
{
u32 i;
u32 tmp;
@@ -3357,8 +3356,7 @@ static int ci_populate_single_graphic_level(struct
amdgpu_device *adev,
graphic_level->PowerThrottle = 0;
if (pi->caps_sclk_ds)
- graphic_level->DeepSleepDivId =
ci_get_sleep_divider_id_from_clock(adev,
-
engine_clock,
+ graphic_level->DeepSleepDivId =
ci_get_sleep_divider_id_from_clock(engine_clock,
CISLAND_MINIMUM_ENGINE_CLOCK);
graphic_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
index cc4b714..c94f9fa 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
@@ -1898,8 +1898,8 @@ static int fiji_get_dependency_volt_by_clk(struct
pp_hwmgr *hwmgr,
return 0;
}
-static uint8_t fiji_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr,
- uint32_t clock, uint32_t
clock_insr)
+static uint8_t fiji_get_sleep_divider_id_from_clock(uint32_t clock,
+ uint32_t clock_insr)
{
uint8_t i;
uint32_t temp;
@@ -1961,7 +1961,7 @@ static int fiji_populate_single_graphic_level(struct
pp_hwmgr *hwmgr,
data->display_timing.min_clock_in_sr =
hwmgr->display_config.min_core_set_clock_in_sr;
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
PHM_PlatformCaps_SclkDeepSleep))
- level->DeepSleepDivId =
fiji_get_sleep_divider_id_from_clock(hwmgr, clock,
+ level->DeepSleepDivId =
fiji_get_sleep_divider_id_from_clock(clock,
hwmgr->display_config.min_core_set_clock_in_sr);
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
index 13f97708..1faad92 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
@@ -2416,8 +2416,8 @@ int tonga_calculate_sclk_params(struct pp_hwmgr *hwmgr,
return 0;
}
-static uint8_t tonga_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr,
- uint32_t engine_clock, uint32_t min_engine_clock_in_sr)
+static uint8_t tonga_get_sleep_divider_id_from_clock(uint32_t engine_clock,
+ uint32_t min_engine_clock_in_sr)
{
uint32_t i, temp;
uint32_t min = max(min_engine_clock_in_sr,
(uint32_t)TONGA_MINIMUM_ENGINE_CLOCK);
@@ -2486,7 +2486,7 @@ static int tonga_populate_single_graphic_level(struct
pp_hwmgr *hwmgr, uint32_t
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
PHM_PlatformCaps_SclkDeepSleep))
graphic_level->DeepSleepDivId =
- tonga_get_sleep_divider_id_from_clock(hwmgr,
engine_clock,
+
tonga_get_sleep_divider_id_from_clock(engine_clock,
data->display_timing.min_clock_insr);
/* Default to slow, highest DPM level will be set to
PPSMC_DISPLAY_WATERMARK_LOW later.*/
--
2.8.1
