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Hi Rob,
On 11/12/2015 04:22 AM, Rob Herring wrote:
> On Wed, Nov 11, 2015 at 03:47:32PM +0800, Yakir Yang wrote:
>> Signed-off-by: Yakir Yang
> Acked-by: Rob Herring
Thanks you for responding ;)
- Yakir
>> ---
>> .../display/rockchip/inno_hdmi-rockchip.txt| 50
>>
Hi Yakir,
Am Mittwoch, 28. Oktober 2015, 16:30:33 schrieb Yakir Yang:
> Add phy driver for the Rockchip DisplayPort PHY module. This
> is required to get DisplayPort working in Rockchip SoCs.
>
> Reviewed-by: Heiko Stuebner
> Signed-off-by: Yakir Yang
a general thing I have been pondering, we
is used for some eDP screen which don't have hpd signal.
> This should be a generic property.
This property would only need in some no-hpd case, it would be dropped if
panel keep the hotplug signal, that's why I thought it should be optional.
I thought if we put this a property to generic property, then we must need
to define it in normal device node, not sure whether it is right :)
Thanks,
- Yakir
>
> Rob
>
>
>
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od and bad commits?
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it hurt (other than potentially
increasing the build time of the next kernel to test).
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libdrm 2.4.65
Linux kernel 4.3.0-gentoo
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+dev_err(dev, "rk3288-dp needs rockchip,grf property\n");
>> +return PTR_ERR(dp->grf);
>> +}
>> +
>> +ret = regmap_write(dp->grf, GRF_SOC_CON12, GRF_EDP_REF_CLK_SEL_INTER |
>> + GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK);
>> +if (ret != 0) {
>> +dev_err(dp->dev, "Could not config GRF edp ref clk: %d\n", ret);
>> +return ret;
>> +}
>> +
>> +phy = devm_phy_create(dev, np, &rockchip_dp_phy_ops);
>> +if (IS_ERR(phy)) {
>> +dev_err(dev, "failed to create phy\n");
>> +return PTR_ERR(phy);
>> +}
>> +phy_set_drvdata(phy, dp);
>> +
>> +phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
>> +
>> +return PTR_ERR_OR_ZERO(phy_provider);
>> +}
>> +
>> +static const struct of_device_id rockchip_dp_phy_dt_ids[] = {
>> +{ .compatible = "rockchip,rk3288-dp-phy" },
>> +{}
>> +};
>> +
>> +MODULE_DEVICE_TABLE(of, rockchip_dp_phy_dt_ids);
>> +
>> +static struct platform_driver rockchip_dp_phy_driver = {
>> +.probe = rockchip_dp_phy_probe,
>> +.driver = {
>> +.name = "rockchip-dp-phy",
>> +.of_match_table = rockchip_dp_phy_dt_ids,
>> +},
>> +};
>> +
>> +module_platform_driver(rockchip_dp_phy_driver);
>> +
>> +MODULE_AUTHOR("Yakir Yang ");
>> +MODULE_DESCRIPTION("Rockchip DP PHY driver");
>> +MODULE_LICENSE("GPL v2");
>>
>
>
>
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actually
start bisecting to locate the bad commit.
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From: Rex Zhu
rename amdgpu_pm_state_type to amd_pm_state_type
Signed-off-by: Rex Zhu
Acked-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 28 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 8
drivers/gpu/drm/amd/inc
This patch set adds preliminary powerplay support for amdgpu.
The aim of this patch set is to eventually replace the existing
dpm support for VI parts. Support for Tonga, Fiji, and VI APUs
is included. The same sysfs and debugfs interfaces are supported so
it's configured the same way as previous
From: Rex Zhu
These will be shared with the new powerplay module.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 56 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.h | 57
From: Rex Zhu
This will be shared with the new powerplay module.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.h | 494 ---
drivers/gpu
From: Rex Zhu
Add a new driver internal interface for accessing ACPI
methods. These will be used by various new components
including powerplay.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 220 +++
From: Rex Zhu
amdgpu_pp_ip_funcs is introduced to handle the two code paths,
the legacy one and the new powerplay implementation.
CONFIG_DRM_AMD_POWERPLAY kernel configuration option is
introduced for the powerplay component.
v4: squash in fixes
v3: register debugfs file when powerplay module e
From: Rex Zhu
Update amdgpu to deal with the new powerplay module properly.
v2: squash in fixes
v3: squash in Rex's power state reporting fix
Signed-off-by: Rex Zhu
Acked-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 46 ++-
drivers/gpu/drm/amd/a
From: Rex Zhu
Add a query to get the bus number and function of the
device.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 23 +++
drivers/gpu/drm/amd/include/cgs_common.h | 23 +++
2 files changed, 46 inse
From: Rex Zhu
Add new CGS interfaces to query display info across modules.
This is nedded by the powerplay module for synchronizing with
the display module.
v2: (agd): fold in refresh rate fix, rebase
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/d
From: Jammy Zhou
The SMUMGR is one sub-component of powerplay for SMU firmware support.
The SMU handles firmware loading for other IP blocks (GFX, SDMA, etc.)
on VI parts. The adds the core powerplay infrastructure to handle that.
v3: direct use printk in powerplay module.
v2: direct use cgs_re
From: Jammy Zhou
This implements the SMU firmware manager interface for CZ.
Some header files are moved from amdgpu folder to powerplay as well.
v3: delete peci sub-module.
v2: use cgs interface directly
add load_mec_firmware function
Signed-off-by: Rex Zhu
Signed-off-by: Jammy Zhou
Revie
From: Rex Zhu
Powerplay will use a different interface once it's integrated. These
legacy pathes will be removed once powerplay is enabled by default.
Signed-off-by: Rex Zhu
Signed-off-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 80 +
From: Rex Zhu
This is the common interface for interacting with the powerplay
module.
v2: squash in fixes
Signed-off-by: Rex Zhu
Acked-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 191 --
1 file changed, 183 insertions(
From: yanyang1
Move smu7.h, smu7_discrete.h and smu7_fusion.h from amdgpu to powerplay.
Reviewed-by: Alex Deucher
Signed-off-by: yanyang1
---
drivers/gpu/drm/amd/amdgpu/smu7.h | 170 ---
drivers/gpu/drm/amd/amdgpu/smu7_discrete.h| 514 --
driver
From: Jammy Zhou
The hwmgr handles all hardware related calls, including clock/power
gating control, DPM, read and parse PPTable, etc.
v5: squash in fixes
v4: implement acpi's atcs function use cgs interface
v3: fix code style error and add big-endian mode support.
v2: use cgs interface directly
From: Jammy Zhou
This patch enables basic DPM support for Carrizo.
DPM handles dynamic clock and voltage scaling.
v3: delete peci sub-module
v2: use cgs interface directly
correct define SMU_EnabledFeatureScoreboard_SclkDpmOn
Signed-off-by: Rex Zhu
Signed-off-by: Jammy Zhou
Reviewed-by: A
From: Rex Zhu
This adds clock and powergating support for CZ.
v2: squash in fixes
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 3 +-
.../drm/amd/powerplay/hwmgr/cz_clockpowergating.c | 252 ++
..
From: Rex Zhu
The event manager handles power related driver events.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/Makefile | 2 +-
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 23 ++
drivers/gpu/drm/amd/powe
From: yanyang1
Add ixSWRST_COMMAND_1 in bif_5_0_d.h. Required by
new powerplay code for tonga and fiji.
Reviewed-by: Alex Deucher
Signed-off-by: yanyang1
---
drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/include/a
From: yanyang1
These headers provide the SMU interface used by the driver.
Reviewed-by: Alex Deucher
Signed-off-by: yanyang1
---
drivers/gpu/drm/amd/amdgpu/tonga_ppsmc.h | 198 --
drivers/gpu/drm/amd/powerplay/inc/smu72.h | 664 ++
drivers/gpu/drm/amd/po
From: Jammy Zhou
The SMU manager handles firmware loading for other IP
blocks (GFX, SDMA, etc.). This implements it for Tonga.
v3: delete peci sub-module
v2: use cgs interface directly
Signed-off-by: Young Yang
Signed-off-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/pow
From: Eric Huang
Add support for the SMU manager for Fiji. This handles the
firmware loading for other IP blocks (GFX, SDMA, etc.).
Reviewed-by: Alex Deucher
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/powerplay/smumgr/Makefile |2 +-
drivers/gpu/drm/amd/powerplay/smumgr/fiji_s
From: Rex Zhu
Displaygap support is required for proper mclk switching.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/
From: Eric Huang
Switch over to handling in the powerplay module.
Reviewed-by: Alex Deucher
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 3 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 3 +++
drivers/gpu/drm/amd/amdgpu/vi.c | 2 +-
3 files
From: Eric Huang
Add some new functions to support Fiji. Split out
from the previous patch.
Reviewed-by: Jammy Zhou
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c | 489 +-
drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h | 6 +
drivers
From: Jammy Zhou
This option can be used to enable the new powerplay implementation,
and it is disabled by default.
Signed-off-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdg
From: Rex Zhu
This allows the eventmgr to properly update the displaygap on
certain power events.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
.../gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 27 ++
.../gpu/drm/amd/powerplay/inc/hardwar
From: Rex Zhu
Add support for display configuration changes to the event manager.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/eventmgr/eventsubchains.c | 2 +-
drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c | 15 +++
From: Rex Zhu
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
i
From: Rex Zhu
Implement displaygap programming for tonga. This is
required for properly mclk switching.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 91 +++
1 file changed, 91 insertions(
From: Rex Zhu
Interface for clock and power gating handling.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 41 +++
1 file changed, 41 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerpl
From: Rex Zhu
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
index
From: Rex Zhu
Add callbacks interface for clock and powergating.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
b/drivers/
From: Rex Zhu
Implement clock and power gating support for tonga. On Tonga
this is handles by the SMU rather than direct register settings
in the driver.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 2 +-
From: Rex Zhu
Add the interface for fan and thermal control.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hw
From: Rex Zhu
Thermal controller interface.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
.../gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 29 ++
.../gpu/drm/amd/powerplay/inc/hardwaremanager.h| 16
drivers/gpu/drm/amd/p
From: Rex Zhu
Add thermal handling to the event manager.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
.../gpu/drm/amd/powerplay/eventmgr/eventactionchains.c | 1 +
drivers/gpu/drm/amd/powerplay/eventmgr/eventinit.c | 17 -
.../gpu/drm/amd/
From: Rex Zhu
Implement thermal and fan control for tonga.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 2 +-
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 150 +-
drivers/gpu/drm/amd/powerplay/
From: Rex Zhu
This adds the interface needed to expose powerplay fan control to sysfs
via hwmon.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 85 ++-
drivers/gpu/drm/amd/powerplay/inc/amd_
From: Rex Zhu
Same interface exposed in pre-powerplay dpm code.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/am
From: Rex Zhu
Hook up the amdgpu thermal control callbacks for powerplay.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 30 +-
1 file changed, 25 insertions(+), 5 deletions(-)
diff --git a/drive
From: Jammy Zhou
The amdgu_powerplay variable is global for multiple GPU instances.
v2: fold in Flora's module option change, protect adev reference in
macros
Change-Id: I1d00f155f17702209b8f4101a25090b5ec42e37b
Signed-off-by: Jammy Zhou
Reviewed-by: Alex Deucher
Reviewed-by: Christian König
From: Rex Zhu
Interface between hwmgr and eventmgr.
Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
Reviewed-by: Jammy Zhou
---
.../gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 21 +
drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h | 8
drivers/gpu/drm/
From: Rex Zhu
Implement the new callbacks for tonga.
Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
Reviewed-by: Jammy Zhou
---
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 62 +++
1 file changed, 62 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr
When forcing the lowest state also force mclk and pcie.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 48 +--
1 file changed, 37 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
b/drivers/gpu
When forcing the lowest state also force mclk and pcie.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 30
1 file changed, 25 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
b/drivers/gpu/d
These will be used by multiple powerplay drivers and
other IP modules.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/amd_pcie.h| 50
drivers/gpu/drm/amd/include/amd_pcie_helpers.h| 141 ++
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.
From: Rex Zhu
Redefine interrupt callback function in accordance with cgs.
Signed-off-by: Rex Zhu
Reviewed-by: Jammy Zhou
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/ppinterrupt.h | 42 -
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h | 14 +++
From: Rex Zhu
Better handle power state changes.
Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
Reviewed-by: Jammy Zhou
---
drivers/gpu/drm/amd/powerplay/eventmgr/psm.c | 13 ++---
drivers/gpu/drm/amd/powerplay/eventmgr/psm.h | 1 +
2 files changed, 11 insertions(+), 3 deletions(-
(ret_from_fork+0x14/0x3c)
I can't found who can set encoder->crtc value before atomic_commit,
what's going wrong?
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l
current connectors for [CRTC:20] to ee38ebc0
[1.300117] [drm:drm_atomic_connectors_for_crtc] State ee38ebc0 has 1
connectors for [CRTC:20]
[1.300130] [drm:drm_atomic_commit] commiting ee38ebc0
[1.300156] WARNING: CPU: 0 PID: 26 at
drivers/gpu/drm/drm_atomic_helper.c:674
drm_atomic_helper_update_legacy_modeset_state+0x3c/0x1f8()
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Leap 42.1 the same issue.
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drm_gem_object_unreference() now expects obj->dev->struct_mutex to be
held. Use the newly-introduced drm_gem_object_unreference_unlocked()
which handles locking for us.
If we don't do this drm_gem_object_unreference() will get noisy about
struct_mutex not being held every time we call the SET_TILI
- hdmi->connector.encoder = encoder;
+// hdmi->connector.encoder = encoder;
drm_mode_connector_attach_encoder(&hdmi->connector, encoder);
I found some other drivers set connector.encoder before
drm_mode_connector_attach_encoder, some are not.
drm_mode_connector_attach_encoder already describe the link of
connector and encoder,
so I think "connector.encoder = encoder" is not needed, is that right?
Thanks.
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e for the bug.
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302b56bd35bf52804919d57e63 hawaii_smc.bin
# 9f2ba7e720e2af4d7605a9a4fd903513 hawaii_uvd.bin
# d8188b0ca84749c029f7012d7aea17ae hawaii_vce.bin
libclc: Git:master/4346c30bae
DDX: Git:master/7186a8713b
Let me know, if you need something else.
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assignee for the bug.
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On Thu, Nov 12, 2015 at 02:34:57PM +0800, Mark yao wrote:
Mark,
>On 2015å¹´11æ12æ¥ 14:27, Mark yao wrote:
>
> On 2015å¹´11æ11æ¥ 00:56, Thierry Reding wrote:
>
> On Tue, Nov 10, 2015 at 03:01:03PM +, Liviu Dudau wrote:
>
> Hello,
>
> When booting my Juno board with the HD
On Thu, Nov 12, 2015 at 04:32:33PM +0800, Mark yao wrote:
>On 2015å¹´11æ10æ¥ 23:01, Liviu Dudau wrote:
>
> Hello,
>
> When booting my Juno board with the HDLCD driver that I have converted to
> atomic operations I'm getting the following warning:
>
> [ cut here ]--
On Wed, Nov 11, 2015 at 12:48:50PM -0600, Rob Herring wrote:
> On Wed, Nov 11, 2015 at 04:06:47PM +, Liviu Dudau wrote:
> > Cc: Rob Herring
> > Cc: Pawel Moll
> > Cc: Mark Rutland
> > Cc: Ian Campbell
> > Cc: Kumar Gala
> >
> > Signed-off-by: Liviu Dudau
>
> Looks pretty good, but a few
On 2015å¹´11æ12æ¥ 18:36, Liviu Dudau wrote:
> On Thu, Nov 12, 2015 at 04:32:33PM +0800, Mark yao wrote:
>> On 2015å¹´11æ10æ¥ 23:01, Liviu Dudau wrote:
>>
>> Hello,
>>
>> When booting my Juno board with the HDLCD driver that I have converted to
>> atomic operations I'm getting the fo
On 2015å¹´11æ12æ¥ 18:34, Liviu Dudau wrote:
> Can you switch your email client to text mode and make it do proper reply
> quoting? It is
> rather difficult to follow where your reply comes when you don't use HTML
> MUAs.
>
> Best regards,
> Liviu
Hi Liviu
I'm sorry about that, now I switc
On 12.11.2015 07:17, Alex Deucher wrote:
> This patch set adds preliminary powerplay support for amdgpu.
> The aim of this patch set is to eventually replace the existing
> dpm support for VI parts. Support for Tonga, Fiji, and VI APUs
> is included. The same sysfs and debugfs interfaces are supp
On Thu, Nov 12, 2015 at 10:52:25AM +, Jon Medhurst (Tixy) wrote:
> On Thu, 2015-11-12 at 10:42 +, Liviu Dudau wrote:
> > > This is on-chip RAM or nornal system RAM? We already have bindings
> > for
> > > both.
> >
> > Juno has a set of TLX (ThinLinks) connectors on the board where an
> > F
Hi Marek,
On 10 November 2015 at 13:23, Marek Szyprowski
wrote:
> This patch series introduces a new life into Exynos IPP (Image Post
> Processing) subsystem by integrating it (transparently for userspace
> applications) with Exynos DRM core plane management. This means that all
> CRTC drivers t
dex.php/PRIME
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drm_connector_init(drm, &hdmi->connector, &dw_hdmi_connector_funcs,
DRM_MODE_CONNECTOR_HDMIA);
- hdmi->connector.encoder = encoder;
-
drm_mode_connector_attach_encoder(&hdmi->connector, encoder);
return 0;
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From: Ville Syrjälä
Seems the crtc helpers call drm_calc_timestamping_constants()
unconditionally even if the driver didn't initialize vblank support by
calling drm_vblank_init(). That used to be OK since the constants were
stored under drm_crtc.
However I broke this with
commit eba1f35dfe14 (
Hello,
Daniel Stone wrote:
> Hi Marek,
>
> On 10 November 2015 at 13:23, Marek Szyprowski
> wrote:
>> This patch series introduces a new life into Exynos IPP (Image Post
>> Processing) subsystem by integrating it (transparently for userspace
>> applications) with Exynos DRM core plane manageme
Hello Thierry, all,
Inspired by a recent discussion I was started wondering - where is the
cut between DRM i2c modules (most of which encoders/transmitters) and
bridge drivers (again some of which i2c encoders) ? Does anyone has
some pointers on the topic ?
Based on the above I did a very quick
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From: Gustavo Padovan
Fixes an regression added by 3ae2436 (drm/exynos/mixer: replace
direct cross-driver call with drm mode). The whole atomic update
was failing if the hdmi display is not present/active. Add a test
to only run atomic_check() if the CRTC is active.
Signed-off-by: Gustavo Padova
e
start.
Thierry
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he below local change, which I think might be good to
have given that there are at least two drivers that got this wrong.
Thierry
--- >8 ---
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 24c5434abd1c..56d53106b32d 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -4983,6 +4983,20 @@ int drm_mode_connector_attach_encoder(struct
drm_connector *connector,
{
int i;
+ /*
+* In the past, drivers have attempted to model the static association
+* of connector to encoder in simple connector/encoder devices using a
+* direct assignment of connector->encoder = encoder. This connection
+* is a logical one and the responsibility of the core, so drivers are
+* expected not to mess with this.
+*
+* Note that the error return should've been enough here, but a large
+* majority of drivers ignores the return value, so add in a big WARN
+* to get people's attention.
+*/
+ if (WARN_ON(connector->encoder))
+ return -EINVAL;
+
for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
if (connector->encoder_ids[i] == 0) {
connector->encoder_ids[i] = encoder->base.id;
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buildID=695636
> https://patchwork.kernel.org/patch/7591531/mbox
This doesn't look at all related and has probably been an issue for
quite some time. I /think/ this happens because memory is allocated from
the non-DMA pool (i.e. using alloc_page()) and then ends up getting run
through the dma_sync_*() API for cache maintenance. But the assumption
is that you can only do cache maintenance by the dma_sync_*() API on
memory allocated by dma_alloc_*(), hence the warning.
There was some discussion about this a while ago, and there was some
conclusion that an API was needed to do cache maintenance on non-DMA-
allocated pages of memory, but I don't think any work happened towards
that API.
Adding Alex and Arnd who had been part of that discussion, though
possibly in different threads. Guys, I've been doing too many unrelated
things lately it seems, because I can't remember where exactly we left
off. I vaguely remember that at some point somebody (maybe Russell) had
objected to adding such a non-DMA cache-maintenance API, but I can't
find a link to the relevant threads.
Thierry
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ing.
Thierry
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On 12 November 2015 at 13:18, Thierry Reding
wrote:
> On Thu, Nov 12, 2015 at 12:48:51PM +, Emil Velikov wrote:
>> Hello Thierry, all,
>>
>> Inspired by a recent discussion I was started wondering - where is the
>> cut between DRM i2c modules (most of which encoders/transmitters) and
>> bridg
On Thu, Nov 12, 2015 at 01:16:55PM +0100, Thierry Reding wrote:
> On Wed, Nov 11, 2015 at 04:09:42PM +, Liviu Dudau wrote:
> > On Tue, Nov 10, 2015 at 05:56:15PM +0100, Thierry Reding wrote:
> > > On Tue, Nov 10, 2015 at 03:01:03PM +, Liviu Dudau wrote:
> > > > Hello,
> > > >
> > > > When
On Thu, Nov 12, 2015 at 02:34:11PM +0100, Thierry Reding wrote:
> On Thu, Nov 12, 2015 at 06:49:38PM +0800, Mark yao wrote:
> > On 2015å¹´11æ12æ¥ 18:36, Liviu Dudau wrote:
> > >On Thu, Nov 12, 2015 at 04:32:33PM +0800, Mark yao wrote:
> > >>On 2015å¹´11æ10æ¥ 23:01, Liviu Dudau wrote:
> >
the bug.
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https://bugzilla.kernel.org/show_bug.cgi?id=106271
--- Comment #11 from Aneroid ---
May be the root of that problem is that Radeon HD 8970M is not a Pitcairn card
?
It is a Neptune XT, some kind of mobile version:
http://www.techpowerup.com/gpudb/1966/radeon-hd-8970m.html
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Hi,
On 12 November 2015 at 12:44, Tobias Jakobi
wrote:
> Daniel Stone wrote:
>> On 10 November 2015 at 13:23, Marek Szyprowski
>> wrote:
>>> This patch series introduces a new life into Exynos IPP (Image Post
>>> Processing) subsystem by integrating it (transparently for userspace
>>> applicati
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On Thu, Nov 12, 2015 at 7:34 AM, wrote:
> From: Ville Syrjälä
>
> Seems the crtc helpers call drm_calc_timestamping_constants()
> unconditionally even if the driver didn't initialize vblank support by
> calling drm_vblank_init(). That used to be OK since the constants were
> stored under drm_c
Hey Daniel,
Daniel Stone wrote:
> Hi,
>
> On 12 November 2015 at 12:44, Tobias Jakobi
> wrote:
>> Daniel Stone wrote:
>>> On 10 November 2015 at 13:23, Marek Szyprowski >> samsung.com> wrote:
This patch series introduces a new life into Exynos IPP (Image Post
Processing) subsystem by
Hi Marek,
2015-11-10 Marek Szyprowski :
> From: Seung-Woo Kim
>
> Ths patch changes the clk_enable and clk_disable call in gsc driver
> into clk_prepare_enable and clk_disable_unprepare.
>
> Signed-off-by: Seung-Woo Kim
> Signed-off-by: Marek Szyprowski
> ---
> drivers/gpu/drm/exynos/exynos
Hi Marek,
2015-11-10 Marek Szyprowski :
> From: Seung-Woo Kim
>
> At probe time, gsc clock is not enabled, so pm_runtime state should
> be deactive. So this patch removes pm_runtime_set_active() from
> gsc_probe().
>
> Signed-off-by: Seung-Woo Kim
> Signed-off-by: Marek Szyprowski
> ---
> d
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