port);
306 }
307 put_device(d);
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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Hi Daniel,
On Tuesday 25 August 2015 09:15:16 Daniel Vetter wrote:
> On Tue, Aug 18, 2015 at 09:35:44AM +0300, Laurent Pinchart wrote:
> > On Friday 14 August 2015 09:30:15 Daniel Vetter wrote:
> > > On Fri, Aug 14, 2015 at 12:19:03AM +0300, Laurent Pinchart wrote:
> > > > On Friday 07 August 2015
Hi Dave,
The following changes since commit c76af02d90ee9e9d2ef478fc6f874ad2abcf3ec9:
via_drm.h: move struct via_file_private definition to
drivers/gpu/drm/via/via_drv.h (2015-10-16 11:27:49 +1000)
are available in the git repository at:
git://linuxtv.org/pinchartl/fbdev.git drm/next/du
f
The drm driver .load() operation is prone to race conditions as it
initializes the driver after registering the device nodes. Its usage is
deprecated, inline it in the probe function and call drm_dev_alloc() and
drm_dev_register() explicitly.
For consistency inline the .unload() handler in the rem
ll have to resend the patches anyway.
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On 20 October 2015 at 10:14, Mark Brown wrote:
> On Mon, Oct 19, 2015 at 11:11:19AM -0400, Alex Deucher wrote:
>
>> Ping? Anyone had a chance to look over this latest revision? I think
>> we've addressed all the outstanding comments.
>
> Please don't send content free pings and please allow a re
attached to CRTC\n");
> >> }
> >>
> >> + /* Degamma correction */
> >> + if (config->cm_palette_before_ctm_property) {
> >> + drm_object_attach_property(mode_obj,
> >> + config->cm_palette_before_ctm_property, 0);
> >> + DRM_DEBUG_DRIVER("degamma property attached to CRTC\n");
> >> + }
> >> }
> >> diff --git a/drivers/gpu/drm/i915/intel_color_manager.h
> >> b/drivers/gpu/drm/i915/intel_color_manager.h
> >> index de706d9..77a2119 100644
> >> --- a/drivers/gpu/drm/i915/intel_color_manager.h
> >> +++ b/drivers/gpu/drm/i915/intel_color_manager.h
> >> @@ -63,5 +63,10 @@
> >> #define CHV_GAMMA_SHIFT_GREEN 16
> >> #define CHV_MAX_GAMMA ((1 << 24) - 1)
> >>
> >> +/* Degamma on CHV */
> >> +#define CHV_DEGAMMA_MSB_SHIFT 2
> >> +#define CHV_DEGAMMA_GREEN_SHIFT16
> >> +
> >> /* CHV CGM Block */
> >> #define CGM_GAMMA_EN (1 << 2)
> >> +#define CGM_DEGAMMA_EN (1 << 0)
> >> --
> >> 1.9.1
> >>
> >> -
> >> Intel Corporation (UK) Limited
> >> Registered No. 1134945 (England)
> >> Registered Office: Pipers Way, Swindon SN3 1RJ
> >> VAT No: 860 2173 47
> >>
> >> This e-mail and any attachments may contain confidential material for
> >> the sole use of the intended recipient(s). Any review or distribution
> >> by others is strictly prohibited. If you are not the intended
> >> recipient, please contact the sender and delete all copies.
> >>
> >> ___
> >> Intel-gfx mailing list
> >> Intel-gfx at lists.freedesktop.org<mailto:Intel-gfx at
> >> lists.freedesktop.org>
> >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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On nv50+, we restrict the valid domains to just the one where the buffer
was originally created. However after the buffer is evicted to system
memory, we might move it back to a different domain that was not
originally valid. When sharing the buffer and retrieving its GEM_INFO
data, we still want t
On 20 October 2015 at 07:54, Daniel Vetter wrote:
> On Mon, Oct 19, 2015 at 04:19:08PM -0400, davej at codemonkey.org.uk wrote:
>> On Wed, Sep 30, 2015 at 08:56:26AM +0200, Daniel Vetter wrote:
>>
>> > > The warning on boot seems to be gone as of rc3, but I can now trigger
>> this pretty easily.
On 10/19/2015 09:20 PM, Inki Dae wrote:
> Hi,
>
> How about combining patch 5 and 6?
>
> Patch 5 just introduces new internal API but these API aren't used anywhere
> in patch 5.
>
I split it to be easy to understand changes of codes on patch file. It's
no matter to me to combine them.
Anyway
On Mon, 19 Oct 2015, Daniel Vetter wrote:
> On Fri, Oct 09, 2015 at 01:54:58PM +0300, Jani Nikula wrote:
>> On Thu, 08 Oct 2015, Daniel Vetter wrote:
>> > On Thu, Oct 08, 2015 at 12:22:31PM -0400, Adam Jackson wrote:
>> >> On Thu, 2015-10-08 at 11:43 +0300, ville.syrjala at linux.intel.com wrote:
Hi Lucas,
2015-10-13 10:25 GMT+02:00 Lucas Stach :
> Am Mittwoch, den 30.09.2015, 09:53 +0200 schrieb Christian Gmeiner:
>> Hi Lucas,
>>
>> 2015-09-28 12:39 GMT+02:00 Lucas Stach :
>> > Hi Christian,
>> >
>> > Am Montag, den 28.09.2015, 11:46 +0200 schrieb Christian Gmeiner:
>> >> Hi Lucas.
>> >>
On Tue, Oct 20, 2015 at 01:40:39AM +0300, Laurent Pinchart wrote:
> Hi Daniel,
>
> On Tuesday 25 August 2015 09:15:16 Daniel Vetter wrote:
> > On Tue, Aug 18, 2015 at 09:35:44AM +0300, Laurent Pinchart wrote:
> > > On Friday 14 August 2015 09:30:15 Daniel Vetter wrote:
> > > > On Fri, Aug 14, 2015
On Mon, Oct 19, 2015 at 10:27:17PM +, Smith, Gary K wrote:
> Unless legacy mode enables it of course.
I thought we decided to ignore legacy gamma stuff (at least for now, until
someone complains about the inconsistency). So yeah, I think we're fine.
-Daniel
>
> Thanks
> Gary
>
>
> "Smith,
On Tue, Oct 20, 2015 at 01:51:54AM +0300, Laurent Pinchart wrote:
> The drm driver .load() operation is prone to race conditions as it
> initializes the driver after registering the device nodes. Its usage is
> deprecated, inline it in the probe function and call drm_dev_alloc() and
> drm_dev_regis
On Tue, Oct 20, 2015 at 09:08:09AM +0530, Vinod Koul wrote:
> On Mon, Oct 19, 2015 at 03:20:30PM +0200, Takashi Iwai wrote:
> > On Sun, 18 Oct 2015 19:16:42 +0200,
> > Russell King - ARM Linux wrote:
> > >
> > > On Sun, Oct 18, 2015 at 09:43:29PM +0530, Vinod Koul wrote:
> > > > Right but can I as
Yes, please note that as per the discussion, the legacy gamma IOCTL is still
existing, to maintain the backward compatibility, we have not broken it.
And we have added provision to program legacy-8bit gamma via color manager
also, so everyone should be happy :)
Regards
Shashank
-Original Me
Am Dienstag, den 20.10.2015, 09:20 +0200 schrieb Christian Gmeiner:
> Hi Lucas,
>
> 2015-10-13 10:25 GMT+02:00 Lucas Stach :
> > Am Mittwoch, den 30.09.2015, 09:53 +0200 schrieb Christian Gmeiner:
> >> Hi Lucas,
> >>
> >> 2015-09-28 12:39 GMT+02:00 Lucas Stach :
> >> > Hi Christian,
> >> >
> >> >
On Tue, Oct 20, 2015 at 11:00 AM, Lucas Stach wrote:
> Am Dienstag, den 20.10.2015, 09:20 +0200 schrieb Christian Gmeiner:
>> Hi Lucas,
>>
>> 2015-10-13 10:25 GMT+02:00 Lucas Stach :
>> > Am Mittwoch, den 30.09.2015, 09:53 +0200 schrieb Christian Gmeiner:
>> >> Hi Lucas,
>> >>
>> >> 2015-09-28 12:
Hi Krzysztof,
On 10/12/2015 03:26 PM, Inki Dae wrote:
> Hi Andrzej,
>
> For all patches, merged excepting patch 2 which cleans up dt binding
> document.
Could you take this patch [1], it is just small binding cleanup.
[1]: https://patchwork.kernel.org/patch/7264251/
Regards
Andrzej
>
> Thanks
Hi Inki,
This patchset adds support to DECON-TV in Exynos5433 SoC.
The main patch is prepended with few preparation patches:
- add three clocks required by HDMI pipeline,
- small bindings update,
- driver cleanup.
The patchset is based on the latest exynos-drm-next branch.
Regards
Andrzej
Andr
HDMI driver must re-parent respective muxes during HDMI-PHY on/off
to HDMI-PHY output clocks. To reference those clocks their
definitions should be added.
Signed-off-by: Andrzej Hajda
---
drivers/clk/samsung/clk-exynos5433.c | 6 --
include/dt-bindings/clock/exynos5433.h | 5 -
2 files
This undocumented gate clock is used by DECON IP.
Signed-off-by: Andrzej Hajda
---
drivers/clk/samsung/clk-exynos5433.c | 2 ++
include/dt-bindings/clock/exynos5433.h | 4 +++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-exynos5433.c
b/drivers/clk/sam
All timing registers should contain values decreased by one.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
b/drivers/gpu/drm/exyn
PCLK clock is used by DECON IP. The patch also replaces magic number with
number of clocks in array definition.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 21 +++--
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/d
DECON IP requires this clock to access configuration registers.
Signed-off-by: Andrzej Hajda
---
Documentation/devicetree/bindings/video/exynos5433-decon.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/video/exynos5433-decon.txt
b/Docume
The driver often sets only particular bits of configuration registers.
Using separate function to such action simplifies the code.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 69 ---
1 file changed, 19 insertions(+), 50 deletions(-)
d
Field .commit is already initialized few lines above.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 265a77f..3c
DECON-TV(Display and Enhancement Controller for TV) is a variation
of DECON IP. Its main purpose is to produce video stream for HDMI IP.
Signed-off-by: Andrzej Hajda
---
.../devicetree/bindings/video/exynos5433-decon.txt | 21 -
1 file changed, 12 insertions(+), 9 deletions(
DECON-TV IP is responsible for generating video stream which is transferred
to HDMI IP. It is almost fully compatible with DECON IP.
The patch is based on initial work of Hyungwon Hwang.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 154 ---
A lot of component based DRM drivers use a variant of the same code
as the probe function. They bind the crtc ports in the first iteration
and then scan through the child nodes and bind the encoders attached
to the remote endpoints. Factor the common code into a separate
function called drm_of_comp
The armada DRM driver keeps some old platform data compatibility in the
probe function that makes moving to the generic drm_of_component_probe()
a bit more complicated that it should. Refactor the probe function to do
the platform_data processing after the generic probe (and only if that
fails). Th
Changelog:
v4: Fixed a bug where the wrong pointer was sent to component_match_add() and
component_master_add_with_match() in the armada_drv.c file that was flagged
by kbuild test robot. Dropped the RFC tag and added Acked-bys received from
Russell King.
v3: Removed the call to dma_set_
The generic function is functionally equivalent to the driver's
imx_drm_platform_probe(). Use the generic function and reduce the
overall code size.
Signed-off-by: Liviu Dudau
Acked-by: Russell King
---
drivers/gpu/drm/imx/imx-drm-core.c | 55 +++---
1 file chang
Driver uses four different fields for internal flags. They can be merged
into one.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 61 +--
1 file changed, 30 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos5433_dr
Use the generic drm_of_component_probe() function to probe for components.
Signed-off-by: Liviu Dudau
---
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 81 +++--
1 file changed, 6 insertions(+), 75 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
b/
On Fri, Sep 11, 2015 at 04:10:10PM +0200, Lucas Stach wrote:
> Hey all,
>
> this is a new posting of the Etnaviv DRM driver for Vivante embedded GPUs.
> This time I've squashed all patches to the DRM driver itself into a single
> commit
> to make it easier for people to look at and review this st
Hi Lucas,
2015-10-20 11:00 GMT+02:00 Lucas Stach :
> Am Dienstag, den 20.10.2015, 09:20 +0200 schrieb Christian Gmeiner:
>> Hi Lucas,
>>
>> 2015-10-13 10:25 GMT+02:00 Lucas Stach :
>> > Am Mittwoch, den 30.09.2015, 09:53 +0200 schrieb Christian Gmeiner:
>> >> Hi Lucas,
>> >>
>> >> 2015-09-28 12:3
Hi Jon,
2015-10-20 11:09 GMT+02:00 Jon Nettleton :
> On Tue, Oct 20, 2015 at 11:00 AM, Lucas Stach
> wrote:
>> Am Dienstag, den 20.10.2015, 09:20 +0200 schrieb Christian Gmeiner:
>>> Hi Lucas,
>>>
>>> 2015-10-13 10:25 GMT+02:00 Lucas Stach :
>>> > Am Mittwoch, den 30.09.2015, 09:53 +0200 schrieb
t part --
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https://bugzilla.kernel.org/show_bug.cgi?id=106291
--- Comment #1 from Michel Dänzer ---
Please attach the full dmesg output.
--
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You are watching the assignee of the bug.
Hi Liviu,
On 20 October 2015 at 10:23, Liviu Dudau wrote:
> A lot of component based DRM drivers use a variant of the same code
> as the probe function. They bind the crtc ports in the first iteration
> and then scan through the child nodes and bind the encoders attached
> to the remote endpoints
On Tue, Oct 20, 2015 at 10:23:11AM +0100, Liviu Dudau wrote:
> Changelog:
> v4: Fixed a bug where the wrong pointer was sent to component_match_add() and
> component_master_add_with_match() in the armada_drv.c file that was
> flagged
> by kbuild test robot. Dropped the RFC tag and added Ac
On Tue, Oct 20, 2015 at 11:00:55AM +0100, Emil Velikov wrote:
> Hi Liviu,
>
> On 20 October 2015 at 10:23, Liviu Dudau wrote:
> > A lot of component based DRM drivers use a variant of the same code
> > as the probe function. They bind the crtc ports in the first iteration
> > and then scan throug
On Tue, Oct 20, 2015 at 11:09:09AM +0100, Russell King - ARM Linux wrote:
> On Tue, Oct 20, 2015 at 11:00:55AM +0100, Emil Velikov wrote:
> > Hi Liviu,
> >
> > On 20 October 2015 at 10:23, Liviu Dudau wrote:
> > > A lot of component based DRM drivers use a variant of the same code
> > > as the pr
On Tue, Oct 20, 2015 at 12:02:33PM +0200, Daniel Vetter wrote:
> On Tue, Oct 20, 2015 at 10:23:11AM +0100, Liviu Dudau wrote:
> > Changelog:
> > v4: Fixed a bug where the wrong pointer was sent to component_match_add()
> > and
> > component_master_add_with_match() in the armada_drv.c file that
Hello,
On 2015-10-20 12:34, Michael Turquette wrote:
> Quoting Andrzej Hajda (2015-10-20 02:22:32)
>> HDMI driver must re-parent respective muxes during HDMI-PHY on/off
>> to HDMI-PHY output clocks. To reference those clocks their
>> definitions should be added.
>>
>> Signed-off-by: Andrzej Hajda
Hi Jon,
On Tue, Oct 20, 2015 at 7:09 AM, Jon Nettleton
wrote:
> I agree, although we can also point them to the device-tree option to
> workaround the problem temporarily.
>
> Christian, fyi I have fixed this in u-boot for all the SolidRun platforms.
This is fixed in mainline U-boot for mx6:
h
Another vga_switcheroo cleanup. Maintainers, is it okay to include the
one-line change of each driver in here or do you want that split into
separate patches?
Thanks,
Lukas
Lukas Wunner (1):
vga_switcheroo: Constify vga_switcheroo_handler
drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 2
On 18.10.2015 13:05, Lukas Wunner wrote:
> vga_switcheroo_client_ops has always been declared const since its
> introduction with 26ec685ff9d9 ("vga_switcheroo: Introduce struct
> vga_switcheroo_client_ops").
>
> Do so for vga_switcheroo_handler as well.
>
> drivers/gpu/drm/amd/amdgpu/amdgpu.ko:
On 20/10/15 12:34, Michael Turquette wrote:
>> diff --git a/include/dt-bindings/clock/exynos5433.h
>> b/include/dt-bindings/clock/exynos5433.h
>> > index 5bd80d5..4f0d566 100644
>> > --- a/include/dt-bindings/clock/exynos5433.h
>> > +++ b/include/dt-bindings/clock/exynos5433.h
>> > @@ -765,7 +765,
ps, too.
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2015-10-20 18:19 GMT+09:00 Andrzej Hajda :
> Hi Krzysztof,
>
>
> On 10/12/2015 03:26 PM, Inki Dae wrote:
>> Hi Andrzej,
>>
>> For all patches, merged excepting patch 2 which cleans up dt binding
>> document.
>
> Could you take this patch [1], it is just small binding cleanup.
>
> [1]: https://patch
https://bugzilla.kernel.org/show_bug.cgi?id=106341
Bug ID: 106341
Summary: radeon - monitors fail to sync with modes with
vertical refresh rate under 60 Hz on FirePro V4800
Product: Drivers
Version: 2.5
Kernel Version: 4.3.0-rc6
https://bugzilla.kernel.org/show_bug.cgi?id=106341
Tim Small changed:
What|Removed |Added
Regression|No |Yes
--
You are receiving this mail because:
We have added two patches to optimize multiple commit calls, to address Gary's
comment, using one additional flag in CRTC state.
We have tested this, and it's working for both Android and Linux.
I am sending this new patch set now (v7), which has these two additional
patches, in total 25 in co
2015-10-20 18:22 GMT+09:00 Andrzej Hajda :
> This undocumented gate clock is used by DECON IP.
>
> Signed-off-by: Andrzej Hajda
> ---
> drivers/clk/samsung/clk-exynos5433.c | 2 ++
> include/dt-bindings/clock/exynos5433.h | 4 +++-
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
Indeed loo
2015-10-20 18:22 GMT+09:00 Andrzej Hajda :
> Hi Inki,
>
> This patchset adds support to DECON-TV in Exynos5433 SoC.
> The main patch is prepended with few preparation patches:
> - add three clocks required by HDMI pipeline,
> - small bindings update,
> - driver cleanup.
>
> The patchset is based on
W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
> DECON IP requires this clock to access configuration registers.
>
> Signed-off-by: Andrzej Hajda
> ---
> Documentation/devicetree/bindings/video/exynos5433-decon.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Docume
This patch set adds Color Manager implementation in DRM layer. Color Manager
is an extension in DRM framework to support color correction/enhancement.
Various Hardware platforms can support several color correction capabilities.
Color Manager provides abstraction of these capabilities and allows a
Color Management is an extension to DRM framework. It allows
abstraction of hardware color correction and enhancement capabilities
by virtue of DRM properties.
There are two major types of color correction supported by DRM
color manager:
- CTM: color transformation matrix, properties where a corre
DRM color management is written to extract the color correction
capabilities of various platforms, and every platform can showcase
its capabilities using the query properties.
Different hardwares can have different no of coefficients for palette
correction. Also the correction can be applied after
This patch adds new variables in CRTC state, to hold respective color
correction blobs. These blobs will be required during the atomic commit
for writing the color correction values in correction registers.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
drivers/gpu/drm/drm_ato
As per DRM color manager design, if a userspace wants to set a correction
blob, it prepares it and sends the blob_id to kernel via set_property
call. DRM framework takes this blob_id, gets the blob, and saves it
in the CRTC state, so that, during the atomic_commit, the color correction
values from
As per the DRM get_property implementation for a blob, framework
is supposed to return the blob_id to the caller. All the color
management blobs are saved in CRTC state during the set call.
This patch adds get_property support for color management
properties, by referring to the existing blob for
This patch adds new structures in DRM layer for Palette color
correction.These structures will be used by user space agents
to configure appropriate number of samples and Palette LUT for
a platform.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
include/uapi/drm/drm.h | 20 +++
Color Manager framework defines a DRM property for color
space transformation and Gamut mapping. This property is called
CTM (Color Transformation Matrix).
This patch adds a new structure in DRM layer for CTM.
This structure can be used by all user space agents to
configure CTM coefficients for co
Add a color correction state flag, to indicate a change in
color correction states. This flag will help a core driver to
optimize its commit calls, by appling the color correction only
when there is a change, not every commit.
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/drm_atomic.c | 6 +
This patch adds set property interface for intel CRTC. This
interface will be used for set operation on any DRM properties.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
drivers/gpu/drm/i915/intel_display.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i
This patch create new files intel_color_manager.c which
will contain the core color correction code for I915 driver
and its header intel_color_manager.h
The per color property patches coming up in this patch series
will fill the appropriate functions in this file.
Signed-off-by: Shashank Sharma
>From DRM color management:
DRM color manager supports these color properties:
1. "ctm": Color transformation matrix property, where a
color transformation matrix of 9 correction values gets
applied as correction.
2. "palette_before_ctm": for corrections which get
DRM color manager allows the driver to showcase its best color
correction capabilities using the specific query property
cm_coeff_after_ctm_property. The driver must loads the no. of
coefficients for color correction as per the platform capability
during the init time.
This patch adds no of coeffi
DRM color manager allows the driver to showcase its best color
correction capabilities using the specific query property
cm_coeff_before_ctm_property. The driver must loads the no. of
coefficients for color correction as per the platform capability
during the init time.
This patch adds no of coeff
CHV/BSW platform supports two different pipe level gamma
correction modes, which are:
1. Legacy 8-bit mode
2. 10-bit CGM (Color Gamut Mapping) mode
This patch does the following:
1. Attaches Gamma property to CRTC
3. Adds the core Gamma correction function for CHV/BSW
4. Adds Gamma correction macr
CHV/BSW supports Degamma color correction, which linearizes all
the non-linear color values. This will be applied before Color
Transformation.
This patch does the following:
1. Attach deGamma property to CRTC
2. Add the core function to program DeGamma correction values for
CHV/BSW platform
2.
CHV/BSW supports Color Space Conversion (CSC) using a 3x3 matrix
that needs to be programmed into CGM (Color Gamut Mapping) registers.
This patch does the following:
1. Attaches CSC property to CRTC
2. Adds the core function to program CSC correction values
3. Adds CSC correction macros
Signed-of
The color correction blob values are loaded during set_property
calls. This patch adds a function to find the blob and apply the
correction values to the display registers, during the atomic
commit call.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
drivers/gpu/drm/i915/intel
Function intel_attach_color_properties_to_crtc attaches a
color property to its CRTC object. This patch calls this
function from crtc initialization sequence.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
drivers/gpu/drm/i915/intel_display.c | 1 +
1 file changed, 1 insertion
I915 color manager registers pipe gamma correction as palette
correction after CTM property.
For BDW and higher platforms, split gamma correction is the best
gamma correction. This patch adds the no of coefficients(512) for
split gamma correction as "num_samples_after_ctm" parameter in device
info
BDW/SKL/BXT platforms support various Gamma correction modes
which are:
1. Legacy 8-bit mode
2. 10-bit mode
3. Split mode
4. 12-bit mode
This patch does the following:
1. Adds the core function to program Gamma correction values
for BDW/SKL/BXT platforms
2. Adds Gamma correction macros/defines
I915 color manager registers pipe degamma correction as palette
correction before CTM, DRM property.
This patch adds the no of coefficients(512) for degamma correction
as "num_samples_before_ctm" parameter in device info structures,
for BDW and higher platforms.
Signed-off-by: Shashank Sharma
Si
BDW/SKL/BXT supports Degamma color correction feature, which
linearizes the non-linearity due to gamma encoded color values.
This will be applied before Color Transformation.
This patch does the following:
1. Adds the core function to program DeGamma correction values for
BDW/SKL/BXT platform
2
BDW/SKL/BXT support Color Space Conversion (CSC) using a 3x3 matrix
that needs to be programmed into respective CSC registers.
This patch does the following:
1. Adds the core function to program CSC correction values for
BDW/SKL/BXT platform
2. Adds CSC correction macros/defines
Signed-off-by:
In plane enabling sequence, plane gamma bit is by default enabled.
Plane gamma gets higher priority than pipe gamma, if both enabled.
This patch disables plane gamma from sequence. If required, plane
gamma can be enabled via the color manager drm interface.
Signed-off-by: Shashank Sharma
Signed-
This patch optimizes the commit path for i915 driver, by applying
color corrections, only when required. Pipe level color correction
(like CSC/gamma/degamma) once applied, sustain until the next change.
DRM layer sets a flag in crtc state (color_correction_changed),
whenever there is new set_prope
W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
> DECON-TV(Display and Enhancement Controller for TV) is a variation
> of DECON IP. Its main purpose is to produce video stream for HDMI IP.
>
> Signed-off-by: Andrzej Hajda
> ---
> .../devicetree/bindings/video/exynos5433-decon.txt | 21
> ++
On 10/20/2015 02:24 PM, Krzysztof Kozlowski wrote:
> W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
>> DECON IP requires this clock to access configuration registers.
>>
>> Signed-off-by: Andrzej Hajda
>> ---
>> Documentation/devicetree/bindings/video/exynos5433-decon.txt | 2 +-
>> 1 file chang
2015-10-20 21:41 GMT+09:00 Andrzej Hajda :
> On 10/20/2015 02:24 PM, Krzysztof Kozlowski wrote:
>> W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
>>> DECON IP requires this clock to access configuration registers.
>>>
>>> Signed-off-by: Andrzej Hajda
>>> ---
>>> Documentation/devicetree/bindings
On 10/20/2015 02:30 PM, Krzysztof Kozlowski wrote:
> W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
>> DECON-TV(Display and Enhancement Controller for TV) is a variation
>> of DECON IP. Its main purpose is to produce video stream for HDMI IP.
>>
>> Signed-off-by: Andrzej Hajda
>> ---
>> .../devi
2015-10-20 21:53 GMT+09:00 Andrzej Hajda :
> On 10/20/2015 02:30 PM, Krzysztof Kozlowski wrote:
>> W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
>>> DECON-TV(Display and Enhancement Controller for TV) is a variation
>>> of DECON IP. Its main purpose is to produce video stream for HDMI IP.
>>>
>>>
On 20/10/15 14:24, Krzysztof Kozlowski wrote:
> W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
>> > DECON IP requires this clock to access configuration registers.
>> >
>> > Signed-off-by: Andrzej Hajda
>> > ---
>> > Documentation/devicetree/bindings/video/exynos5433-decon.txt | 2 +-
>> > 1 fi
Hi Shashank,
[auto build test WARNING on drm-intel/for-linux-next -- if it's inappropriate
base, please suggest rules for selecting the more suitable base]
url:
https://github.com/0day-ci/linux/commits/Shashank-Sharma/Color-Management-for-DRM-framework/20151020-202959
reproduce:
https://bugzilla.kernel.org/show_bug.cgi?id=106291
universaledge97 at gmail.com changed:
What|Removed |Added
Attachment #190561|0 |1
is obsolete|
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