This undocumented gate clock is used by DECON IP.

Signed-off-by: Andrzej Hajda <a.hajda at samsung.com>
---
 drivers/clk/samsung/clk-exynos5433.c   | 2 ++
 include/dt-bindings/clock/exynos5433.h | 4 +++-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/samsung/clk-exynos5433.c 
b/drivers/clk/samsung/clk-exynos5433.c
index e037406..e7b4533 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -2822,6 +2822,8 @@ static struct samsung_gate_clock disp_gate_clks[] 
__initdata = {
                        ENABLE_PCLK_DISP, 2, 0, 0),
        GATE(CLK_PCLK_DECON_TV, "pclk_decon_tv", "div_pclk_disp",
                        ENABLE_PCLK_DISP, 1, 0, 0),
+       GATE(CLK_PCLK_DECON, "pclk_decon", "div_pclk_disp",
+                       ENABLE_PCLK_DISP, 0, 0, 0),

        /* ENABLE_SCLK_DISP */
        GATE(CLK_PHYCLK_MIPIDPHY1_BITCLKDIV8, "phyclk_mipidphy1_bitclkdiv8",
diff --git a/include/dt-bindings/clock/exynos5433.h 
b/include/dt-bindings/clock/exynos5433.h
index 4f0d566..5c2636c 100644
--- a/include/dt-bindings/clock/exynos5433.h
+++ b/include/dt-bindings/clock/exynos5433.h
@@ -768,7 +768,9 @@
 #define CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY              111
 #define CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY               112

-#define DISP_NR_CLK                                    113
+#define CLK_PCLK_DECON                                 113
+
+#define DISP_NR_CLK                                    114

 /* CMU_AUD */
 #define CLK_MOUT_AUD_PLL_USER                          1
-- 
1.9.1

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