Am Samstag, 14. September 2024, 20:28:59 CEST schrieb Cristian Ciocaltea:
> On 9/10/24 10:08 PM, Heiko Stübner wrote:
> > Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
> > That hdmi->ref_clk just accidentially falls out of that loop at the end
> > looks somewhat strange,
On 9/10/24 10:08 PM, Heiko Stübner wrote:
> Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
>> The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
>> Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a
>> Samsung IP block.
>>
>> Add j
On 9/10/24 11:49 PM, Heiko Stübner wrote:
> Am Dienstag, 10. September 2024, 18:39:54 CEST schrieb Heiko Stübner:
>> Am Dienstag, 10. September 2024, 17:41:42 CEST schrieb Cristian Ciocaltea:
>>> On 9/10/24 6:21 PM, Heiko Stübner wrote:
Am Dienstag, 10. September 2024, 17:07:57 CEST schrieb He
Am Dienstag, 10. September 2024, 18:39:54 CEST schrieb Heiko Stübner:
> Am Dienstag, 10. September 2024, 17:41:42 CEST schrieb Cristian Ciocaltea:
> > On 9/10/24 6:21 PM, Heiko Stübner wrote:
> > > Am Dienstag, 10. September 2024, 17:07:57 CEST schrieb Heiko Stübner:
> > >> Am Freitag, 6. September
Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
> The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
> Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a
> Samsung IP block.
>
> Add just the basic support for now, i.e. RGB output u
Am Dienstag, 10. September 2024, 17:41:42 CEST schrieb Cristian Ciocaltea:
> On 9/10/24 6:21 PM, Heiko Stübner wrote:
> > Am Dienstag, 10. September 2024, 17:07:57 CEST schrieb Heiko Stübner:
> >> Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
> >>> The RK3588 SoC family i
On 9/10/24 6:21 PM, Heiko Stübner wrote:
> Am Dienstag, 10. September 2024, 17:07:57 CEST schrieb Heiko Stübner:
>> Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
>>> The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
>>> Quad-Pixel (QP) TX controller
Am Dienstag, 10. September 2024, 17:07:57 CEST schrieb Heiko Stübner:
> Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
> > The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
> > Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a
>
Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
> The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
> Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a
> Samsung IP block.
>
> Add just the basic support for now, i.e. RGB output u
On 9/10/24 2:27 PM, Heiko Stübner wrote:
> Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
>> The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
>> Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a
>> Samsung IP block.
>>
>> Add ju
Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
> The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
> Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a
> Samsung IP block.
>
> Add just the basic support for now, i.e. RGB output u
base: 8400291e289ee6b2bf9779ff1c83a291501f017b
patch link:
https://lore.kernel.org/r/20240906-b4-rk3588-bridge-upstream-v6-3-a3128fb103eb%40collabora.com
patch subject: [PATCH v6 3/3] drm/rockchip: Add basic RK3588 HDMI output support
config: powerpc64-randconfig-r122-20240908
(https
The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a
Samsung IP block.
Add just the basic support for now, i.e. RGB output up to 4K@60Hz,
without audio, CEC or any of the HDMI 2.1 specific features.
Co-deve
13 matches
Mail list logo
