Hi Biju,
Thank you for the review.
On Sun, May 4, 2025 at 2:00 PM Biju Das wrote:
>
> Hi Prabhakar,
>
> Thanks for the patch.
>
> > -Original Message-
> > From: Prabhakar
> > Sent: 30 April 2025 21:41
> > Subject: [PATCH v4 14/15] drm: re
Hi Prabhakar,
Thanks for the patch.
> -Original Message-
> From: Prabhakar
> Sent: 30 April 2025 21:41
> Subject: [PATCH v4 14/15] drm: renesas: rz-du: mipi_dsi: Add support for
> LPCLK handling
>
> From: Lad Prabhakar
>
> Introduce the `RZ_MIPI_DSI_FEA
From: Lad Prabhakar
Introduce the `RZ_MIPI_DSI_FEATURE_LPCLK` feature flag in
`rzg2l_mipi_dsi_hw_info` to indicate the need for LPCLK configuration.
On the RZ/V2H(P) SoC, the LPCLK clock rate influences the required
DPHY register configuration, whereas on the RZ/G2L SoC, this clock
is not presen