Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 25/08/2025 à 15:29, Raphael Gallais-Pou a écrit :
DRM_ERROR and similar are deprecated. Use drm_dev based logging.
Link:
https://lore.kernel.org/r/20250821130356.883553-1-raphael.gallais-...@foss.st.com
Signed-off-by: Raphael
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 13:09, Raphael Gallais-Pou a écrit :
Enable the following IPs on stm32mp257f-ev1 in order to get display:
* LTDC
* LVDS
* WSVGA LVDS panel (1024x600)
* Panel LVDS backlight as GPIO backlight
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 13:09, Raphael Gallais-Pou a écrit :
Make the syscfg node a clock provider so clock consumers can reach child
clocks through device-tree.
Signed-off-by: Raphael Gallais-Pou
---
arch/arm64/boot/dts/st/stm32mp251
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 13:09, Raphael Gallais-Pou a écrit :
The LVDS is used on STM32MP2 as a display interface.
Add the LVDS node.
Signed-off-by: Raphael Gallais-Pou
---
arch/arm64/boot/dts/st/stm32mp255.dtsi | 14 +-
1
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 13:09, Raphael Gallais-Pou a écrit :
Add the LTDC node for stm32mp255 SoC and handle its loopback clocks.
ck_ker_ltdc has the CLK_SET_RATE_PARENT flag. While having this flag is
semantically correct, it for now
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 13:08, Raphael Gallais-Pou a écrit :
The LCD-TFT Display Controller (LTDC) handles display composition,
scaling and rotation. It provides a parallel digital RGB flow to be
used by display interfaces.
Add the LTDC
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 13:08, Raphael Gallais-Pou a écrit :
The LCD-TFT Display Controller (LTDC) handles display composition,
scaling and rotation. It provides a parallel digital RGB flow to be
used by display interfaces.
Add the LTDC
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 13:08, Raphael Gallais-Pou a écrit :
From: Yannick Fertre
Handle LVDS pixel clock.
The LTDC operates with multiple clock domains for register access,
requiring all clocks to be provided during read/write operations
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 13:08, Raphael Gallais-Pou a écrit :
From: Yannick Fertre
STM32MP25 SoC features a new version of the LTDC IP. Add its compatible
to the list of device to probe and implement its quirks.
This hardware supports a
Hi Raphael,
Thanks for the patch.
Reviewed-by: Yannick Fertre
Le 21/08/2025 à 13:08, Raphael Gallais-Pou a écrit :
On STM32MP25 SoC, the syscfg peripheral provides a clock to the display
subsystem through a multiplexer. Since it only provides a single clock,
the cell value is 0.
Doing so
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 13:08, Raphael Gallais-Pou a écrit :
STM32 LVDS peripheral may be in a power domain. Allow an optional
single 'power-domains' entry for STM32 LVDS devices.
Acked-by: Rob Herring (Arm)
Signed-off-by: Rapha
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 13:08, Raphael Gallais-Pou a écrit :
access-controllers is an optional property that allows a peripheral to
refer to one or more domain access controller(s).
This property is added when the peripheral is under the
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 13:08, Raphael Gallais-Pou a écrit :
properties:
compatible:
-const: st,stm32mp25-lvds
+oneOf:
+ - items:
+ - enum:
+ - st,stm32mp255-lvds
+ - const: st,stm32mp25-lvds
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 13:08, Raphael Gallais-Pou a écrit :
access-controllers is an optional property that allows a peripheral to
refer to one or more domain access controller(s).
This property is added when the peripheral is under the
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 13:08, Raphael Gallais-Pou a écrit :
The new STMicroelectronics SoC features a display controller similar to
the one used in previous SoCs. Because there is additional registers,
and different mandatory clocks it is
Hi Raphael,
Thanks for the patch.
Acked-by: Yannick Fertre
Le 21/08/2025 à 15:03, Raphael Gallais-Pou a écrit :
- DRM_DEBUG_DRIVER("\n");
+ drm_dbg_driver(ddev, "\n");
Hi Brian,
thanks for the patch.
Acked-by: Yannick Fertre
Le 11/08/2025 à 12:56, Brian Masney a écrit :
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Acked-by
Hi Brian,
thanks for the patch.
Acked-by: Yannick Fertre
Le 11/08/2025 à 12:56, Brian Masney a écrit :
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Acked-by
Hi Sean,
Tested-by: Yannick Fertre
Thanks for this patch,
Yannick
Le 25/11/2024 à 14:49, Sean Nyekjaer a écrit :
Check if the required pixel clock is in within .5% range of the
desired pixel clock.
This will match the requirement for HDMI where a .5% tolerance is allowed.
Signed-off-by
Hi Sean,
Tested-by: Yannick Fertre
Thanks for this patch,
Yannick
Le 25/11/2024 à 14:49, Sean Nyekjaer a écrit :
When using the DSI interface via DSI2LVDS bridge, it seems a bit harsh
to reguire the requested and the actual px clock to be within
50Hz. A typical LVDS display requires the px
Add "st,stm32mp25-ltdc" compatible for SOC MP25. This new SOC introduce
new clocks (bus, ref & lvds). Bus clock was separated from lcd clock.
New sources are possible for lcd clock (lvds / ref).
Signed-off-by: Yannick Fertre
---
Changes in v3: Add max/min Items fields.
'ma
Hi,
we don't give enough attention to older SOCs like stm32f469. This is an
error on our part.
I think that to fix this point it would be necessary to define the clock
hse as clock fix.
I hope to be able to release a patch before the end of August
Best regards
Yannick Fertré
Le 01/08/20
Add "st,stm32mp25-ltdc" compatible for SOC MP25. This new SOC introduce
new clocks (bus, ref & lvds). Bus clock was separated from lcd clock.
New sources are possible for lcd clock (lvds / ref).
Signed-off-by: Yannick Fertre
---
Changes in v2: Rework clock property.
.../bindi
Add "st,stm32mp25-ltdc" compatible for SOC MP25. This new SOC introduces
new clocks (bus, ref & lvds). Bus clock was separated from lcd clock.
New sources are possible for lcd clock (lvds / ref).
Signed-off-by: Yannick Fertre
---
.../bindings/display/st,stm32-ltdc.y
The reload interrupt is not used by the driver. To avoid
unnecessary calls of the interrupt routine, don't enable it.
Solve small typo and add mask to simplify the driver.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 16 ++--
1 file changed, 6 insertions(+
The purpose of this mask is to simplify writing to the lxcr
register and not to forget any fields.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
The plane's opacity should be reseted while the plane
is disabled. It prevents from seeing a possible global
or layer background color set earlier.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/stm/ltd
Hi Jiapeng,
Thanks for the patch.
Acked-by: Yannick Fertre
Best regards
Le 24/06/2024 à 04:41, Jiapeng Chong a écrit :
The function are defined in the ltdc.c file, but not called
anywhere, so delete the unused function.
drivers/gpu/drm/stm/ltdc.c:494:35: warning: unused function
complete update of the clock framework, this would
allow to use the LVDS.
Signed-off-by: Raphael Gallais-Pou
Signed-off-by: Yannick Fertre
---
Changes in v2:
- Fixed my address
- Fixed smatch warning
---
drivers/gpu/drm/stm/ltdc.c | 19 +++
drivers/gpu/drm/stm/ltdc.h
Hi Raphael,
thanks for the patch.
Acked-by: Yannick Fertre
Tested-by: Yannick Fertre
BR
Le 29/01/2024 à 11:41, Raphael Gallais-Pou a écrit :
Use RUNTIME_PM_OPS() instead of the old SET_SYSTEM_SLEEP_PM_OPS().
This means we don't need __maybe_unused on the functions.
Signed-o
Hi Raphael,
thanks for the patch.
Acked-by: Yannick Fertre
Tested-by: Yannick Fertre
BR
Le 29/01/2024 à 11:41, Raphael Gallais-Pou a écrit :
From: Yannick Fertre
Update control of clocks and supply thanks to the PM runtime
mechanism to avoid kernel crash during a system suspend
Hi Katya,
thanks for the patch.
Tested-by: Yannick Fertre
BR
Le 19/03/2024 à 14:47, Philippe CORNU - foss a écrit :
zut, déjà un acked-by de RGA...
tu confirmes que je prends?
Philippe
De : Raphael GALLAIS-POU - foss
Envoyé : lundi 26 février 2024 14
Hi Raphael,
thanks for the patch.
Acked-by: Yannick Fertre
Tested-by: Yannick Fertre
BR
Le 29/01/2024 à 11:41, Raphael Gallais-Pou a écrit :
DSISRC __
__\_
|\
pll4_p_ck ->| 1 |dsi_k
ck_dsi_
Hi Sean,
thanks for your patch.
Tested-by: Yannick Fertre
I think that a helper could be useful in simplifying this part.
This might be reworked when a new helper will be implemented.
Best regards
On 4/22/24 16:05, Sean Nyekjaer wrote:
On Fri, Mar 22, 2024 at 11:47:31AM +0100, Sean
Hi Raphael,
thanks for the patch.
Acked-by: Yannick Fertre
Best regards
On 2/26/24 11:48, Raphael Gallais-Pou wrote:
Add "st,stm32mp25-lvds" compatible.
Signed-off-by: Raphael Gallais-Pou
Reviewed-by: Conor Dooley
---
Depends on: "dt-bindings: stm32: add clocks and re
Hi Raphael,
thanks for the patch.
Acked-by: Yannick Fertre
Best regards
On 2/26/24 11:48, Raphael Gallais-Pou wrote:
The Low-Voltage Differential Signaling (LVDS) Display Interface
Transmitter handles the LVDS protocol: it maps the pixels received from
the upstream Pixel-DMA LCD-TFT Display
Hi Raphael,
thanks for the patch.
Reviewed-by: Yannick Fertre
On 4/12/23 11:25, Raphael GALLAIS-POU wrote:
Attention: Sender not authenticated
--
In ltdc_crtc_set_crc_source(), struct drm_crtc was dereferenced in a
container_of() before the
d on 16bits.
I would like to know if you use a display which resolution exceed 2048.
Best regards
Yannick Fertré
On 10/14/22 14:17, Yannick FERTRE wrote:
Hi Marek,
thanks for the patch.
Reviewed-by: Yannick Fertre
On 10/12/22 01:10, Marek Vasut wrote:
STM32MP15xx RM0436 Rev 6 "35
Hi Marek,
thanks for the patch.
Reviewed-by: Yannick Fertre
On 10/12/22 01:10, Marek Vasut wrote:
STM32MP15xx RM0436 Rev 6 "35.7.3 LTDC synchronization size configuration
register (LTDC_SSCR)" on page 1784 and onward indicates VSH and similar
bits are all [11:0] instead of [10:0]
Remove error message about scaling & replace it by a debug
message to avoid too much error.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
i
Zpos property is immutable for all hardware versions except the last
version (0x40100) which support the blending order feature
(dynamic z-order).
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/drv.c | 1 +
drivers/gpu/drm/stm/ltdc.c | 23 ---
drivers/gpu/drm/stm
All plans must be disabled before the CRTC shutdown helping
the crtc to restart from a clean situation (without unwanted
planes already enable).
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/stm/ltdc.c b
Fix issues reported by checkpatch.pl:
- Braces {} should be used on all arms
- Blank lines
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index
Support of vertical & horizontal mirroring features thanks to
the plane rotation property.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 163 -
drivers/gpu/drm/stm/ltdc.h | 1 +
2 files changed, 108 insertions(+), 56 deletions(-)
The latest hardware version (0x40100) supports a hardware threshold
register (aka FUTR) to trigger a fifo underrun interrupt.
A software threshold has been implemented for other hardware versions.
The threshold is set to 128 by default.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm
Hi Raphael,
thanks for the patch.
Acked-by: Yannick Fertre
Best regards
On 2/11/22 11:46, Raphaël Gallais-Pou wrote:
From: Raphael Gallais-Pou
This patch adds the CRC hashing feature supported by some recent hardware
versions of the LTDC. This is useful for test suite such as IGT-GPU
Hi Nathan,
Thenks for the patch.
Acked-by: Yannick Fertre
Best regards
On 2/7/22 17:53, Nathan Chancellor wrote:
Clang warns:
drivers/gpu/drm/stm/ltdc.c:625:2: warning: variable 'val' is used
uninitialized whenever switch default is taken [-Wsometimes-uninitialized]
Hi Nathan,
On 2/2/22 17:54, Nathan Chancellor wrote:
Hi Yannick,
On Wed, Dec 15, 2021 at 10:48:43PM +0100, Yannick Fertre wrote:
This patch adds the following YCbCr input pixel formats on the latest
LTDC hardware version:
1 plane (co-planar) : YUYV, YVYU, UYVY, VYUY
2 planes (semi-planar
Hello José,
thanks for your patch.
Reviewed-by: Yannick Fertre
Tested-by: Yannick Fertre
On 12/22/21 10:05 AM, José Expósito wrote:
The "drm_plane_funcs.format_mod_supported" can be removed in favor of
the default implementation.
Signed-off-by: José Expósito
---
drivers/g
This patch adds the following YCbCr input pixel formats on the latest
LTDC hardware version:
1 plane (co-planar) : YUYV, YVYU, UYVY, VYUY
2 planes (semi-planar): NV12, NV21
3 planes (full-planar): YU12=I420=DRM YUV420, YV12=DRM YVU420
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm
This feature allows the generation of any RGB pixel format.
The list of supported formats is no longer linked to the
register LXPFCR_PF, that the reason why a list of drm formats is
defined for each display controller version.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 196
Recent ltdc hardware versions offer the ability
to update a plane independently of others planes.
This is could be useful especially if a plane is
assigned to another OS.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 26 +++---
drivers/gpu/drm/stm/ltdc.h
Y0Cb, then Y1Cr, Y2Cb and so on).
* Cr is output first (Y0Cr, then Y1Cb, Y2Cr and so on).
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 44 +-
drivers/gpu/drm/stm/ltdc.h | 1 +
2 files changed, 44 insertions(+), 1 deletion(-)
diff --git a/dri
Replace the legacy register access by regmap API.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 138 ++---
drivers/gpu/drm/stm/ltdc.h | 1 +
2 files changed, 68 insertions(+), 71 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers
k to patch"drm/stm: ltdc: support of new hardware version"
(https://patchwork.freedesktop.org/patch/465207).
Yannick Fertre (5):
drm/stm: ltdc: switch to regmap
drm/stm: ltdc: add YCbCr 422 output support
drm/stm: ltdc: add per plane update support
drm/stm: ltdc: add support of
In case of using simplefb or another conflicting framebuffer,
call drm_aperture_remove_framebuffers() to remove memory allocated.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/drv.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/stm/drv.c b/drivers/gpu/drm/stm
Hi Thomas,
On 12/3/21 10:35 AM, Thomas Zimmermann wrote:
Hi
Am 03.12.21 um 09:55 schrieb Yannick Fertre:
In case of using simplefb or another conflicting framebuffer,
call drm_aperture_remove_framebuffers() to remove memory allocated.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm
Add support of new hardware version 0x40100.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 172 ++---
drivers/gpu/drm/stm/ltdc.h | 3 +-
2 files changed, 145 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu
In case of using simplefb or another conflicting framebuffer,
call drm_aperture_remove_framebuffers() to remove memory allocated.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/drv.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/stm/drv.c b/drivers/gpu/drm/stm
Probe deferred is not an error, don't print it.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/drm_bridge.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c
index c96847fc0ebc..cef0a62ef5d0 100644
Hi Raphael,
thanks for the patch.
Acked-by: Yannick Fertre
Reviewed-by: Yannick Fertre
On 9/2/21 5:30 PM, Raphael GALLAIS-POU - foss wrote:
Defines plane ordering by hard-coding an immutable Z position from the
first plane, used as primary layer, to the next ones as overlay in order
of
Hi Raphael,
thanks for the patch.
Acked-by: Yannick Fertre
Reviewed-by: Yannick Fertre
On 9/3/21 10:58 AM, Raphael GALLAIS-POU - foss wrote:
Android Hardware Composer supports alpha values applied to layers.
Enabling non-opaque layers for the STM CRTC could help offload GPU
resources for
Hi Jagan,
Sorry for the delay. Thanks for the patch.
Tested-by: Yannick Fertre
On 7/4/21 4:03 PM, Jagan Teki wrote:
Finding panel_or_bridge might vary based on associated
DSI devices like DSI panel, bridge, and I2C based DSI
bridge.
1. DSI panels and bridges will invoke the host attach
Hi Jagan,
thanks for the patch.
Tested-by: Yannick Fertre
On 7/4/21 3:59 PM, Jagan Teki wrote:
As dw-mipi-dsi supported all possible ways to find the DSI
devices. It can take multiple iterations for ltdc to find
all components attached to the DSI bridge.
The current ltdc driver failed to
Hi Raphaël,
thanks for the patch.
Tested-by: Yannick Fertre
On 6/29/21 1:58 PM, Raphael GALLAIS-POU - foss wrote:
Bugzilla ticket: https://intbugzilla.st.com/show_bug.cgi?id=60620
Gerrit patch: https://gerrit.st.com/c/mpu/oe/st/linux-stm32/+/208093/
In the LTDC driver, pm_runtime_get_sync
Hello Thomas,
thanks for the patch.
Tested-by: Yannick Fertre
Best regards
On 6/25/21 10:22 AM, Thomas Zimmermann wrote:
The field drm_device.irq_enabled is only used by legacy drivers
with userspace modesetting. Don't set it in stm.
Signed-off-by: Thomas Zimmermann
Reviewed-by: La
Hi Philippe,
I have already reviewed this patch on January 7, 2020.
(https://lore.kernel.org/dri-devel/0ab4ee45-4437-3b02-cf63-0e3b1b539...@st.com/)
Could you please review it and merge it?
Best regards
Yannick
On 5/28/21 10:05 AM, Yannick Fertre wrote:
There is not much value in the extra
There is not much value in the extra conversion step, the calculations
required for the LTDC IP are different than what is used in the
drm_display_mode_to_videomode(), so just do the right ones in the LTDC
driver right away.
Signed-off-by: Marek Vasut
Signed-off-by: Yannick Fertre
---
drivers
Tested-by: Yannick Fertre
On 2/22/21 10:23 AM, Raphael GALLAIS-POU - foss wrote:
From: Yannick Fertre
Standardize on the dev_ based logging.
Signed-off-by: Raphael Gallais-Pou
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 49 ++-
1
Tested-by: Yannick Fertre
On 2/22/21 10:22 AM, Raphael GALLAIS-POU - foss wrote:
From: Yannick Fertre
Don't print error when probe deferred error is returned.
Signed-off-by: Raphael Gallais-Pou
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 9 +++-
Hi Thomas,
I wait a few days before merging it.
Thank you for your help.
Best regards
Yannick
On 3/4/21 9:21 AM, Thomas Zimmermann wrote:
Hi,
shall I merge this patch?
Am 02.03.21 um 18:57 schrieb Jagan Teki:
STM ltdc driver uses an empty implementation for its encoder.
Replace the code wi
Thanks Jagan for the patch.
Tested-by: Yannick Fertre
On 3/2/21 6:57 PM, Jagan Teki wrote:
STM ltdc driver uses an empty implementation for its encoder.
Replace the code with the generic simple encoder.
Signed-off-by: Jagan Teki
---
drivers/gpu/drm/stm/ltdc.c | 12 ++--
1 file
Hello Jagan, I tested your patch on the stm32mp1 board.
Unfortunately, the dsi panel does not probe well with this patch. The
problem is due to the panel which is placed in the node of the dsi
bridge (no problem with i2c devices).
Regarding component bindings for stm drivers, I am currently wo
Hi Marek,
Thanks for the patch.
Tested-by: Yannick Fertre
On 1/27/21 12:07 PM, Marek Vasut wrote:
The drm_display_mode_to_videomode() does not populate DISPLAY_FLAGS_DE_LOW
or DISPLAY_FLAGS_PIXDATA_NEGEDGE flags in struct videomode. Therefore, no
matter what polarity the next bridge or
Enable CEC support for STMicroelectronics as loadable module.
Signed-off-by: Yannick Fertre
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index c5f25710fedc..05cc0607a9ad
nu
> Cc: Sam Ravnborg
> Cc: Vincent Abriou
> Cc: Yannick Fertre
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: linux-st...@st-md-mailman.stormreply.com
> To: dri-devel@lists.freedesktop.org
> ---
> drivers/gpu/drm/stm/ltdc.c | 33 +
&g
Otherwise, extract bus_flags from the connector,
> which is the display.
>
> Fixes: b759012c5fa7 ("drm/stm: Add STM32 LTDC driver")
> Signed-off-by: Marek Vasut
> Cc: Alexandre Torgue
> Cc: Antonio Borneo
> Cc: Benjamin Gaignard
> Cc: Maxime Coquelin
> Cc: Phil
Hi Marek,
On 11/5/20 10:45 AM, Marek Vasut wrote:
> On 11/5/20 10:39 AM, Daniel Vetter wrote:
>> On Wed, Nov 04, 2020 at 01:52:00PM +0100, Marek Vasut wrote:
>>> Enable runtime PM before registering the fbdev emulation and disable it
>>> afterward, otherwise register access to the LTDC IP during t
Standardize on the dev_ based logging.
Signed-off-by: Yannick Fertre
---
Changes in v2:
- restore function dsi_color_from_mipi.
- reword commit.
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 55 ++-
1 file changed, 29 insertions(+), 26 deletions(-)
diff --git
Hi Sam,
thanks for the review. I'll send a new patch with the revert of function
dsi_color_from_mipi.
Best regards
Yannick
On 9/25/20 4:51 PM, Sam Ravnborg wrote:
> Hi Yannick.
>
> On Fri, Sep 25, 2020 at 12:22:33PM +0200, Yannick Fertre wrote:
>> Standardize on the de
On 9/25/20 4:51 PM, Sam Ravnborg wrote:
> Hi Yannick.
>
> On Fri, Sep 25, 2020 at 12:22:33PM +0200, Yannick Fertre wrote:
>> Standardize on the dev_ based logging and drop the include of drm_print.h.
> The patchs filas to drop the include mentioned here.
&g
On 9/25/20 2:02 PM, Joe Perches wrote:
> On Fri, 2020-09-25 at 12:22 +0200, Yannick Fertre wrote:
>> Standardize on the dev_ based logging and drop the include of drm_print.h.
>> Remove useless dsi_color_from_mipi function.
> []
>> diff --git a/drivers/gpu/drm/stm
Compute new timings to get a framerate of 50fps with a pixel clock
@54Mhz.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/panel/panel-raydium-rm68200.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-raydium-rm68200.c
b/drivers
Standardize on the dev_ based logging and drop the include of drm_print.h.
Remove useless dsi_color_from_mipi function.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 87 ++-
1 file changed, 45 insertions(+), 42 deletions(-)
diff --git a
ff-by: Yannick Fertre
---
drivers/gpu/drm/panel/panel-orisetech-otm8009a.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
index b6e377aa1131..6ac1accade80 100644
--- a/drivers/gp
v2:
- Added my signed-off
Signed-off-by: Antonio Borneo
Signed-off-by: Yannick Fertre
---
.../gpu/drm/panel/panel-orisetech-otm8009a.c | 18 ++
1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
b/drivers/gpu/drm
The panel is able to work when dsi clock is non-continuous, thus
the system power consumption can be reduced using such feature.
Add MIPI_DSI_CLOCK_NON_CONTINUOUS to panel's mode_flags.
Signed-off-by: Antonio Borneo
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/panel/panel-raydium-rm
: Antonio Borneo
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 73 ---
1 file changed, 48 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
index 6b268f9445b3
From: Antonio Borneo
The panel is able to receive commands in LP. The current hack to
force backlight commands in HS was due to workaround an incorrect
settings on DSI controller that prevents sending LP commands while
video out was active.
Remove the hack that forces HS commands.
Signed-off-by
From: Antonio Borneo
The panel is able to work when dsi clock is non-continuous, thus
the system power consumption can be reduced using such feature.
Add MIPI_DSI_CLOCK_NON_CONTINUOUS to panel's mode_flags.
Signed-off-by: Antonio Borneo
---
drivers/gpu/drm/panel/panel-orisetech-otm8009a.c | 2
Don't print error when probe deferred error is returned.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
From: Antonio Borneo
Current code only sends LP commands in command mode.
Allows sending LP commands also in video mode by setting the
proper flag in DSI_VID_MODE_CFG.
Signed-off-by: Antonio Borneo
---
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 8
1 file changed, 8 insertions(+)
From: Antonio Borneo
Current code enables the HS clock when video mode is started or to
send out a HS command, and disables the HS clock to send out a LP
command. This is not what DSI spec specify.
Enable HS clock either in command and in video mode.
Set automatic HS clock management for panels
From: Antonio Borneo
Current code only sends LP commands in command mode.
Allows sending LP commands also in video mode by setting the
proper flag in DSI_VID_MODE_CFG.
Signed-off-by: Antonio Borneo
---
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 7 +++
1 file changed, 7 insertions(+)
/oe/st/linux-stm32/+/153242
Reviewed-by: CITOOLS
Reviewed-by: CIBUILD
Reviewed-by: Yannick FERTRE
Reviewed-by: Philippe CORNU
Tested-by: Yannick FERTRE
---
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw
/oe/st/linux-stm32/+/153242
Reviewed-by: CITOOLS
Reviewed-by: CIBUILD
Reviewed-by: Yannick FERTRE
Reviewed-by: Philippe CORNU
Tested-by: Yannick FERTRE
---
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw
From: Antonio Borneo
Current code does not properly computes the max length of LP
commands that can be send during H or V sync, and rely on static
values.
Limiting the max LP length to 4 byte during the V-sync is overly
conservative.
Relax the limit and allows longer LP commands (16 bytes) to be
On 3/9/20 12:57 PM, Marek Vasut wrote:
> On 3/9/20 11:35 AM, Yannick FERTRE wrote:
>> Hello Marek,
>
> Hi,
>
> (please stop top-posting)
>
>> Thank for your patch. Pm_runtime_put_sync is also done into function
>> ltdc_crtc_mode_fixup.
>> To avo
It is not necessary to suspend or stop the ltdc clocks
to modify the pixel clock.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 16
1 file changed, 16 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 3f590d916e91
Hello Angelo,
thanks for the patch.
Tested-by: Yannick Fertre
Tested OK on STM32MP1-DISCO, DSI v1.31
Best regards
On 4/6/20 3:49 PM, Angelo Ribeiro wrote:
> Add support for the video pattern generator (VPG) BER pattern mode and
> configuration in runtime.
>
> This enables using
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