On Mi, 2025-08-06 at 10:58 +0200, Christian König wrote:
> On 31.07.25 07:36, Philipp Zabel wrote:
> > This is an attempt at fixing amd#2295 [1]:
> >
> > On an AMD Rembrandt laptop with 680M iGPU and 6700S dGPU, calling
> > vkEnumeratePhysicalDevices() wakes up the
On Thu, Jul 31, 2025 at 9:38 PM Alex Deucher wrote:
> On Thu, Jul 31, 2025 at 3:33 AM Philipp Zabel
> wrote:
> >
> > Don't wake the GPU if libdrm queries the mmGB_ADDR_CONFIG register
> > value during amdgpu_query_gpu_info_init(). Instead, return the
code it.
>
> Signed-off-by: Maíra Canal
Reviewed-by: Philipp Zabel
regards
Philipp
Don't wake the GPU if the AMDGPU_INFO query doesn't need to power up the
GPU.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2295
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_
Don't wake the GPU if the SYNCOBJ_CREATE/DESTROY/WAIT ioctls are used
to detect syncobj features before the GPU is powered up.
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/2295
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 8
1 file chang
Cache the xclk rate during amdgpu_device_init() and return the cached
value in the AMDGPU_INFO_DEV_INFO query.
This will allow to avoid waking up the GPU for this query later.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2295
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/amd/amdgpu
p the dGPU during Vulkan syncobj
feature detection.
regards
Philipp
Signed-off-by: Philipp Zabel
---
Alex Deucher (1):
drm/amdgpu: don't wake up the GPU for some IOCTLs
Philipp Zabel (5):
drm/amdgpu: don't wake up the GPU when opening the device
drm/amdgpu: don&
Don't wake the GPU when opening the device. Delay amdgpu_fpriv (and
with it VM) initialization until the first IOCTL that wakes the GPU
anyway, unless it is already active.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2295
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/amd/a
Don't wake the GPU if libdrm queries the mmGB_ADDR_CONFIG register
value during amdgpu_query_gpu_info_init(). Instead, return the already
cached value adev->gfx.config.gb_addr_config.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2295
Signed-off-by: Philipp Zabel
---
drivers/gpu
Hi Maíra,
On Mo, 2025-07-28 at 09:35 -0300, Maíra Canal wrote:
> Move all resource allocation operations before actually enabling the
> clock,
This patch moves code even before requesting the clock.
But I don't think this is necessary, see below.
> as those operation don't require the GPU to be
Use https:// protocol, the git.pengutronix.de server does not support
git:// anymore.
Signed-off-by: Philipp Zabel
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index c0b444e5fd5a..466bfa901cf9 100644
--- a/MAINTAINERS
+++ b
On Fr, 2025-06-27 at 13:45 +0200, Philipp Zabel wrote:
> This series enables the vsync flush feature in the samsung-dsim driver
> unconditionally and removes the MIPI_DSI_MODE_VSYNC_FLUSH flag.
Applied to drm-misc-next.
[1/4] drm/bridge: samsung-dsim: Always flush display FIFO on vsync
On Di, 2025-05-27 at 16:21 +0200, Philipp Zabel wrote:
> Replace an open-coded goto-again construct with a while loop and a
> custom MHZ macro with the common HZ_PER_MHZ.
>
> Signed-off-by: Philipp Zabel
> ---
> Philipp Zabel (2):
> drm/bridge: samsung-ds
: Philipp Zabel
---
include/drm/drm_mipi_dsi.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index
b37860f4a895c25ef8ba1c5b3f44827ef53aa100..369b0d8830c3d14a4fc1e8e38d5fa55f04ca143e
100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm
Clearing an already-empty display FIFO should have no effect, unless
I'm missing something? With that, the MIPI_DSI_MODE_VSYNC_FLUSH flag
would not be used anymore and could be removed.
regards
Philipp
Signed-off-by: Philipp Zabel
---
Changes in v2:
- Collect Marek's Acked-by.
- Drop RFC tag.
Drop the MIPI_DSI_MODE_VSYNC_FLUSH flag from DSI mode_flags.
It has no effect anymore.
Acked-by: Marek Szyprowski
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel
pens to be located in the same register as the bits controlling
the DSI mode.
Acked-by: Marek Szyprowski
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/bridge/samsung-dsim.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/sams
Drop the MIPI_DSI_MODE_VSYNC_FLUSH flag from DSI mode_flags.
It has no effect anymore.
Acked-by: Marek Szyprowski
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel
pens to be located in the same register as the bits controlling
the DSI mode.
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/bridge/samsung-dsim.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-ds
Turn the open-coded goto-again construct into a while loop, to make
samsung_dsim_transfer_start() a bit shorter and easier to read.
Hold the spinlock when looping back around and avoid the duplicated
list_empty() check.
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/bridge/samsung-dsim.c
Drop the unused MIPI_DSI_MODE_VSYNC_FLUSH flag. Whether or not a display
FIFO flush on vsync is required to avoid sending garbage to the panel is
not a property of the DSI link, but of the integration between display
controller and DSI host bridge.
Signed-off-by: Philipp Zabel
---
include/drm
Drop the custom MHZ macro and replace it with HZ_PER_MHZ.
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/bridge/samsung-dsim.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge
Replace an open-coded goto-again construct with a while loop and a
custom MHZ macro with the common HZ_PER_MHZ.
Signed-off-by: Philipp Zabel
---
Philipp Zabel (2):
drm/bridge: samsung-dsim: use while loop in samsung_dsim_transfer_start
drm/bridge: samsung-dsim: Use HZ_PER_MHZ macro
Drop the MIPI_DSI_MODE_VSYNC_FLUSH flag from DSI mode_flags.
It has no effect anymore.
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c
b/drivers/gpu
Drop the MIPI_DSI_MODE_VSYNC_FLUSH flag from DSI mode_flags.
It has no effect anymore.
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c
b/drivers/gpu
Clearing an already-empty display FIFO should have no effect, unless
I'm missing something? With that, the MIPI_DSI_MODE_VSYNC_FLUSH flag
would not be used anymore and could be removed.
regards
Philipp
Signed-off-by: Philipp Zabel
---
Philipp Zabel (4):
drm/bridge: samsung-dsim: Always flu
On Di, 2025-03-25 at 15:27 +0100, Marek Vasut wrote:
> On 3/25/25 3:12 PM, Philipp Zabel wrote:
> > On Mo, 2025-03-24 at 20:05 +0100, Marek Vasut wrote:
> > > On 3/24/25 9:43 AM, Boris Brezillon wrote:
> > >
> > > [...]
> > >
> > > > >
On Mo, 2025-03-24 at 20:05 +0100, Marek Vasut wrote:
> On 3/24/25 9:43 AM, Boris Brezillon wrote:
>
> [...]
>
> > > @@ -563,6 +585,7 @@ int panthor_device_suspend(struct device *dev)
> > >
> > > panthor_devfreq_suspend(ptdev);
> > >
> > > + reset_control_assert(ptdev->resets);
> >
riv->map = devm_regmap_init_mmio(dev, base,
> + &th1520_reset_regmap_config);
> + if (IS_ERR(priv->map))
> + return PTR_ERR(priv->map);
> +
> + /* Initialize GPU resets to asserted state */
> + ret = regmap_update_bits(priv->map, TH1520_GPU_RST_CFG,
> + TH1520_GPU_RST_CFG_MASK, 0);
> + if (ret)
> + return ret;
> +
> + priv->rcdev.owner = THIS_MODULE;
> + priv->rcdev.nr_resets = 2;
Better use ARRAY_SIZE(th1520_resets) here, this will simplify adding
further resets in the future. With that,
Reviewed-by: Philipp Zabel
regards
Philipp
Brunet
Reviewed-by: Philipp Zabel
regards
Philipp
in the reset-eyeq probe would be redundant.
> Drop both the WARN_ON() and the device_set_of_node_from_dev() call.
> Also fix the following comment that talks about "our newfound OF node".
>
> Signed-off-by: Théo Lebrun
> Signed-off-by: Jerome Brunet
Reviewed-by: Philipp Zabel
regards
Philipp
On Mo, 2025-02-10 at 19:17 +0100, Michal Wilczynski wrote:
> On 2/4/25 18:18, Philipp Zabel wrote:
> > On Mo, 2025-02-03 at 19:15 +0100, Michal Wilczynski wrote:
[...]
> > > I think this is required because the MEM clock gate is somehow broken
> > > and marked as '
On Mo, 2025-02-03 at 19:15 +0100, Michal Wilczynski wrote:
>
> On 1/31/25 16:39, Matt Coster wrote:
> > On 28/01/2025 19:48, Michal Wilczynski wrote:
> > > Add reset controller driver for the T-HEAD TH1520 SoC that manages
> > > hardware reset lines for various subsystems. The driver currently
> >
riv->map))
> + return PTR_ERR(priv->map);
> +
> + mutex_init(&priv->gpu_seq_lock);
> +
> + priv->rcdev.owner = THIS_MODULE;
> + priv->rcdev.nr_resets = 1;
> + priv->rcdev.ops = &th1520_reset_ops;
> + priv->rcdev.of_node = dev->of_node;
>A. > + priv->rcdev.of_xlate = th1520_reset_xlate;
> + priv->rcdev.of_reset_n_cells = 1;
You could just drop these two lines again. With that,
Reviewed-by: Philipp Zabel
regards
Philipp
Hi,
On Mo, 2025-01-20 at 08:58 +0100, Thomas Zimmermann wrote:
> Hi
>
>
> Am 18.01.25 um 03:37 schrieb Marek Olšák:
> [...]
> >
> > 3) Implementing DRM_FORMAT_MOD_LINEAR as having 256B pitch and offset
> > alignment. This is what we do today. Even if Intel and some AMD chips
> > can do 64B or
On Mo, 2025-01-20 at 18:21 +0100, Michal Wilczynski wrote:
> Introduce reset controller driver for the T-HEAD TH1520 SoC. The
> controller manages hardware reset lines for various SoC subsystems, such
> as the GPU.
This statement is confusing, given the implementation only handles a
single (GPU) r
On Mo, 2025-01-20 at 18:21 +0100, Michal Wilczynski wrote:
> Add a YAML schema for the T-HEAD TH1520 SoC reset controller. This
> controller manages resets for subsystems such as the GPU within the
> TH1520 SoC.
This mentions "resets", plural, but the #reset-cells = <0> below and
the driver implem
On Mo, 2025-01-20 at 18:21 +0100, Michal Wilczynski wrote:
> Certain platforms, such as the T-Head TH1520 and Banana Pi BPI-F3,
> require a controlled GPU reset sequence during the power-up procedure
> to ensure proper initialization. Without this reset, the GPU may remain
> in an undefined state,
ute the byte size of 8 pixels in the given color
> mode and align the pitch accordingly.
>
> Signed-off-by: Thomas Zimmermann
> Cc: Philipp Zabel
> Cc: Shawn Guo
> Cc: Sascha Hauer
> Cc: Pengutronix Kernel Team
> Cc: Fabio Estevam
Reviewed-by: Philipp Zabel
regards
Philipp
t; dev_err(&pdev->dev, "Couldn't get our reset line.\n");
> ret = PTR_ERR(iommu->reset);
With dt-bindings changed to require resets on those platforms that do,
Reviewed-by: Philipp Zabel
regards
Philipp
On Fr, 2024-11-08 at 14:00 +, LECOINTRE Philippe wrote:
> Add optional reset support which is mentioned in vivante,gc.yaml to
> allow the driver to work on SoCs whose reset signal is asserted by default
> Avoid enabling the interrupt until everything is ready
>
> Signed-off-by: Philippe Lecoin
On Mo, 2024-11-25 at 22:07 +0530, Parthiban Nallathambi wrote:
> On some platforms like Allwinner A133 with GE8300 includes
> reset control from reset control unit. Add reset control
> optionally from the devicetree.
>
> Signed-off-by: Parthiban Nallathambi
> ---
> drivers/gpu/drm/imagination/pv
On Mi, 2024-10-09 at 17:04 +0300, Jani Nikula wrote:
> The imx.h header does not forward declare the types it uses, and the
> header is not self-contained. Fix it.
>
> Fixes: cc3e8a216d6b ("drm/imx: add internal bridge handling display-timings
> DT node")
> Cc:
On Do, 2024-10-03 at 16:57 +0200, Marek Vasut wrote:
> On 9/26/24 1:16 PM, Philipp Zabel wrote:
> > On Mi, 2024-09-25 at 22:45 +0200, Marek Vasut wrote:
> > [...]
> > > > The driver is not taking ownership of prev_buf, only curr_buf is
> > > > guaranteed to
On Mi, 2024-06-26 at 16:40 +0200, Philipp Zabel wrote:
> We can use horizontal and vertical flipping via the MIPI DCS address
> mode to rotate the display by 180° using the device tree "rotation"
> property. Since the tl050hdv35 panel has been defined as rotated,
> we have to
On Mi, 2024-09-25 at 22:45 +0200, Marek Vasut wrote:
[...]
> > The driver is not taking ownership of prev_buf, only curr_buf is guaranteed
> > to
> > exist until v4l2_m2m_job_finish() is called. Usespace could streamoff,
> > allocate
> > new buffers, and then an old freed buffer may endup being u
Hi,
On Mi, 2024-09-25 at 22:14 +0200, Marek Vasut wrote:
> The userspace could distribute the frames between the two devices in an
> alternating manner, can it not ?
This doesn't help with latency, or when converting a single large
frame.
For the deinterlacer, this can't be done with the motion
On Di, 2024-09-24 at 12:47 +0200, Marek Vasut wrote:
> On 9/4/24 11:05 AM, Philipp Zabel wrote:
> > On Mi, 2024-07-24 at 02:19 +0200, Marek Vasut wrote:
> > > The 'code' parameter only ever selects between YUV 4:2:0 and 4:2:2
> > > subsampling, turn it in
Hi,
On Di, 2024-09-24 at 17:28 +0200, Marek Vasut wrote:
> On 9/6/24 11:01 AM, Philipp Zabel wrote:
[...]
> > Instead of presenting two devices to userspace, it would be better to
> > have a single video device that can distribute work to both IPUs.
>
> Why do you t
quest irq only after adding the
> crtc")
> Reviewed-by: Dmitry Baryshkov
> Signed-off-by: Jinjie Ruan
Reviewed-by: Philipp Zabel
regards
Philipp
mas Zimmermann
> Cc: Philipp Zabel
> Cc: Shawn Guo
> Cc: Sascha Hauer
> Cc: Pengutronix Kernel Team
> Cc: Fabio Estevam
> Acked-by: Javier Martinez Canillas
Acked-by: Philipp Zabel
regards
Philipp
On Fr, 2024-09-06 at 14:35 +0300, Dmitry Baryshkov wrote:
> On Fri, 6 Sept 2024 at 09:39, Alexander Stein
> wrote:
> >
> > When drm/bridge-connector was moved to DRM_DISPLAY_HELPER not all
> > users were updated. Add missing Kconfig selections.
> >
> > Fixes: 9da7ec9b19d8 ("drm/bridge-connector:
9da7ec9b19d8 ("drm/bridge-connector: move to DRM_DISPLAY_HELPER
> > module")
> > Signed-off-by: Alexander Stein
> > ---
> > drivers/gpu/drm/imx/ipuv3/Kconfig | 2 ++
> > 1 file changed, 2 insertions(+)
>
> Reviewed-by: Dmitry Baryshkov
>
>
ce to
`devm_imx_drm_legacy_bridge'
Reported-by: kernel test robot
Closes:
https://lore.kernel.org/oe-kbuild-all/202409060118.z8bxmg7z-...@intel.com/
Fixes: f94b9707a1c9 ("drm/imx: parallel-display: switch to imx_legacy_bridge /
drm_bridge_connector")
Signed-off-by: Philipp Zabel
ongerbeam and from the
> IPUv3 CSC Scaler mem2mem driver.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Daniel Vetter
> Cc: David Airlie
> Cc: Fabio Estevam
> Cc: Greg Kroah-Hartman
> Cc: Helge Deller
> Cc: Mauro Carvalho Chehab
> Cc: Pengutronix Kernel T
27;d prefer this to be an enum ipu_chroma_subsampling or similar,
instead of a boolean. Otherwise,
Reviewed-by: Philipp Zabel
regards
Philipp
On Sa, 2024-07-13 at 17:35 +0200, Marek Vasut wrote:
> Neither ipu_image_convert_sync() nor ipu_image_convert() is used or call
> from anywhere. Remove this unused code.
>
> Signed-off-by: Marek Vasut
Thank you,
Reviewed-by: Philipp Zabel
regards
Philipp
On Do, 2024-07-04 at 13:21 +, Abhinav Jain wrote:
> Add cleanup attribute for device node prg_node.
> Remove of_node_put for device node prg_node as it is unnecessary now.
>
> Suggested-by: Julia Lawall
> Signed-off-by: Abhinav Jain
Thank you,
Reviewed-by: Philipp Zabel
regards
Philipp
width = ipu_src_rect_width(new_state);
> else
> width = drm_rect_width(&new_state->src) >> 16;
>
> base-commit: 431c1646e1f86b949fa3685efc50b660a364c2b6
Thank you,
Reviewed-by: Philipp Zabel
regards
Philipp
On So, 2024-06-02 at 15:04 +0300, Dmitry Baryshkov wrote:
> The imx-tve driver is the only remaining user of
> imx_drm_connector_destroy(). Move the function to imx-tve.c
>
> Signed-off-by: Dmitry Baryshkov
Reviewed-by: Philipp Zabel
regards
Philipp
drm_connector on their own.
Tested-by: Philipp Zabel # on imx6q-nitrogen6x
regards
Philipp
ridge
> doesn't support creating connector at all. Switch to
> drm_bridge_connector at the same time.
>
> Signed-off-by: Dmitry Baryshkov
Reviewed-by: Philipp Zabel
regards
Philipp
ridge
> doesn't support creating connector at all. Switch to
> drm_bridge_connector at the same time.
>
> Signed-off-by: Dmitry Baryshkov
Reviewed-by: Philipp Zabel
regards
Philipp
On So, 2024-06-02 at 15:04 +0300, Dmitry Baryshkov wrote:
> Defer panel handling to drm_panel_bridge, unifying codepaths for the
> panel and bridge cases.
>
> Signed-off-by: Dmitry Baryshkov
Reviewed-by: Philipp Zabel
regards
Philipp
r supporting the latter usecase. It will be used by both LDB and
> parallel-display drivers.
>
> Signed-off-by: Dmitry Baryshkov
Reviewed-by: Philipp Zabel
regards
Philipp
On So, 2024-06-02 at 15:04 +0300, Dmitry Baryshkov wrote:
> Defer panel handling to drm_panel_bridge, unifying codepaths for the
> panel and bridge cases. The MFD_SYSCON symbol is moved to select to
> prevent Kconfig symbol loops.
>
> Signed-off-by: Dmitry Baryshkov
Reviewed-by
Hi Dmitry,
On Sa, 2024-07-27 at 14:17 +0300, Dmitry Baryshkov wrote:
> On Sun, Jun 02, 2024 at 03:04:40PM GMT, Dmitry Baryshkov wrote:
> > The IPUv3 DRM i.MX driver contains several codepaths for different
> > usescases: both LDB and paralllel-display drivers handle next-bridge,
> > panel and the
draw. Using this debug register we can extend the timeout as long as the
> draw progresses.
>
> Signed-off-by: Lucas Stach
Reviewed-by: Philipp Zabel
regards
Philipp
On Mo, 2024-07-01 at 19:14 +0200, Lucas Stach wrote:
> This exposes a accumulated GPU active time per client via the
> fdinfo infrastructure.
>
> Signed-off-by: Lucas Stach
> ---
> v2:
> - new patch
> ---
> drivers/gpu/drm/etnaviv/etnaviv_drv.c | 32 ++-
> 1 file changed,
draw. Using this debug register we can extend the timeout as long as the
> draw progresses.
>
> Signed-off-by: Lucas Stach
Reviewed-by: Philipp Zabel
regards
Philipp
On Fr, 2024-06-28 at 12:47 +0200, Lucas Stach wrote:
> Update state_hi.xml.h header from etna_viv commit
> 8f43a34fd9cd ("rndb: document FE current primitve debug reg")
>
> Signed-off-by: Lucas Stach
Reviewed-by: Philipp Zabel
regards
Philipp
On Fr, 2024-06-28 at 12:47 +0200, Lucas Stach wrote:
> The next changes will introduce another place where the debug registers
> need to be en-/disabled. Split into separate functions, so we don't need
> to replicate the code there. Also allow those calls to nest, keeping
> the debug registers enab
The Ilitek IL9881C controller can rotate the image by 180°. This
might be desirable on devices with their display mounted upside down,
that don't have rotation capability in the SoC display controller.
Signed-off-by: Philipp Zabel
---
Philipp Zabel (2):
drm/panel: ilitek-ili
Assume a default RGB subpixel order and flip it around if 180° rotation
is configured via address mode. Report subpixel order to userspace.
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm
We can use horizontal and vertical flipping via the MIPI DCS address
mode to rotate the display by 180° using the device tree "rotation"
property. Since the tl050hdv35 panel has been defined as rotated,
we have to invert the bits there.
Signed-off-by: Philipp Zabel
---
drivers/gpu
> Get a single timestamp when the IRQ handler has determined that
> there are completed jobs and reuse this for all fences that get
> signalled by the handler.
>
> Signed-off-by: Lucas Stach
Reviewed-by: Philipp Zabel
regards
Philipp
eset the GPU.
>
> As the current job is already removed from the pending list and
> will not be put back when drm_sched_start() isn't called, we must
> make sure to put the job back on the pending list when extending
> the timeout.
>
> Cc: sta...@vger.kernel.org #6.0
> Signed-off-by: Lucas Stach
Reviewed-by: Philipp Zabel
regards
Philipp
Lucas Stach
Reviewed-by: Philipp Zabel
regards
Philipp
oop, potentially
> impacting the overall system latency, use a wait loop with a fixed
> max number of iterations, so time spent away from the CPU is not
> accounted against the timeout budget.
>
> Signed-off-by: Lucas Stach
Reviewed-by: Philipp Zabel
regards
Philipp
indow.
>
> Signed-off-by: Lucas Stach
Reviewed-by: Philipp Zabel
regards
Philipp
On Sa, 2024-04-27 at 10:20 +0530, R Sundar wrote:
> use the new cleanup magic to replace of_node_put() with
> __free(device_node) marking to auto release when they get out of scope.
>
> Suggested-by: Julia Lawall
> Signed-off-by: R Sundar
Reviewed-by: Philipp Zabel
regards
Philipp
the imx-ldb driver.
>
> Signed-off-by: Dmitry Baryshkov
Reviewed-by: Philipp Zabel
regards
Philipp
hkov
Reviewed-by: Philipp Zabel
regards
Philipp
_firmware by using DRM_LOAD_EDID_FIRMWARE. In all other cases
> EDID and/or modes are to be provided as a part of the panel driver.
>
> Drop support for the edid property.
>
> Signed-off-by: Dmitry Baryshkov
Reviewed-by: Philipp Zabel
regards
Philipp
On So, 2024-03-31 at 23:29 +0300, Dmitry Baryshkov wrote:
> Drop unused defines and obsolete prototypes from the imx-drm.h header.
>
> Signed-off-by: Dmitry Baryshkov
Reviewed-by: Philipp Zabel
regards
Philipp
On So, 2024-03-31 at 23:29 +0300, Dmitry Baryshkov wrote:
> Defer panel handling to drm_panel_bridge, unifying codepaths for the
> panel and bridge cases.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/imx/ipuv3/Kconfig| 2 ++
> drivers/gpu/drm/imx/ipuv3/parallel-displa
On So, 2024-03-31 at 23:29 +0300, Dmitry Baryshkov wrote:
> Use the imx_legacy bridge driver instead of handlign display modes via
> the connector node.
>
> All existing usecases already support attaching using
> the DRM_BRIDGE_ATTACH_NO_CONNECTOR flag, while the imx_legacy bridge
> doesn't suppor
On So, 2024-03-31 at 23:29 +0300, Dmitry Baryshkov wrote:
> Defer panel handling to drm_panel_bridge, unifying codepaths for the
> panel and bridge cases.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/imx/ipuv3/Kconfig | 2 ++
> drivers/gpu/drm/imx/ipuv3/imx-ldb.c | 44
> ++
Hi Dmitry,
On Mi, 2024-04-17 at 00:58 +0300, Dmitry Baryshkov wrote:
> On Sun, Mar 31, 2024 at 11:28:57PM +0300, Dmitry Baryshkov wrote:
> > The IPUv3 DRM i.MX driver contains several codepaths for different
> > usescases: both LDB and paralllel-display drivers handle next-bridge,
> > panel and th
On Fr, 2024-05-17 at 16:09 +0200, Sefa Eyeoglu wrote:
> The Bigscreen Beyond VR headset is a non-desktop output and should be
> marked as such using an EDID quirk.
>
> Closes https://gitlab.freedesktop.org/drm/misc/kernel/-/issues/39
>From the EDID posted there, it looks like the quirk should not
On Do, 2024-05-16 at 19:20 +0200, Lucas Stach wrote:
> Am Freitag, dem 26.01.2024 um 17:46 +0100 schrieb Lucas Stach:
> > The etnaviv devcoredump is created in the GPU reset path, which
> > must make forward progress to avoid stalling memory reclaim on
> > unsignalled dma fences. The currently used
> are converted, .remove_new() will be renamed to .remove().
>
> Trivially convert the ipu-v3 platform drivers from always returning zero
> in the remove callback to the void returning variant.
>
> Signed-off-by: Uwe Kleine-König
Reviewed-by: Philipp Zabel
regards
Philipp
Hi Louis,
On Mi, 2024-03-13 at 18:45 +0100, Louis Chauvet wrote:
> From: Arthur Grillo
>
> Add support to the YUV formats bellow:
>
> - NV12/NV16/NV24
> - NV21/NV61/NV42
> - YUV420/YUV422/YUV444
> - YVU420/YVU422/YVU444
>
> The conversion from yuv to rgb is done with fixed-point arithmetic, us
On Fr, 2024-03-08 at 18:03 +0200, Jani Nikula wrote:
> The .get_modes() hooks aren't supposed to return negative error
> codes. Return 0 for no modes, whatever the reason.
>
> Cc: Philipp Zabel
> Cc: sta...@vger.kernel.org
> Signed-off-by: Jani Nikula
Acked-by: Philipp Zabel
regards
Philipp
On Do, 2024-01-25 at 17:14 +0100, Christian Gmeiner wrote:
> >
> > Update the state HI header from the rnndb commit
> > 8d7ee714cfe2 ("Merge pull request #24 from pH5/unknown-3950").
> >
> > Signed-off-by: Philipp Zabel
>
> You missed my R-b from
The vendor kernel sets a previously unknown clock gating bit in the
VIVS_PM_MODULE_CONTROLS register to disable SH_EU clock gating.
Import new headers from rnndb for the definition and set the bit
for the VIPNano-Si+ NPU on i.MX8MP and other affected cores.
Signed-off-by: Philipp Zabel
Update the state HI header from the rnndb commit
8d7ee714cfe2 ("Merge pull request #24 from pH5/unknown-3950").
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/etnaviv/cmdstream.xml.h | 52 ++--
drivers/gpu/drm/etnaviv/common.xml.h| 12 ++--
drivers/gpu/d
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index c61d50dd3829..c669419b3ae3 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b
. For example, model 0x8000 NPUs are called VIPNano-QI/SI(+)
by VeriSilicon.
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 66 ++-
1 file changed, 34 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
b
Update the state HI header from the rnndb commit
8d7ee714cfe2 ("Merge pull request #24 from pH5/unknown-3950").
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/etnaviv/cmdstream.xml.h | 52 ++--
drivers/gpu/drm/etnaviv/common.xml.h| 12 ++--
drivers/gpu/d
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