.kernel.org
> Signed-off-by: Thomas Hellström
> Reviewed-by: Christian König
Acked-by: Nirmoy Das
> ---
> MAINTAINERS | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4dbf6a03e416..7a032ea9f109 100644
> --- a/MAINTAINERS
>
1b ("drm/sched: Use drm sched lockdep map for submit_wq")
> Fixes: a6149f039369 ("drm/sched: Convert drm scheduler to use a work queue
> rather than kthread")
> Signed-off-by: Matthew Brost
Acked-by: Nirmoy Das
Looks like Xe has a dependency on this now that xe->ordered_
[<2c457ad7>] ret_from_fork+0x10/0x20
> ..
>
> Fix it by calling ttm_tt_fini() in the exit function.
>
> Cc: sta...@vger.kernel.org
> Fixes: e6f7c641fae3 ("drm/ttm/tests: Add tests for ttm_tt")
> Signed-off-by: Jinjie Ruan
R
ve swapped objects off the manager's LRU
> list")
> Signed-off-by: Thomas Hellström
Reviewed-by: Nirmoy Das
> ---
> include/drm/ttm/ttm_device.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/drm/ttm/ttm_device.h b/include/drm/t
ate to true only when
> `snapshot->copy` is not Null.
> This issue was reported by Coverity Scan.
>
> Signed-off-by: Everest K.C.
Fixes: d8ce1a977226 ("drm/xe/guc: Use a two stage dump for GuC logs and add
more info")
Reviewed-by: Nirmoy Das
> ---
> drivers
On 10/2/2024 3:16 PM, Matthew Brost wrote:
> Now that drm sched uses a single lockdep map for all submit_wq, drop the
> GuC submit_wq pool hack.
>
> Signed-off-by: Matthew Brost
Reviewed-by: Nirmoy Das
> ---
> drivers/gpu/drm/xe/xe_guc_submit.c | 60 +--
> Cc: Christian König
> Signed-off-by: Matthew Brost
LGTM
Reviewed-by: Nirmoy Das
> ---
> drivers/gpu/drm/scheduler/sched_main.c | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/scheduler/sched_main.c
> b/drivers/gpu/drm/scheduler/sc
rove job distribution with multiple
> queues")
> Cc: Nirmoy Das
> Cc: Christian König
> Cc: Luben Tuikov
> Cc: Matthew Brost
> Cc: David Airlie
> Cc: Daniel Vetter
> Cc: dri-devel@lists.freedesktop.org
> Cc: # v5.9+
Reviewed-by: Nirmoy Das
> ---
> driv
On 8/28/2024 11:11 AM, Thomas Hellström wrote:
Hi,
On Wed, 2024-08-28 at 10:36 +0200, Nirmoy Das wrote:
This optimization relied on having to clear CCS on allocations.
If there is no need to clear CCS on allocations then this would
mostly
help in reducing CPU utilization.
Revert this patch
Hi Thomas,
On 8/28/2024 10:09 AM, Thomas Hellström wrote:
On Wed, 2024-08-21 at 11:50 +0200, Nirmoy Das wrote:
Currently XE lacks clean-on-free implementation so using
TTM_TT_FLAG_CLEARED_ON_FREE is invalid. Remove usage of
TTM_TT_FLAG_CLEARED_ON_FREE and limit gpu system page clearing
only
Remove TTM_TT_FLAG_CLEARED_ON_FREE now that XE stopped using this
flag.
This reverts commit decbfaf06db05fa1f9b33149ebb3c145b44e878f.
Cc: Christian König
Cc: Himal Prasad Ghimiray
Cc: Lucas De Marchi
Cc: Matthew Auld
Cc: Matthew Brost
Cc: Thomas Hellström
Signed-off-by: Nirmoy Das
This optimization relied on having to clear CCS on allocations.
If there is no need to clear CCS on allocations then this would mostly
help in reducing CPU utilization.
Revert this patch at this moment because of:
1 Currently Xe can't do clear on free and using a invalid ttm flag,
TTM_TT_FLAG_CLEA
On 8/28/2024 10:12 AM, Thomas Hellström wrote:
On Wed, 2024-08-28 at 10:09 +0200, Thomas Hellström wrote:
On Wed, 2024-08-21 at 11:50 +0200, Nirmoy Das wrote:
Currently XE lacks clean-on-free implementation so using
TTM_TT_FLAG_CLEARED_ON_FREE is invalid. Remove usage of
On 8/21/2024 10:08 AM, Thomas Hellström wrote:
On Wed, 2024-08-21 at 09:47 +0200, Christian König wrote:
Am 20.08.24 um 18:46 schrieb Nirmoy Das:
Hi Thomas, Christian,
On 8/20/2024 5:47 PM, Christian König wrote:
Am 20.08.24 um 17:45 schrieb Thomas Hellström:
On Tue, 2024-08-20 at 17:30
Remove TTM_TT_FLAG_CLEARED_ON_FREE now that XE stopped using this
flag.
This reverts commit decbfaf06db05fa1f9b33149ebb3c145b44e878f.
Cc: Christian König
Cc: Himal Prasad Ghimiray
Cc: Matthew Auld
Cc: Matthew Brost
Cc: Thomas Hellström
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/ttm
: Nirmoy Das
---
drivers/gpu/drm/xe/xe_bo.c | 27 +++
1 file changed, 19 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 6ed0e1955215..a18408d5d185 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe
Hi Thomas, Christian,
On 8/20/2024 5:47 PM, Christian König wrote:
Am 20.08.24 um 17:45 schrieb Thomas Hellström:
On Tue, 2024-08-20 at 17:30 +0200, Christian König wrote:
Am 20.08.24 um 15:33 schrieb Thomas Hellström:
Hi, Nirmoy, Christian
On Fri, 2024-08-16 at 15:51 +0200, Nirmoy Das
On 8/20/2024 3:33 PM, Thomas Hellström wrote:
Hi, Nirmoy, Christian
On Fri, 2024-08-16 at 15:51 +0200, Nirmoy Das wrote:
Add TTM_TT_FLAG_CLEARED_ON_FREE, which DRM drivers can set before
releasing backing stores if they want to skip clear-on-free.
Cc: Matthew Auld
Cc: Thomas Hellström
On 8/19/2024 1:05 PM, Matthew Auld wrote:
On 16/08/2024 14:51, Nirmoy Das wrote:
On LNL because of flat CCS, driver creates migrates job to clear
CCS meta data. Extend that to also clear system pages using GPU.
Inform TTM to allocate pages without __GFP_ZERO to avoid double page
clearing by
em BW from CPU.
Cc: Himal Prasad Ghimiray
Cc: Matthew Auld
Cc: Matthew Brost
Cc: "Thomas Hellström"
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/xe/xe_bo.c | 26 --
drivers/gpu/drm/xe/xe_device_types.h | 2 ++
drivers/gpu/drm/xe/xe_ttm_
Add TTM_TT_FLAG_CLEARED_ON_FREE, which DRM drivers can set before
releasing backing stores if they want to skip clear-on-free.
Cc: Matthew Auld
Cc: Thomas Hellström
Suggested-by: Christian König
Signed-off-by: Nirmoy Das
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_pool.c | 18
, it meant the w/a was not actually active. So fix that.
Fixes: 104bcfae57d8 ("drm/i915/arl: Enable Wa_14019159160 for ARL")
Cc: John Harrison
Cc: Vinay Belgaumkar
Cc: Daniele Ceraolo Spurio
Cc: Andi Shyti
Cc: Lucas De Marchi
Cc: Rodrigo Vivi
Cc: Matt Roper
Cc: Jonathan Cavitt
Cc: Nir
On 8/7/2024 12:05 PM, Andi Shyti wrote:
In preparation for the upcoming partial memory mapping feature,
we want to make sure that when looking for a node we consider
also the offset and not just the starting address of the virtual
memory node.
Signed-off-by: Andi Shyti
Reviewed-by: Nirmoy
inning
of the object.
Based on a patch by Chris Wilson.
Signed-off-by: Andi Shyti
Cc: Chris Wilson
Cc: Lionel Landwerlin
Reviewed-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 4 +++-
drivers/gpu/drm/i915/i915_mm.c | 12 +++-
drivers/gpu/drm/i
On 7/22/2024 9:50 AM, Matthew Brost wrote:
On Fri, Jul 19, 2024 at 11:55:06AM +0200, Nirmoy Das wrote:
Not a complete review, just a few comments.
On LNL because of flat CCS, driver creates a migrate job to clear
CCS meta data. Extend that to also clear system pages using GPU.
Inform TTM to
anges needed.
v3: Fix Kunit test.
v4: handle data leak on cpu mmap(Thomas)
v5: s/gpu_page_clear/gpu_page_clear_sys and move setting
it to xe_ttm_sys_mgr_init() and other nits (Matt Auld)
Cc: Himal Prasad Ghimiray
Cc: Matthew Auld
Cc: Matthew Brost
Cc: "Thomas Hellström"
Signed-off
to
xe_migrate.h. other nits(Matt B)
Cc: Himal Prasad Ghimiray
Cc: Matthew Auld
Cc: Matthew Brost
Cc: "Thomas Hellström"
Signed-off-by: Nirmoy Das
Signed-off-by: Akshata Jahagirdar
---
drivers/gpu/drm/xe/tests/xe_bo.c | 3 ++-
drivers/gpu/drm/xe/tests/xe_migr
Add TTM_TT_FLAG_CLEARED_ON_FREE, which DRM drivers can set before
releasing backing stores if they want to skip clear-on-free.
Cc: Matthew Auld
Cc: Thomas Hellström
Suggested-by: Christian König
Signed-off-by: Nirmoy Das
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_pool.c | 18
On 7/18/2024 6:27 PM, Matthew Auld wrote:
On 04/07/2024 09:18, Nirmoy Das wrote:
On LNL because of flat CCS, driver creates a migrate job to clear
CCS meta data. Extend that to also clear system pages using GPU.
Inform TTM to allocate pages without __GFP_ZERO to avoid double page
clearing by
On 7/18/2024 6:40 PM, Matthew Auld wrote:
On 04/07/2024 09:18, Nirmoy Das wrote:
Clearing bo with uncompress PTE will trigger a CCS clearing as well
for XE2, so skip emit_copy_ccs() when on xe2 when clearing bo.
v2: When clearing BO, CCS clear happens with all command as long
as PTEs
On 7/4/2024 10:18 AM, Nirmoy Das wrote:
Clearing bo with uncompress PTE will trigger a CCS clearing as well
for XE2, so skip emit_copy_ccs() when on xe2 when clearing bo.
v2: When clearing BO, CCS clear happens with all command as long
as PTEs are uncompress.
Cc: Himal Prasad Ghimiray
Gentle reminder!
On 7/4/2024 10:18 AM, Nirmoy Das wrote:
On LNL because of flat CCS, driver creates a migrate job to clear
CCS meta data. Extend that to also clear system pages using GPU.
Inform TTM to allocate pages without __GFP_ZERO to avoid double page
clearing by clearing out
n cpu mmap(Thomas)
Cc: Himal Prasad Ghimiray
Cc: Matthew Auld
Cc: "Thomas Hellström"
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/xe/xe_bo.c | 25 -
drivers/gpu/drm/xe/xe_device.c | 7 +++
drivers/gpu/drm/xe/xe_device_types.h | 2 ++
ström"
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/xe/xe_migrate.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index e0a3f6921572..cc8beed2bf8e 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/d
Add TTM_TT_FLAG_CLEARED_ON_FREE, which DRM drivers can set before
releasing backing stores if they want to skip clear-on-free.
Cc: Matthew Auld
Cc: Thomas Hellström
Suggested-by: Christian König
Signed-off-by: Nirmoy Das
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_pool.c | 18
Parameterize clearing ccs and bo data in xe_migrate_clear() which higher
layers can utilize. This patch will be used later on when doing bo data
clear for igfx as well.
Cc: Himal Prasad Ghimiray
Cc: Matthew Auld
Cc: "Thomas Hellström"
Signed-off-by: Nirmoy Das
---
drivers/gpu/dr
n cpu mmap(Thomas)
Cc: Himal Prasad Ghimiray
Cc: Matthew Auld
Cc: "Thomas Hellström"
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/xe/xe_bo.c | 25 -
drivers/gpu/drm/xe/xe_device.c | 7 +++
drivers/gpu/drm/xe/xe_device_types.h | 2 ++
XE_FAST_COLOR_BLT will clear out CCS meta data when clearing bo with
uncompress PTE, so skip emit_copy_ccs() when XE_FAST_COLOR_BLT is used
to clear out a bo.
Cc: Himal Prasad Ghimiray
Cc: Matthew Auld
Cc: "Thomas Hellström"
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/xe/xe_migr
Parameterize clearing ccs and bo data in xe_migrate_clear() which higher
layers can utilize. This patch will be used later on when doing bo data
clear for igfx as well.
Cc: Himal Prasad Ghimiray
Cc: Matthew Auld
Cc: "Thomas Hellström"
Signed-off-by: Nirmoy Das
---
drivers/gpu/dr
Add TTM_TT_FLAG_CLEARED_ON_FREE, which DRM drivers can set before
releasing backing stores if they want to skip clear-on-free.
Cc: Matthew Auld
Cc: Thomas Hellström
Suggested-by: Christian König
Signed-off-by: Nirmoy Das
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_pool.c | 18
On 6/27/2024 9:55 AM, Thomas Hellström wrote:
Hi Nirmoy
On Mon, 2024-06-24 at 16:14 +0200, Nirmoy Das wrote:
On LNL because of flat CCS, driver creates a migrate job to clear
CCS meta data. Extend that to also clear system pages using GPU.
Inform TTM to allocate pages without __GFP_ZERO to
Hi Andi,
On 6/27/2024 12:04 PM, Andi Shyti wrote:
Hi Nirmoy,
On Wed, Jun 26, 2024 at 04:33:18PM +0200, Nirmoy Das wrote:
We report object allocation failures to userspace with ENOMEM
so add __GFP_NOWARN to remove superfluous oom warnings.
I think this should be the default behavior.
Yes
Hi Rodrigo,
On 6/26/2024 5:50 PM, Rodrigo Vivi wrote:
On Wed, Jun 26, 2024 at 05:36:43PM +0200, Nirmoy Das wrote:
Hi Rodrigo,
On 6/26/2024 5:24 PM, Rodrigo Vivi wrote
Hi Rodrigo,
On 6/26/2024 5:24 PM, Rodrigo Vivi wrote:
On Wed, Jun 26, 2024 at 04:33:18PM +0200, Nirmoy Das wrote:
We report object allocation failures to userspace with ENOMEM
so add __GFP_NOWARN to remove superfluous oom warnings.
Closes:https://gitlab.freedesktop.org/drm/i915/kernel
We report object allocation failures to userspace with ENOMEM
so add __GFP_NOWARN to remove superfluous oom warnings.
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4936
Cc: Andi Shyti
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/i915_scatterlist.c | 8
1 file
store-benchmark: SUCCESS (0.290s)
v2: Handle regression on dgfx(Himal)
Update commit message as no ttm API changes needed.
v3: Fix Kunit test.
Cc: Himal Prasad Ghimiray
Cc: Matthew Auld
Cc: "Thomas Hellström"
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/xe/xe_bo.c
Add TTM_TT_FLAG_CLEARED_ON_FREE, which DRM drivers can set before
releasing backing stores if they want to skip clear-on-free.
Cc: Matthew Auld
Cc: Thomas Hellström
Suggested-by: Christian König
Signed-off-by: Nirmoy Das
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_pool.c | 18
Hi Christian,
On 6/24/2024 2:21 PM, Christian König wrote:
Am 24.06.24 um 14:19 schrieb Nirmoy Das:
Hi Christian,
On 6/24/2024 1:39 PM, Christian König wrote:
Am 24.06.24 um 12:07 schrieb Nirmoy Das:
Add TTM_TT_FLAG_CLEARED_ON_FREE, which DRM drivers can set before
releasing backing stores
Hi Christian,
On 6/24/2024 1:39 PM, Christian König wrote:
Am 24.06.24 um 12:07 schrieb Nirmoy Das:
Add TTM_TT_FLAG_CLEARED_ON_FREE, which DRM drivers can set before
releasing backing stores if they want to skip clear-on-free.
Cc: Matthew Auld
Cc: Thomas Hellström
Suggested-by: Christian
Add TTM_TT_FLAG_CLEARED_ON_FREE, which DRM drivers can set before
releasing backing stores if they want to skip clear-on-free.
Cc: Matthew Auld
Cc: Thomas Hellström
Suggested-by: Christian König
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/ttm/ttm_pool.c | 18 +++---
include/drm
Hi Christian,
On 6/21/2024 4:54 PM, Christian König wrote:
Am 20.06.24 um 18:01 schrieb Nirmoy Das:
Currently ttm pool is not honoring TTM_TT_FLAG_ZERO_ALLOC flag and
clearing pages on free. It does help with allocation latency but
clearing
happens even if drm driver doesn't passes the
)
Update commit message as no ttm API changes needed.
Cc: Himal Prasad Ghimiray
Cc: Matthew Auld
Cc: "Thomas Hellström"
Signed-off-by: Nirmoy Das
O
---
drivers/gpu/drm/xe/xe_bo.c | 4
drivers/gpu/drm/xe/xe_device.c | 7 +++
drivers/gpu/drm/xe/xe_device_t
On 6/21/2024 2:08 PM, Ghimiray, Himal Prasad wrote:
On 20-06-2024 19:16, Nirmoy Das wrote:
On LNL because flat CCS, driver will create a migrate job to clear
CCS meta data. Extend that to also clear pages using GPU with new
ttm pool flag which allows offloading page clear activity to GP
On LNL because of flat CCS, driver will create a migrate job to clear
CCS meta data. Extend that to also clear pages using GPU with new
ttm pool flag which allows offloading page clear activity to GPU.
Cc: Matthew Auld
Cc: Michal Mrozek
Cc: "Thomas Hellström"
Signed-off-by:
g
Cc: "Thomas Hellström"
Cc: Matthew Auld
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/ttm/ttm_pool.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_pool.c b/drivers/gpu/drm/ttm/ttm_pool.c
index 6e1fd6985ff
Hi Christian,
On 6/20/2024 4:45 PM, Christian König wrote:
Hi Nirmoy,
Am 20.06.24 um 16:37 schrieb Nirmoy Das:
Hi Christian,
On 6/20/2024 4:08 PM, Christian König wrote:
Am 20.06.24 um 15:46 schrieb Nirmoy Das:
Clearing pages can be very slow when using CPU but GPUs can perform
this
task
Hi Christian,
On 6/20/2024 4:08 PM, Christian König wrote:
Am 20.06.24 um 15:46 schrieb Nirmoy Das:
Clearing pages can be very slow when using CPU but GPUs can perform this
task much faster. With this new pool API driver can decide if it
wants to
clear pages using GPU. This provides the
tthew Auld
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/xe/xe_bo.c | 4
drivers/gpu/drm/xe/xe_device.c | 36 +---
drivers/gpu/drm/xe/xe_device_types.h | 2 ++
drivers/gpu/drm/xe/xe_migrate.c | 6 ++---
4 files changed, 37 insertions(+), 11
x27;s
preference.
Cc: Christian Koenig
Cc: "Thomas Hellström"
Cc: Matthew Auld
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/ttm/ttm_device.c | 42 +++
drivers/gpu/drm/ttm/ttm_pool.c | 49 +---
include/drm/ttm/ttm_de
Subtest basic-store-benchmark: SUCCESS (0.328s)
Cc: Christian Koenig
Cc: "Thomas Hellström"
Cc: Matthew Auld
Nirmoy Das (2):
drm/ttm/pool: Introduce a way to skip clear on free
drm/xe/lnl: Offload system
On 6/11/2024 3:58 PM, Tvrtko Ursulin wrote:
On 10/06/2024 10:24, Nirmoy Das wrote:
Hi Andi,
On 6/7/2024 4:51 PM, Andi Shyti wrote:
The forcewake count and domains listing is multi process critical
and the uncore provides a spinlock for such cases.
Lock the forcewake evaluation section in
, below seems to be correct one.
Fixes: 9dd4b065446a ("drm/i915/gt: Move pm debug files into a gt aware
debugfs")
Cc: # v5.6+
Reviewed-by: Nirmoy Das
Regards,
Nirmoy
---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 4
1 file changed, 4 insertions(+)
diff --git a/d
On 5/24/2024 1:58 AM, Andi Shyti wrote:
Following the guidelines it takes 3 seconds to perform an FLR
reset. Let's give it a bit more slack because this time can
change depending on the platform and on the firmware
Signed-off-by: Andi Shyti
Reviewed-by: Nirmoy Das
---
Hi,
In this s
Hi Andi,
On 5/21/2024 12:56 PM, Andi Shyti wrote:
Hi Nirmoy,
On Fri, May 17, 2024 at 10:13:37PM +0200, Nirmoy Das wrote:
Hi Andi,
On 5/17/2024 9:34 PM, Andi Shyti wrote:
Hi Nirmoy,
On Fri, May 17, 2024 at 04:00:02PM +0200, Nirmoy Das wrote:
On 5/17/2024 1:25 PM, Andi
Hi Andi,
On 5/17/2024 9:34 PM, Andi Shyti wrote:
Hi Nirmoy,
On Fri, May 17, 2024 at 04:00:02PM +0200, Nirmoy Das wrote:
On 5/17/2024 1:25 PM, Andi Shyti wrote:
If we timeout while waiting for an FLR reset, there is nothing we
can do and i915 doesn't have any control on it. In any cas
he GPU
is usable without a cold reboot.
This is a serious issue and should be report as an error. I think we
need to create a HW ticket to understand
why is FLR reset fails.
Regards,
Nirmoy
and the function returns void.
We don't need to be alarmed, therefore, print the timeout
On 5/17/2024 1:53 PM, Jani Nikula wrote:
On Fri, 17 May 2024, Nirmoy Das wrote:
Hi Jani,
On 5/17/2024 9:39 AM, Jani Nikula wrote:
On Thu, 16 May 2024, Nirmoy Das wrote:
The previous commit 'commit 8d4ba9fc1c6c ("drm/i915/selftests: Pick
"previous commit" is a fairly
Hi Jani,
On 5/17/2024 9:39 AM, Jani Nikula wrote:
On Thu, 16 May 2024, Nirmoy Das wrote:
The previous commit 'commit 8d4ba9fc1c6c ("drm/i915/selftests: Pick
"previous commit" is a fairly vague reference once this gets
committed. It's not going to be "pre
ofik
Cc: Jonathan Cavitt
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c
index 65a931ea
Simplify child iteration using for_each_child macro
instead of using manual for loop. There is no functional
change.
Cc: John Harrison
Cc: Tvrtko Ursulin
Signed-off-by: Nirmoy Das
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 64 ++-
1 file changed, 33 insertions(+), 31
: 32eb6bcfdda9 ("drm/i915: Make request allocation caches global")
Also need Cc: # v5.2+
With those:
Reviewed-by: Nirmoy Das
Nirmoy
Signed-off-by: Jiasheng Jiang
---
drivers/gpu/drm/i915/i915_scheduler.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
dif
On 5/7/2024 7:10 PM, Rodrigo Vivi wrote:
On Tue, May 07, 2024 at 10:54:11AM +0200, Janusz Krzysztofik wrote:
On Tuesday, 7 May 2024 09:30:15 GMT+2 Nirmoy Das wrote:
Hi Janusz,
Just realized we need Fixes tag for this.
Fixes: 1f33dc0c1189 ("drm/i915: Remove extra multi-gt pm-refer
Hi Janusz,
Just realized we need Fixes tag for this.
Fixes: 1f33dc0c1189 ("drm/i915: Remove extra multi-gt pm-references")
Regards,
Nirmoy
On 5/6/2024 8:02 PM, Janusz Krzysztofik wrote:
This reverts commit 1f33dc0c1189efb9ae19c6fc22b64dd3e26261fb.
There was a patch supposed
est.
Restoring the extra GT0 PM wakeref removed from i915_gem_do_execbuffer()
processing path seems to fix this issue.
Closes:https://gitlab.freedesktop.org/drm/intel/-/issues/10608
Signed-off-by: Janusz Krzysztofik
Cc: Rodrigo Vivi
Cc: Nirmoy Das
Reviewed-by: Nirmoy Das
---
drivers/gpu/d
veness is limited to MTL topology.
perhaps the safer path for this case indeed. something that could be really
limited to a single platform would be better.
I agree with Rodrigo here. it would be safe revert the mentioned patch
now and think about more robust solution
later on as the issue is
are no more engines awake,
disarm the breadcrumb and go to sleep.
Fixes: 9d5612ca165a ("drm/i915/gt: Defer enabling the breadcrumb interrupt to after
submission")
Closes: https://gitlab.freedesktop.org/drm/intel/issues/10026
Signed-off-by: Chris Wilson
Cc: Andrzej Hajda
Cc: # v
Hi Andi,
On 4/23/2024 11:32 AM, Andi Shyti wrote:
Hi Nirmoy,
On Mon, Apr 22, 2024 at 10:19:51PM +0200, Nirmoy Das wrote:
Currently intel_gt_reset() kills the GuC and then resets requested
engines. This is problematic because there is a dedicated CSB FIFO
which only GuC can access and if that
i915->engine_uabi_class_count[uabi_class]++;
Shouldn't this be i915->engine_uabi_class_count[uabi_class] =
class_instance[uabi_class]; ?
What I see is that this patch mainly adding this class_instance array
and rest looks the same.
May be it make sense to add ot
-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
.../drm/i915/gt/intel_execlists_submission.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt.c| 2 +-
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 35
should be killed only after resetting
the requested engines and before calling intel_gt_init_hw().
v2: Improve commit message(John)
Cc: John Harrison
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_reset.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff
Hi John,
On 4/19/2024 1:38 AM, John Harrison wrote:
On 4/18/2024 10:10, Nirmoy Das wrote:
Currently intel_gt_reset() happens as follows:
reset_prepare() ---> Sends GDRST to GuC, GuC is in GS_MIA_IN_RESET
do_reset()
intel_gt_reset_all_engines()
*_engine_reset_prepare() -->RES
Hi John,
On 4/19/2024 1:27 AM, John Harrison wrote:
On 4/18/2024 10:10, Nirmoy Das wrote:
intel_engine_reset() not only reset a engine but also
tries to recover it so give it a proper name without
any functional changes.
Not seeing what the difference is. If this was a super low level
Hi John.
On 4/19/2024 1:27 AM, John Harrison wrote:
On 4/18/2024 10:10, Nirmoy Das wrote:
__intel_gt_reset() is really for resetting engines though
the name might suggest something else. So add two helper functions
to remove confusions with no functional changes.
Technically you only added one
_IN_RESET with FW loaded.
Fix the issue by sanitizing the GuC only after resetting requested
engines and before intel_gt_init_hw().
Note intel_uc_reset_finish() and intel_uc_reset() are nop when
guc submission is disabled.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_res
intel_engine_reset() not only reset a engine but also
tries to recover it so give it a proper name without
any functional changes.
Signed-off-by: Nirmoy Das
---
.../drm/i915/gem/selftests/i915_gem_context.c | 2 +-
.../drm/i915/gt/intel_execlists_submission.c | 2 +-
drivers/gpu/drm/i915/gt
__intel_gt_reset() is really for resetting engines though
the name might suggest something else. So add two helper functions
to remove confusions with no functional changes.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
.../drm/i915/gt
On 4/17/2024 3:03 PM, Karolina Stolarek wrote:
DRM KUnit helpers are selected automatically when TTM tests are enabled,
so there's no need to do it directly in the .kunitconfig file.
Signed-off-by: Karolina Stolarek
Reviewed-by: Nirmoy Das
---
drivers/gpu/drm/ttm/tests/.kunitconfi
calls, anyway this is:
Reviewed-by: Nirmoy Das
+
devs->drm = __drm_kunit_helper_alloc_drm_device(test, devs->dev,
sizeof(*devs->drm), 0,
DRIVER_GEM);
d circular locking issue on busyness
flush")
Signed-off-by: John Harrison
Cc: Zhanjun Dong
Cc: John Harrison
Cc: Andi Shyti
Cc: Daniel Vetter
Cc: Daniel Vetter
Cc: Rodrigo Vivi
Cc: Nirmoy Das
Cc: Tvrtko Ursulin
Cc: Umesh Nerlige Ramappa
Cc: Andrzej Hajda
Cc: Matt Roper
Cc: Jona
ded. Limit it to DG2 onwards.
I would use "Limit it to platforms that need WAs" as those WA are only
needed till 12.71, otherwise
Reviewed-by: Nirmoy Das
Fixes: 9bb66c179f50 ("drm/i915: Reserve some kernel space per vm")
Signed-off-by: Andi Shyti
Cc: Andrzej Hajda
Hi Andi,
On 3/26/2024 12:12 PM, Andi Shyti wrote:
Hi Nirmoy,
...
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index a2195e28b625..57a2dda2c3cc 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem
t, area->vm_end - area->vm_start,
- obj->mm.pages->sgl, iomap);
+ obj->mm.pages->sgl, 0, iomap);
Why don't we need partial mmap for CPU but only for GTT ?
Sounds like this also need to be cover by a IGT tests. Don't we need
the
total amount of the VM space. Add it back when the user requests
the GTT size through ioctl (I915_CONTEXT_PARAM_GTT_SIZE).
Fixes: 9bb66c179f50 ("drm/i915: Reserve some kernel space per vm")
Signed-off-by: Andi Shyti
Cc: Andrzej Hajda
Cc: Chris Wilson
Cc: Lionel Landwerlin
Cc: Micha
which is
adjusted(reduced by a page).
This patch might cause silent error as it is not removing WABB which is
using the reserved page to add dummy blt and if userspace is using that
page then it will be overwritten.
Regards,
Nirmoy
, we should be able to continue working without issues.
On 3/12/2024 3:28 PM, Andi Shyti wrote:
Hi Nirmoy,
On Tue, Mar 12, 2024 at 12:18:15PM +0100, Nirmoy Das wrote:
Caching mode is HW dependent so pick a correct one using
intel_gt_coherent_map_type().
Cc: Andi Shyti
Cc: Janusz Krzysztofik
Cc: Jonathan Cavitt
Closes: https
Caching mode is HW dependent so pick a correct one using
intel_gt_coherent_map_type().
Cc: Andi Shyti
Cc: Janusz Krzysztofik
Cc: Jonathan Cavitt
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10249
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c
fix (Rodrigo).
Signed-off-by: Janusz Krzysztofik
Cc: Nirmoy Das
Cc: Rodrigo Vivi
Reviewed-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 18 --
1 file changed, 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/
rcular locking dependency,
take care of acquiring the wakeref before VM mutex when both are needed.
v7: Add inline comments with justifications for:
- using untracked variants of intel_gt_pm_get/put() (Nirmoy),
- using async variant of _put(),
- not getting the wakeref in case of a g
On 3/5/2024 3:35 PM, Janusz Krzysztofik wrote:
This reverts commit 7a2280e8dcd2f1f436db9631287c0b21cf6a92b0, obsoleted
by "drm/i915/vma: Fix UAF on destroy against retire race".
Signed-off-by: Janusz Krzysztofik
Cc: Nirmoy Das
Reviewed-by: Nirmoy Das
---
drivers/gpu/drm/i915/
ma_pin_ww() (Rodrigo).
v4: Refresh on top of commit 5e4e06e4087e ("drm/i915: Track gt pm
wakerefs") (Andi),
- for more easy backporting, split out removal of former insufficient
workarounds and move them to separate patches (Nirmoy).
- clean up commit message and description a
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