Hi Andi,

On 3/27/2024 9:05 PM, Andi Shyti wrote:
Commit 9bb66c179f50 ("drm/i915: Reserve some kernel space per
vm") reduces the available VM space of one page in order to apply
Wa_16018031267 and Wa_16018063123.

This page was reserved indiscrimitely in all platforms even when
not needed. Limit it to DG2 onwards.

I would use "Limit it to platforms that need WAs" as those WA are only needed till 12.71,  otherwise

Reviewed-by: Nirmoy Das <nirmoy....@intel.com>


Fixes: 9bb66c179f50 ("drm/i915: Reserve some kernel space per vm")
Signed-off-by: Andi Shyti <andi.sh...@linux.intel.com>
Cc: Andrzej Hajda <andrzej.ha...@intel.com>
Cc: Chris Wilson <chris.p.wil...@linux.intel.com>
Cc: Jonathan Cavitt <jonathan.cav...@intel.com>
Cc: Nirmoy Das <nirmoy....@intel.com>
---
  drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 3 +++
  drivers/gpu/drm/i915/gt/intel_gt.c   | 6 ++++++
  drivers/gpu/drm/i915/gt/intel_gt.h   | 9 +++++----
  3 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c 
b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index 1bd0e041e15c..398d60a66410 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -961,6 +961,9 @@ static int gen8_init_rsvd(struct i915_address_space *vm)
        struct i915_vma *vma;
        int ret;
+ if (!intel_gt_needs_wa_16018031267(vm->gt))
+               return 0;
+
        /* The memory will be used only by GPU. */
        obj = i915_gem_object_create_lmem(i915, PAGE_SIZE,
                                          I915_BO_ALLOC_VOLATILE |
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
b/drivers/gpu/drm/i915/gt/intel_gt.c
index 2c6d31b8fc1a..580b5141ce1e 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -1024,6 +1024,12 @@ enum i915_map_type intel_gt_coherent_map_type(struct 
intel_gt *gt,
                return I915_MAP_WC;
  }
+bool intel_gt_needs_wa_16018031267(struct intel_gt *gt)
+{
+       /* Wa_16018031267, Wa_16018063123 */
+       return IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 55), IP_VER(12, 71));
+}
+
  bool intel_gt_needs_wa_22016122933(struct intel_gt *gt)
  {
        return MEDIA_VER_FULL(gt->i915) == IP_VER(13, 0) && gt->type == 
GT_MEDIA;
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h 
b/drivers/gpu/drm/i915/gt/intel_gt.h
index 6e7cab60834c..b5e114d284ad 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -82,17 +82,18 @@ struct drm_printer;
                  ##__VA_ARGS__);                                       \
  } while (0)
-#define NEEDS_FASTCOLOR_BLT_WABB(engine) ( \
-       IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 55), IP_VER(12, 71)) && \
-       engine->class == COPY_ENGINE_CLASS && engine->instance == 0)
-
  static inline bool gt_is_root(struct intel_gt *gt)
  {
        return !gt->info.id;
  }
+bool intel_gt_needs_wa_16018031267(struct intel_gt *gt);
  bool intel_gt_needs_wa_22016122933(struct intel_gt *gt);
+#define NEEDS_FASTCOLOR_BLT_WABB(engine) ( \
+       intel_gt_needs_wa_16018031267(engine->gt) && \
+       engine->class == COPY_ENGINE_CLASS && engine->instance == 0)
+
  static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
  {
        return container_of(uc, struct intel_gt, uc);

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