Balasubiramani
Signed-off-by: Manikandan Muralidharan
---
Changes in v2:
- Rephrase commit message and comment block
---
.../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c| 48 ---
1 file changed, 42 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
first attempts to retrieve sys_clk
If that fails,it then tries to acquire lvds_pll_clk.
Signed-off-by: Manikandan Muralidharan
Signed-off-by: Dharma Balasubiramani
---
changes in v2:
- Rephrase the comments, commit message and err logs
- Replace dev_err wwith dev_warn
- Remove Initializing sys_clk
.com: move modifications inside the
atmel_xlcdc_connector_output_lvds fn]
Signed-off-by: Manikandan Muralidharan
---
.../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c| 38 +++
1 file changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
b/drivers/gpu
.com: move modifications inside the
atmel_xlcdc_connector_output_lvds fn]
Signed-off-by: Manikandan Muralidharan
---
.../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c| 38 +++
1 file changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
b/drivers/gpu
The XLCDC IP supports DSI, parallel RGB and LVDS Display.
sys_clk(Generic clock) is used for DSI and Parallel RGB displays;
And LVDS PLL is used with LVDS displays.
obtain anyone of the clocks for the LCD to operate
Signed-off-by: Manikandan Muralidharan
Signed-off-by: Dharma Balasubiramani
subiramani
Signed-off-by: Manikandan Muralidharan
---
.../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c| 48 ---
1 file changed, 42 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index 0e
Enable the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge for
sam9x7 SoC family.
Signed-off-by: Manikandan Muralidharan
---
changes in v6:
- Rewrite commit message
---
arch/arm/configs/at91_dt_defconfig | 1 +
1 file chang
Add the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge.
Signed-off-by: Manikandan Muralidharan
---
changes in v6:
- Fixed warning reported by Kernel test robot
changes in v4:
- Fixed issues reported by kernel test robot
- rep
Add the Microchip's DSI controller wrapper driver that uses the
Synopsys DesignWare MIPI DSI host controller bridge for the SAM9X7
SoC series to the MAINTAINERS entry.
Signed-off-by: Manikandan Muralidharan
---
changes in v3:
- Drop T: section
---
MAINTAINERS | 7 +++
1 file chang
Add the 'sam9x75-mipi-dsi' compatible binding, which describes the
Microchip's specific wrapper for the Synopsys DesignWare MIPI DSI HOST
Controller for the sam9x75 series System-on-Chip (SoC) devices.
Signed-off-by: Manikandan Muralidharan
Reviewed-by: Conor Dooley
---
chang
This patch series adds support for the Microchip's MIPI DSI Controller
wrapper driver that uses the Synopsys DesignWare MIPI DSI host controller
bridge for SAM9X75 SoC series.
Changelogs are available in respective patches.
Manikandan Muralidharan (4):
dt-bindings: display: bridge: add sa
Add the 'sam9x75-mipi-dsi' compatible binding, which describes the
Microchip's specific wrapper for the Synopsys DesignWare MIPI DSI HOST
Controller for the sam9x75 series System-on-Chip (SoC) devices.
Signed-off-by: Manikandan Muralidharan
Reviewed-by: Conor Dooley
---
chang
This patch series adds support for the Microchip's MIPI DSI Controller
wrapper driver that uses the Synopsys DesignWare MIPI DSI host controller
bridge for SAM9X75 SoC series.
Changelogs are available in respective patches.
Manikandan Muralidharan (4):
dt-bindings: display: bridge: add sa
Enable the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge.
Signed-off-by: Manikandan Muralidharan
---
arch/arm/configs/at91_dt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/at91_dt_defconfig
b
Add the Microchip's DSI controller wrapper driver that uses the
Synopsys DesignWare MIPI DSI host controller bridge for the SAM9X7
SoC series to the MAINTAINERS entry.
Signed-off-by: Manikandan Muralidharan
---
changes in v3:
- Drop T: section
---
MAINTAINERS | 7 +++
1 file chang
Add the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge.
Signed-off-by: Manikandan Muralidharan
---
changes in v4:
- Fixed issues reported by kernel test robot
- replaced syscon_regmap_lookup_by_phandle
From: Cyrille Pitchen
On SoCs, like the SAM9X75, which embed the XLCDC ip, the registers that
configure the unified scaling engine were not filled with proper values.
Indeed, for YCbCr formats, the VXSCFACT bitfield of the HEOCFG25
register and the HXSCFACT bitfield of the HEOCFG27 register were
update the LCDC_ATTRE register in drm plane atomic_disable to handle
the configuration changes of each layer when a plane is disabled.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h| 3 ++-
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 17
In sam9x7 SoC where XLCDC IP is used,add support to bypass the LCDC pixel
clock divider when LCDC Generic clock is enabled.Used to match
and drive the panel requested Pixel clock.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 8 +++-
include
Add Microchip AC69T88A 5" LVDS interface (800x480) TFT LCD panel
compatible string
Signed-off-by: Manikandan Muralidharan
---
changes in v2:
- Replace microchip,ac69t88a-lvds-panel with
microchip,ac69t88a
---
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file ch
Add support for Microchip AC69T88A 5 inch TFT LCD 800x480
Display module with LVDS interface.The panel uses the Sitronix
ST7262 800x480 Display driver
Signed-off-by: Manikandan Muralidharan
Signed-off-by: Dharma Balasubiramani
---
changes in v2:
- replace microchip,ac69t88a-lvds-panel with
Add the Microchip's DSI controller wrapper driver that uses the
Synopsys DesignWare MIPI DSI host controller bridge for the SAM9X7
SoC series to the MAINTAINERS entry.
Signed-off-by: Manikandan Muralidharan
---
changes in v3:
- Drop T: section
---
MAINTAINERS | 7 +++
1 file chang
Enable the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge.
Signed-off-by: Manikandan Muralidharan
---
arch/arm/configs/at91_dt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/at91_dt_defconfig
b
Add the 'sam9x75-mipi-dsi' compatible binding, which describes the
Microchip's specific wrapper for the Synopsys DesignWare MIPI DSI HOST
Controller for the sam9x75 series System-on-Chip (SoC) devices.
Signed-off-by: Manikandan Muralidharan
---
changes in v4:
- Removed 'mi
Add the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge.
Signed-off-by: Manikandan Muralidharan
---
changes in v4:
- Fixed issues reported by kernel test robot
- replaced syscon_regmap_lookup_by_phandle
This patch series adds support for the Microchip's MIPI DSI Controller
wrapper driver that uses the Synopsys DesignWare MIPI DSI host controller
bridge for SAM9X75 SoC series.
Changelogs are available in respective patches.
Manikandan Muralidharan (4):
dt-bindings: display: bridge: add sa
Add support for Microchip AC69T88A 5 inch TFT LCD 800x480
Display module with LVDS interface.The panel uses the Sitronix
ST7262 800x480 Display driver
Signed-off-by: Manikandan Muralidharan
Signed-off-by: Dharma Balasubiramani
---
drivers/gpu/drm/panel/panel-simple.c | 28
Add Microchip AC69T88A 5" LVDS interface (800x480) TFT LCD panel
compatible string
Signed-off-by: Manikandan Muralidharan
---
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/
Add the Microchip's DSI controller wrapper driver that uses the
Synopsys DesignWare MIPI DSI host controller bridge for the SAM9X7
SoC series to the MAINTAINERS entry.
Signed-off-by: Manikandan Muralidharan
---
changes in v3:
- Drop T: section
---
MAINTAINERS | 7 +++
1 file chang
Enable the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge.
Signed-off-by: Manikandan Muralidharan
---
arch/arm/configs/at91_dt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/at91_dt_defconfig
b
Add the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge.
Signed-off-by: Manikandan Muralidharan
---
changes in v3:
- make remove callback return void
changes in v2:
- use static const with global variables
- replace dev_err
Add the 'sam9x75-mipi-dsi' compatible binding, which describes the
Microchip's specific wrapper for the Synopsys DesignWare MIPI DSI HOST
Controller for the sam9x75 series System-on-Chip (SoC) devices.
Signed-off-by: Manikandan Muralidharan
---
changes in v3:
- Describe the clock
This patch series adds support for the Microchip's MIPI DSI Controller
wrapper driver that uses the Synopsys DesignWare MIPI DSI host controller
bridge for SAM9X75 SoC series.
Changelogs are available in respective patches.
Manikandan Muralidharan (4):
dt-bindings: display: bridge: add sa
Enable the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge.
Signed-off-by: Manikandan Muralidharan
---
arch/arm/configs/at91_dt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/at91_dt_defconfig
b
Add the Microchip's DSI controller wrapper driver that uses the
Synopsys DesignWare MIPI DSI host controller bridge for the SAM9X7
SoC series to the MAINTAINERS entry.
Signed-off-by: Manikandan Muralidharan
---
changes in v3:
- Drop T: section
---
MAINTAINERS | 7 +++
1 file chang
Add the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge.
Signed-off-by: Manikandan Muralidharan
---
changes in v2:
- use static const with global variables
- replace dev_err with dev_err_probe
- move clk_prepare_enable to simplif
Add the 'sam9x75-mipi-dsi' compatible binding, which describes the
Microchip's specific wrapper for the Synopsys DesignWare MIPI DSI HOST
Controller for the sam9x75 series System-on-Chip (SoC) devices.
Signed-off-by: Manikandan Muralidharan
---
changes in v2:
- List the clocks w
This patch series adds support for the Microchip's MIPI DSI Controller
wrapper driver that uses the Synopsys DesignWare MIPI DSI host controller
bridge for SAM9X75 SoC series.
Changelogs are available in respective patches.
Manikandan Muralidharan (4):
dt-bindings: display: bridge: add sa
Enable the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge.
Signed-off-by: Manikandan Muralidharan
---
arch/arm/configs/at91_dt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/at91_dt_defconfig
b
Add the 'sam9x75-mipi-dsi' compatible binding, which describes the
Microchip's specific wrapper for the Synopsys DesignWare MIPI DSI HOST
Controller for the sam9x75 series System-on-Chip (SoC) devices.
Signed-off-by: Manikandan Muralidharan
---
.../bridge/microchip,sam9x7
Add the Microchip's DSI controller wrapper driver that uses
the Synopsys DesignWare MIPI DSI host controller bridge.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/bridge/Kconfig| 8 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/dw
Add the Microchip's DSI controller wrapper driver that uses the
Synopsys DesignWare MIPI DSI host controller bridge for the SAM9X7
SoC series to the MAINTAINERS entry.
Signed-off-by: Manikandan Muralidharan
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTA
This patch series adds support for the Microchip's MIPI DSI Controller
wrapper driver that uses the Synopsys DesignWare MIPI DSI host controller
bridge for SAM9X75 SoC series.
Manikandan Muralidharan (4):
dt-bindings: display: bridge: add sam9x75-mipi-dsi binding
drm/bridge: add Microchi
Switch the driver to use devm_gpiod_get_optional() on reset_gpio to avoid
driver probe issues when reset line is not specified.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/panel/panel-himax-hx8394.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu
Add compatible string for the Microchip's AC40T08A MIPI Display
panel.This panel uses a Himax HX8394 display controller.
The reset line is not populated and leads to driver probe issues,
thus add conditional block to narrow reset-gpio property per variant.
Signed-off-by: Manikandan Muralid
This patch series adds panel himax display controller support for the
Microchip's AC40T08A MIPI display.
yaml file is validated using the following commands
make dt_binding_check DT_SCHEMA_FILES=
make CHECK_DTBS=y DT_SCHEMA_FILES=
Changelogs are available in respective patches.
Manik
Add support for the Microchip AC40T08A MIPI Display panel. This panel uses
a Himax HX8394 display controller and requires a vendor provided init
sequence. The display resolution is 720x1280@60Hz with width and height
of 76mm and 132mm respectively.
Signed-off-by: Manikandan Muralidharan
Initialize the local variable used to store the status of LCDC Channel
status register of each layer to fix the static checker warning
reported by smatch
Fixes: aa71584b323a ("drm: atmel-hlcdc: add driver ops to differentiate HLCDC
and XLCDC IP")
Signed-off-by: Manikandan Mu
Add support for the Microchip AC40T08A MIPI Display panel. This panel uses
a Himax HX8394 display controller and requires a vendor provided init
sequence. The display resolution is 720x1280@60Hz with width and height
of 76mm and 132mm respectively.
Signed-off-by: Manikandan Muralidharan
Add compatible string for the Microchip's AC40T08A MIPI Display
panel.This panel uses a Himax HX8394 display controller.
Signed-off-by: Manikandan Muralidharan
---
.../devicetree/bindings/display/panel/himax,hx8394.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Document
Switch the driver to use devm_gpiod_get_optional() on reset_gpio to avoid
driver probe issues when reset line is not specified.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/panel/panel-himax-hx8394.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu
Remove "reset-gpio" property from required properties list and
make it optional.When interfaced with some boards where reset line is not
populated it leads to driver probe issues.
Signed-off-by: Manikandan Muralidharan
---
.../devicetree/bindings/display/panel/himax,hx8394.yaml
This patch series adds panel himax display controller support for the
Microchip's AC40T08A MIPI display.
Manikandan Muralidharan (4):
dt-bindings: display: himax-hx8394: remove reset-gpio from required
properties
drm/panel: himax-hx8394: switch to devm_gpiod_get_optional(
Drop Sam Ravnborg and Boris Brezillon as they are no longer interested in
maintaining the drivers. Add myself and Dharma Balasubiramani as the
Maintainer and co-maintainer for Microchip's Atmel-HLCDC driver.
Thanks for their work.
Signed-off-by: Manikandan Muralidharan
---
MAINTAINER
Add support for the following DPI mode if the encoder type
is DSI as per the XLCDC IP datasheet:
- 16BPPCFG1
- 16BPPCFG2
- 16BPPCFG3
- 18BPPCFG1
- 18BPPCFG2
- 24BPP
Signed-off-by: Manikandan Muralidharan
[durai.manicka...@microchip.com: update output format using is_xlcdc flag]
Signed-off-by
Add the LCD controller layer definition and descriptor structure for
sam9x75 for the following layers:
- Base Layer
- Overlay1 Layer
- Overlay2 Layer
- High End Overlay
Signed-off-by: Manikandan Muralidharan
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 100
Update the vertical and horizontal scaler registers of XLCDC IP
with Bilinear and Bicubic co-efficients taps for Chroma and
Luma componenets of the Pixel.
Signed-off-by: Manikandan Muralidharan
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 4
.../gpu/drm
Add support for Display Pixel Interface (DPI) Compatible Mode
support in atmel-hlcdc driver for XLCDC IP along with legacy
pixel mapping. DPI mode BIT is configured in LCDC_CFG5 register.
Signed-off-by: Manikandan Muralidharan
[durai.manicka...@microchip.com: update DPI mode bit using is_xlcdc
Replace regmap_read with regmap_read_poll_timeout to neatly handle
retries
Signed-off-by: Manikandan Muralidharan
---
.../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c| 44 +++
1 file changed, 25 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc
fields
of each layer in LCD_ATTRE is required to reflect the values set
in Configuration, FBA, Enable registers of each layer.
Signed-off-by: Manikandan Muralidharan
Co-developed-by: Hari Prasath Gujulan Elango
Signed-off-by: Hari Prasath Gujulan Elango
Co-developed-by: Durai Manickam KR
Signed
From: Durai Manickam KR
The register address of the XLCDC IP used in SAM9X7 SoC family
are different from the previous HLCDC. Defining those address
space with valid macros.
Signed-off-by: Durai Manickam KR
[manikanda...@microchip.com: Remove unused macro definitions]
Signed-off-by: Manikandan
is now
separated using the LCD IP specific ops.
Signed-off-by: Manikandan Muralidharan
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 5 +
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 83 ++---
.../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 167
Remove unsed Macro definitions.
* Add co-developed-bys tags
* Replace regmap_read() with regmap_read_poll_timeout() call
* Split code into two helpers for code readablitity.
Durai Manickam KR (1):
drm: atmel-hlcdc: Define XLCDC specific registers
Manikandan Muralidharan (7):
drm:
Add the LCD controller layer definition and descriptor structure for
sam9x75 for the following layers:
- Base Layer
- Overlay1 Layer
- Overlay2 Layer
- High End Overlay
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 100 +++
1 file
Add support for the following DPI mode if the encoder type
is DSI as per the XLCDC IP datasheet:
- 16BPPCFG1
- 16BPPCFG2
- 16BPPCFG3
- 18BPPCFG1
- 18BPPCFG2
- 24BPP
Signed-off-by: Manikandan Muralidharan
[durai.manicka...@microchip.com: update output format using is_xlcdc flag]
Signed-off-by
Update the vertical and horizontal scaler registers of XLCDC IP
with Bilinear and Bicubic co-efficients taps for Chroma and
Luma componenets of the Pixel.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 4
.../gpu/drm/atmel-hlcdc
is now
separated using the LCD IP specific ops.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 5 +
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 83 ++---
.../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 167 +++---
3 files changed
Add support for Display Pixel Interface (DPI) Compatible Mode
support in atmel-hlcdc driver for XLCDC IP along with legacy
pixel mapping. DPI mode BIT is configured in LCDC_CFG5 register.
Signed-off-by: Manikandan Muralidharan
[durai.manicka...@microchip.com: update DPI mode bit using is_xlcdc
fields
of each layer in LCD_ATTRE is required to reflect the values set
in Configuration, FBA, Enable registers of each layer.
Signed-off-by: Manikandan Muralidharan
Co-developed-by: Hari Prasath Gujulan Elango
Signed-off-by: Hari Prasath Gujulan Elango
Co-developed-by: Durai Manickam KR
Signed
From: Durai Manickam KR
The register address of the XLCDC IP used in SAM9X7 SoC family
are different from the previous HLCDC. Defining those address
space with valid macros.
Signed-off-by: Durai Manickam KR
[manikanda...@microchip.com: Remove unused macro definitions]
Signed-off-by: Manikandan
Replace regmap_read with regmap_read_poll_timeout to neatly handle
retries
Signed-off-by: Manikandan Muralidharan
---
.../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c| 44 +++
1 file changed, 25 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc
Remove unsed Macro definitions.
* Add co-developed-bys tags
* Replace regmap_read() with regmap_read_poll_timeout() call
* Split code into two helpers for code readablitity.
---
Durai Manickam KR (1):
drm: atmel-hlcdc: Define XLCDC specific registers
Manikandan Muralidharan (7):
drm: atmel-hlcdc: a
Add the LCD controller layer definition and descriptor structure for
sam9x75 for the following layers:
- Base Layer
- Overlay1 Layer
- Overlay2 Layer
- High End Overlay
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 100 +++
1 file
Add support for the following DPI mode if the encoder type
is DSI as per the XLCDC IP datasheet:
- 16BPPCFG1
- 16BPPCFG2
- 16BPPCFG3
- 18BPPCFG1
- 18BPPCFG2
- 24BPP
Signed-off-by: Manikandan Muralidharan
[durai.manicka...@microchip.com: update output format using is_xlcdc flag]
Signed-off-by
Update the vertical and horizontal scaler registers of XLCDC IP
with Bilinear and Bicubic co-efficients taps for Chroma and
Luma componenets of the Pixel.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 4
.../gpu/drm/atmel-hlcdc
Add support for Display Pixel Interface (DPI) Compatible Mode
support in atmel-hlcdc driver for XLCDC IP along with legacy
pixel mapping. DPI mode BIT is configured in LCDC_CFG5 register.
Signed-off-by: Manikandan Muralidharan
[durai.manicka...@microchip.com: update DPI mode bit using is_xlcdc
fields
of each layer in LCD_ATTRE is required to reflect the values set
in Configuration, FBA, Enable registers of each layer.
Signed-off-by: Manikandan Muralidharan
Co-developed-by: Hari Prasath Gujulan Elango
Signed-off-by: Hari Prasath Gujulan Elango
Co-developed-by: Durai Manickam KR
Signed
From: Durai Manickam KR
The register address of the XLCDC IP used in SAM9X7 SoC family
are different from the previous HLCDC. Defining those address
space with valid macros.
Signed-off-by: Durai Manickam KR
[manikanda...@microchip.com: Remove unused macro definitions]
Signed-off-by: Manikandan
is now
separated using the LCD IP specific ops.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 5 +
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 84 ++---
.../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 167 +++---
3 files changed
code readablitity.
---
Durai Manickam KR (1):
drm: atmel-hlcdc: Define XLCDC specific registers
Manikandan Muralidharan (6):
drm: atmel-hlcdc: add driver ops to differentiate HLCDC and XLCDC IP
drm: atmel_hlcdc: Add support for XLCDC using IP specific driver ops
drm: atmel-hlcdc: add DPI mode
Add support for the following DPI mode if the encoder type
is DSI as per the XLCDC IP datasheet:
- 16BPPCFG1
- 16BPPCFG2
- 16BPPCFG3
- 18BPPCFG1
- 18BPPCFG2
- 24BPP
Signed-off-by: Manikandan Muralidharan
[durai.manicka...@microchip.com: update output format using is_xlcdc flag]
Signed-off-by
Add support for Display Pixel Interface (DPI) Compatible Mode
support in atmel-hlcdc driver for XLCDC IP along with legacy
pixel mapping. DPI mode BIT is configured in LCDC_CFG5 register.
Signed-off-by: Manikandan Muralidharan
[durai.manicka...@microchip.com: update DPI mode bit using is_xlcdc
Update the LCDC_HEOCFG30 and LCDC_HEOCFG31 registers of XLCDC IP which
supports vertical and horizontal scaling with Bilinear and Bicubic
co-efficients taps for Chroma and Luma componenets of the Pixel.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
blending, YUV-to-RGB
conversion in XLCDC is derived and handled using additional
configuration bits and registers. Writing one to the Enable fields
of each layer in LCD_ATTRE is required to reflect the values set
in Configuration, FBA, Enable registers of each layer.
Signed-off-by: Manikandan
From: Durai Manickam KR
The register address of the XLCDC IP used in SAM9X7 SoC family
are different from the previous HLCDC. Defining those address
space with valid macros.
Signed-off-by: Durai Manickam KR
[manikanda...@microchip.com: Remove unused macro definitions]
Signed-off-by: Manikandan
Add the LCD controller layer definition and descriptor structure for
sam9x75 for the following layers:
- Base Layer
- Overlay1 Layer
- Overlay2 Layer
- High End Overlay
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 97
1 file
Add is_xlcdc flag and LCD IP specific ops in driver data to differentiate
XLCDC and HLCDC code within the atmel-hlcdc driver files.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 37
1 file changed, 37 insertions(+)
diff --git a
s
* Replace regmap_read() with regmap_read_poll_timeout() call
* Split code into two helpers for code readablitity.
Durai Manickam KR (1):
drm: atmel-hlcdc: Define SAM9X7 SoC XLCDC specific registers
Manikandan Muralidharan (6):
drm: atmel-hlcdc: add flag and driver ops to differentiate XLCDC
Add support for the following DPI mode if the encoder type
is DSI as per the XLCDC IP datasheet:
- 16BPPCFG1
- 16BPPCFG2
- 16BPPCFG3
- 18BPPCFG1
- 18BPPCFG2
- 24BPP
Signed-off-by: Manikandan Muralidharan
[durai.manicka...@microchip.com: update output format using is_xlcdc flag]
Signed-off-by
Update the LCDC_HEOCFG30 and LCDC_HEOCFG31 registers of XLCDC IP which
supports vertical and horizontal scaling with Bilinear and Bicubic
co-efficients taps for Chroma and Luma componenets of the Pixel.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
Add support for Display Pixel Interface (DPI) Compatible Mode
support in atmel-hlcdc driver for XLCDC IP along with legacy
pixel mapping. DPI mode BIT is configured in LCDC_CFG5 register.
Signed-off-by: Manikandan Muralidharan
[durai.manicka...@microchip.com: update DPI mode bit using is_xlcdc
blending, YUV-to-RGB
conversion in XLCDC is derived and handled using additional
configuration bits and registers. Writing one to the Enable fields
of each layer in LCD_ATTRE is required to reflect the values set
in Configuration, FBA, Enable registers of each layer.
Signed-off-by: Manikandan
Add the LCD controller layer definition and descriptor structure for
sam9x75 for the following layers:
- Base Layer
- Overlay1 Layer
- Overlay2 Layer
- High End Overlay
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 97
1 file
From: Durai Manickam KR
The register address of the XLCDC IP used in SAM9X7 SoC family
are different from the previous HLCDC. Defining those address
space with valid macros.
Signed-off-by: Durai Manickam KR
[manikanda...@microchip.com: Remove unused macro definitions]
Signed-off-by: Manikandan
Add is_xlcdc flag and LCD IP specific ops in driver data to differentiate
XLCDC and HLCDC code within the atmel-hlcdc driver files.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 37
1 file changed, 37 insertions(+)
diff --git a
s
* Replace regmap_read() with regmap_read_poll_timeout() call
* Split code into two helpers for code readablitity.
Durai Manickam KR (1):
drm: atmel-hlcdc: Define SAM9X7 SoC XLCDC specific registers
Manikandan Muralidharan (6):
drm: atmel-hlcdc: add flag and driver ops to differentiate XLCDC
Add support for the following DPI mode if the encoder type
is DSI as per the XLCDC IP datasheet:
- 16BPPCFG1
- 16BPPCFG2
- 16BPPCFG3
- 18BPPCFG1
- 18BPPCFG2
- 24BPP
Signed-off-by: Manikandan Muralidharan
[durai.manicka...@microchip.com: update output format using is_xlcdc flag]
Signed-off-by
Add the LCD controller layer definition and descriptor structure for
sam9x75 for the following layers:
- Base Layer
- Overlay1 Layer
- Overlay2 Layer
- High End Overlay
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 97
1 file
blending, YUV-to-RGB
conversion in XLCDC is derived and handled using additional
configuration bits and registers. Writing one to the Enable fields
of each layer in LCD_ATTRE is required to reflect the values set
in Configuration, FBA, Enable registers of each layer.
Signed-off-by: Manikandan
Update the LCDC_HEOCFG30 and LCDC_HEOCFG31 registers of XLCDC IP which
supports vertical and horizontal scaling with Bilinear and Bicubic
co-efficients taps for Chroma and Luma componenets of the Pixel.
Signed-off-by: Manikandan Muralidharan
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
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