On Wed, 11 Dec 2024 at 04:37, Cristian Ciocaltea
wrote:
>
> Add support for the second HDMI TX port found on RK3588 SoC.
>
> Signed-off-by: Cristian Ciocaltea
> ---
Tested-by: Jagan Teki # edgeble-6tops-modules
On Wed, 11 Dec 2024 at 04:37, Cristian Ciocaltea
wrote:
>
> In preparation to enable the second HDMI output port found on RK3588
> SoC, add the related PHY node. This requires a GRF, hence add the
> dependent node as well.
>
> Signed-off-by: Cristian Ciocaltea
> ---
On Sun, Nov 26, 2023 at 9:41 PM Jagan Teki wrote:
>
> On Mon, Nov 13, 2023 at 6:45 PM Jagan Teki wrote:
> >
> > On Tue, Aug 1, 2023 at 11:50 AM Dave Stevenson
> > wrote:
> > >
> > > Hi Jagan
> > >
> > > My apologies for dropping the
On Wed, Dec 13, 2023 at 5:29 PM Dario Binacchi
wrote:
>
> Hi Jagan and Dave,
>
> On Wed, Dec 6, 2023 at 2:57 PM Michael Nazzareno Trimarchi
> wrote:
> >
> > Hi Jagan
> >
> > On Wed, Dec 6, 2023 at 2:31 PM Jagan Teki
> > wrote:
> > >
>
Hi Dario,
On Wed, Dec 6, 2023 at 6:57 PM Dario Binacchi
wrote:
>
> Hi Dave and Jagan,
>
> On Tue, Dec 5, 2023 at 4:39 PM Dave Stevenson
> wrote:
> >
> > Hi Dario
> >
> > On Tue, 5 Dec 2023 at 10:54, Dario Binacchi
> > wrote:
> > >
> > > The patch fixes the code for finding the next bridge with
On Mon, Nov 13, 2023 at 6:45 PM Jagan Teki wrote:
>
> On Tue, Aug 1, 2023 at 11:50 AM Dave Stevenson
> wrote:
> >
> > Hi Jagan
> >
> > My apologies for dropping the ball on this one, and thanks to Frieder
> > for the nudge.
> >
> > On Wed, 12 A
On Tue, Aug 1, 2023 at 11:50 AM Dave Stevenson
wrote:
>
> Hi Jagan
>
> My apologies for dropping the ball on this one, and thanks to Frieder
> for the nudge.
>
> On Wed, 12 Apr 2023 at 07:25, Jagan Teki wrote:
> >
> > Hi Dave,
> >
> > Added Ma
On Sun, Aug 27, 2023 at 12:03 AM Mimoja wrote:
>
> I appreciate you taking the time to respond!
>
> On 26.08.23 17:18, Marek Vasut wrote:
> > On 8/26/23 11:55, Mimoja wrote:
> >> "The .prepare() function is typically called before the display
> >> controller
> >> starts to transmit video data."
>
On Wed, 2 Aug 2023 at 02:37, Conor Dooley wrote:
>
> On Mon, Jul 31, 2023 at 04:30:03PM +0530, Jagan Teki wrote:
> > Document the VOP for Rockchip RV1126.
> >
> > Signed-off-by: Jagan Teki
>
> There's no commentary here about compatibility with other, existing,
RV1126 MIPI DSI supports V1.2 DPHY with 4 lanes and 1Gbps transfer
rate for lane.
Add support for it.
Signed-off-by: Jagan Teki
---
Cc: dri-devel@lists.freedesktop.org
Cc: Sandy Huang
Cc: David Airlie
Cc: Daniel Vetter
.../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 20
Document the MIPI DSI for Rockchip RV1126.
Signed-off-by: Jagan Teki
---
Cc: dri-devel@lists.freedesktop.org
Cc: devicet...@vger.kernel.org
Cc: Rob Herring
Cc: Krzysztof Kozlowski
Cc: Conor Dooley
Cc: Sandy Huang
Cc: David Airlie
Cc: Daniel Vetter
.../bindings/display/rockchip/rockchip
RV1126 VOP_LITE supports the video output processing ofMIPI DSI,
RGB display interfaces with max output resolution of 1920x1080.
Add support for rv1126 vop.
Signed-off-by: Jagan Teki
---
Cc: dri-devel@lists.freedesktop.org
Cc: Sandy Huang
Cc: David Airlie
Cc: Daniel Vetter
drivers/gpu/drm
Document the VOP for Rockchip RV1126.
Signed-off-by: Jagan Teki
---
Cc: dri-devel@lists.freedesktop.org
Cc: devicet...@vger.kernel.org
Cc: Rob Herring
Cc: Krzysztof Kozlowski
Cc: Conor Dooley
Cc: Sandy Huang
Cc: David Airlie
Cc: Daniel Vetter
.../devicetree/bindings/display/rockchip
On Thu, Jul 20, 2023 at 12:40 PM Ying Liu wrote:
>
> Introduce ->get_input_bus_fmts() callback to struct dw_mipi_dsi_plat_data
> so that vendor drivers can implement specific methods to get input bus
> formats for Synopsys DW MIPI DSI.
>
> While at it, implement a generic callback for ->atomic_get
On Wed, Jul 19, 2023 at 2:05 PM Ying Liu wrote:
>
> On Tuesday, July 18, 2023 6:51 PM Jagan Teki
> wrote:
> >
> > Hi,
>
> Hi,
>
> >
> > On Tue, Jul 18, 2023 at 3:19 PM Ying Liu wrote:
> > >
> > > On Tuesday, July 18, 2023 5:35 PM
Hi,
On Tue, Jul 18, 2023 at 3:19 PM Ying Liu wrote:
>
> On Tuesday, July 18, 2023 5:35 PM Jagan Teki
> wrote:
> >
> > >
> > > Hi Jagan,
> > >
> > > On Monday, July 17, 2023 2:44 PM Jagan Teki
> > wrote:
> > > > On Mon, Ju
On Tue, Jul 18, 2023 at 8:28 AM Ying Liu wrote:
>
> Hi Jagan,
>
> On Monday, July 17, 2023 2:44 PM Jagan Teki
> wrote:
> > On Mon, Jul 17, 2023 at 11:44 AM Liu Ying wrote:
> > >
> > > Freescale i.MX93 SoC embeds a Synopsys Designware MIPI DSI host
>
On Mon, Jul 17, 2023 at 11:44 AM Liu Ying wrote:
>
> Freescale i.MX93 SoC embeds a Synopsys Designware MIPI DSI host
> controller and a Synopsys Designware MIPI DPHY. Some configurations
> and extensions to them are controlled by i.MX93 media blk-ctrl.
>
> Add a DRM bridge for i.MX93 MIPI DSI by
trong wrote:
> >>>> Hi,
> >>>>
> >>>> On 06/07/2023 11:20, Amit Pundir wrote:
> >>>>> On Wed, 5 Jul 2023 at 11:09, Dmitry Baryshkov
> >>>>> wrote:
> >>>>>>
> >>>>>> [Adding fre
On Thu, Jul 13, 2023 at 12:22 AM Tim Harvey wrote:
>
> Greetings,
>
> I've noticed a regression in 6.5-rc1 that I'm having trouble bisecting
> between 6.4 with regards to imx8mm MIPI DSI.
>
> I'm testing on an imx8mm-venice-gw72xx-0x with the following display:
> - Powertip PH800480T013-IDF02 com
On Thu, 22 Jun 2023 at 13:52, Linus Walleij wrote:
>
> On Wed, Jun 21, 2023 at 5:09 PM Paulo Pavacic wrote:
>
> > A lot of modifications to st7701 are required. I believe it would
> > result in a driver that doesn't look or work the same. e.g compare
> > delays between initialization sequences of
On Wed, Jul 5, 2023 at 11:09 AM Dmitry Baryshkov
wrote:
>
> [Adding freedreno@ to cc list]
>
> On Wed, 5 Jul 2023 at 08:31, Jagan Teki wrote:
> >
> > Hi Amit,
> >
> > On Wed, Jul 5, 2023 at 10:15 AM Amit Pundir wrote:
> > >
> > > Hi Marek
Hi Amit,
On Wed, Jul 5, 2023 at 10:15 AM Amit Pundir wrote:
>
> Hi Marek,
>
> On Wed, 5 Jul 2023 at 01:48, Marek Vasut wrote:
> >
> > Do not generate the HS front and back porch gaps, the HSA gap and
> > EOT packet, as these packets are not required. This makes the bridge
> > work with Samsung D
gt; in the FIFO could be overwritten in case the FIFO indicates not full, but
> also does not have enough space to store another transfer yet.
>
> Signed-off-by: Marek Vasut
> ---
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki # imx8mm-icore
On Wed, Jun 7, 2023 at 12:01 PM Dario Binacchi
wrote:
>
> Add support to Rocktech RK043FN48H display on stm32f746-disco board.
>
> Signed-off-by: Dario Binacchi
> ---
>
> (no changes since v1)
>
> arch/arm/boot/dts/stm32f746-disco.dts | 51 +++
> 1 file changed, 51 insert
On Wed, Jun 7, 2023 at 12:01 PM Dario Binacchi
wrote:
>
> Add compatible to panel-simple for Rocktech Displays Limited
> RK043FN48H 4.3" 480x272 LCD-TFT panel.
>
> Signed-off-by: Dario Binacchi
> Acked-by: Conor Dooley
>
> ---
Reviewed-by: Jagan Teki
343.jntwem0p-...@intel.com/
>
> ---
Reviewed-by: Jagan Teki
On Wed, May 10, 2023 at 9:12 AM Pin-yen Lin wrote:
>
> +Jagan who worked on a similar design and initiated the thread.
>
> Hi Stephen,
>
> On Sat, Apr 29, 2023 at 12:47 PM Stephen Boyd wrote:
> >
> > Quoting Pin-yen Lin (2023-04-20 02:10:46)
> > > On Thu, Apr 20, 2023 at 2:10 PM Stephen Boyd wro
gt; $ref: /schemas/types.yaml#/definitions/uint32
> description:
> - DSIM oscillator clock frequency.
> + DSIM oscillator clock frequency. If absent, the clock frequency
> + of sclk_mipi will be used instead.
Maybe this explicit comment won't require as it is not listed in "required"
Reviewed-by: Jagan Teki
> samsung_dsim *dsi,
>
> dsi->hs_clock = fout;
>
> + dsi->hs_clock = fout;
I dropped this and tested it.
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki # imx8mm-icore
Tested-by: Frieder Schrempf
> Reviewed-by: Frieder Schrempf
> Tested-by: Michael Walle
> ---
Tested-by: Jagan Teki # imx8mm-icore
it can be optional, change the message from an error to
> dev_info.
>
> Signed-off-by: Adam Ford
> Tested-by: Chen-Yu Tsai
> Tested-by: Frieder Schrempf
> Reviewed-by: Frieder Schrempf
> ---
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki # imx8mm-icore
ridge: samsung-dsim: Add i.MX8M Mini/Nano
> support")
> Signed-off-by: Adam Ford
> Reviewed-by: Lucas Stach
> Tested-by: Chen-Yu Tsai
> Tested-by: Frieder Schrempf
> Reviewed-by: Frieder Schrempf
> ---
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki # imx8mm-icore
nto account.
>
> Signed-off-by: Lucas Stach
> Signed-off-by: Adam Ford
> Tested-by: Chen-Yu Tsai
> Tested-by: Frieder Schrempf
> ---
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki # imx8mm-icore
Hi,
Please don't post, use inline replies.
On Wed, May 17, 2023 at 6:34 PM Paulo wrote:
>
> On Wed, May 17 2023 at 05:50:22 PM +0530, Jagan Teki
> wrote:
> > Just to add a few pieces of information for you to understand better
> > on the context of dsi panels.
On Wed, May 17, 2023 at 12:39 PM Paulo Pavacic wrote:
>
> Hello, thank you for your time to review this patch and sorry for not
> addressing all of the concerns, it was done unintentionally. This is
> my first contribution to the Linux kernel and it is quite a process.
> I have run those two scrip
On Tue, May 16, 2023 at 5:27 AM Adam Ford wrote:
>
> The DPHY timings are currently hard coded. Since the input
> clock can be variable, the phy timings need to be variable
> too. To facilitate this, we need to cache the hs_clock
> based on what is generated from the PLL.
>
> The phy_mipi_dphy_ge
On Wed, May 17, 2023 at 4:34 PM Jagan Teki wrote:
>
> Hi Adam,
>
> On Tue, May 16, 2023 at 5:27 AM Adam Ford wrote:
> >
> > In order to support variable DPHY timings, it's necessary
> > to enable GENERIC_PHY_MIPI_DPHY so phy_mipi_dphy_get_default_config
>
Hi Adam,
On Tue, May 16, 2023 at 5:27 AM Adam Ford wrote:
>
> In order to support variable DPHY timings, it's necessary
> to enable GENERIC_PHY_MIPI_DPHY so phy_mipi_dphy_get_default_config
> can be used to determine the nominal values for a given resolution
> and refresh rate.
>
> Signed-off-by:
On Tue, May 16, 2023 at 2:04 PM Marek Vasut wrote:
>
> On 5/16/23 10:25, Jagan Teki wrote:
> > On Tue, May 16, 2023 at 1:47 PM Marek Vasut wrote:
> >>
> >> On 5/16/23 10:12, Jagan Teki wrote:
> >>> Hi Marek and Neil,
> >>>
&g
On Tue, May 16, 2023 at 1:47 PM Marek Vasut wrote:
>
> On 5/16/23 10:12, Jagan Teki wrote:
> > Hi Marek and Neil,
> >
> > On Sun, May 14, 2023 at 1:40 AM Marek Vasut wrote:
> >>
> >> This panel_bridge post_disable callback is called from the bridge chain
Hi Marek and Neil,
On Sun, May 14, 2023 at 1:40 AM Marek Vasut wrote:
>
> This panel_bridge post_disable callback is called from the bridge chain now,
> so drop the explicit call here. This fixes call imbalance, where this driver
> does not call ->pre_enable, but does call ->post_disable . In cas
On Mon, Apr 24, 2023 at 3:17 PM Adam Ford wrote:
>
> On Mon, Apr 24, 2023 at 4:03 AM Jagan Teki wrote:
> >
> > On Sun, Apr 23, 2023 at 5:42 PM Adam Ford wrote:
> > >
> > > From: Lucas Stach
> > >
> > > Scale the blanking packet sizes to ma
On Sun, Apr 23, 2023 at 5:42 PM Adam Ford wrote:
>
> From: Lucas Stach
>
> Scale the blanking packet sizes to match the ratio between HS clock
> and DPI interface clock. The controller seems to do internal scaling
> to the number of active lanes, so we don't take those into account.
>
> Signed-of
+ Bridge Maintainers
On Wed, Apr 19, 2023 at 8:35 AM 余治国 wrote:
>
> The log looks like this:
> [ 31.723823] Internal error: Oops: 9604 [#1] SMP\013 \010
> [ 31.729030] Modules linked in:\013 \010
> [ 31.733395] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.10.59+2.0.0 #250\013
> \010
> [ 31.745
Hi Brandon,
On Wed, Apr 19, 2023 at 12:43 AM Marek Vasut wrote:
>
> On 4/18/23 15:42, Jagan Teki wrote:
> > On Tue, Apr 18, 2023 at 5:52 PM Brandon Cheo Fusi
> > wrote:
> >>
> >> Avoid aborting chip configuration after reading invalid IDs and
> >&g
On Mon, Apr 17, 2023 at 12:52 PM logic.yu wrote:
>
> When the code is executed to bridge->funcs->attach,bridge->funcs is NULL.
> Although the function entry checks whether the bridge pointer is NULL,it
> does not detect whether the bridge->funcs is NULL, so a panic error
> occurs.
>
> Signed-off-b
On Tue, Apr 18, 2023 at 5:52 PM Brandon Cheo Fusi
wrote:
>
> Avoid aborting chip configuration after reading invalid IDs and
> instead issue a warning. I have a bunch of these chips and they all
> report "Vendor=0x00 Device=0x00:0x00 Version=0x00" but are successfully
> configured and go on to wor
On Wed, Apr 12, 2023 at 1:39 PM Daniel Vetter wrote:
>
> Otherwise core changes don't get noticed by the right people. I
> noticed this because a patch set from Jagan Teki seems to have fallen
> through the cracks.
>
> Signed-off-by: Daniel Vetter
> Cc: Jagan Teki
Hi Dave,
Added Maxime, Laurent [which I thought I added before]
On Tue, Mar 28, 2023 at 10:38 PM Jagan Teki wrote:
>
> For a given bridge pipeline if any bridge sets pre_enable_prev_first
> flag then the pre_enable for the previous bridge will be called before
> pre_enable of thi
On Tue, Apr 11, 2023 at 1:17 PM Alexander Stein
wrote:
>
> Am Donnerstag, 6. April 2023, 11:55:52 CEST schrieb Jagan Teki:
> > [Replying the Daniel thread since he included bridge maintainers]
> >
> > On Thu, Apr 6, 2023 at 2:07 PM Daniel Vetter wrote:
> > > A
> Hi Jagan,
> >
> > thanks for your reply.
> >
> > Am Mittwoch, 5. April 2023, 16:39:07 CEST schrieb Jagan Teki:
> > > On Wed, Apr 5, 2023 at 7:39 PM Alexander Stein
> > >
> > > wrote:
> > > > Hi,
> > > >
> > &
On Wed, Apr 5, 2023 at 7:39 PM Alexander Stein
wrote:
>
> Hi,
>
> my platform has a DIP switch controlled multiplexer for MIPI DSI output
> signals. One output has a TI SN65DSI84 (LVDS) and the other output has a TI
> SN65DSI86 (eDP) attached to it. The Multiplexer status can be read back from a
>
On Thu, Mar 30, 2023 at 6:57 AM Yang Li wrote:
>
> ./drivers/gpu/drm/bridge/samsung-dsim.c:1957:6-11: No need to set .owner
> here. The core will do it.
>
> Reported-by: Abaci Robot
> Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=4640
> Signed-off-by: Yang Li
>
Hi Dave,
On Thu, Mar 30, 2023 at 3:31 PM Dave Stevenson
wrote:
>
> Hi Jagan
>
> On Thu, 30 Mar 2023 at 07:56, Jagan Teki wrote:
> >
> > On Wed, Mar 29, 2023 at 10:16 PM Maxime Ripard wrote:
> > >
> > > On Wed, Mar 29, 2023 at 05:28:28PM +0100, Dave St
On Mon, Apr 3, 2023 at 7:13 PM Krzysztof Kozlowski
wrote:
>
> On 03/04/2023 15:25, Fabio Estevam wrote:
> > Hi Krzysztof,
> >
> > On 03/04/2023 09:49, Krzysztof Kozlowski wrote:
> >
> >>> Signed-off-by: Jagan Teki
> >>> Signed-o
asOn Sat, Apr 1, 2023 at 1:27 AM Fabio Estevam wrote:
>
> From: Jagan Teki
>
> Samsung MIPI DSIM bridge can be found on Exynos and NXP's
> i.MX8M Mini and Nano SoC's.
>
> Convert exynos_dsim.txt to yaml.
Thanks for rebasing this.
>
> Used the example n
On Thu, Mar 30, 2023 at 8:32 PM Francesco Dolcini wrote:
>
> On Thu, Mar 30, 2023 at 07:56:26PM +0530, Jagan Teki wrote:
> > On Thu, Mar 30, 2023 at 3:48 PM Francesco Dolcini
> > wrote:
> > >
> > > From: Francesco Dolcini
> > >
> > > SN65D
On Thu, Mar 30, 2023 at 3:48 PM Francesco Dolcini wrote:
>
> From: Francesco Dolcini
>
> SN65DSI8[34] device supports burst video mode and non-burst video mode
> with sync events or with sync pulses packet transmission as described in
> the DSI specification.
>
> Add property to select the expect
Hi Fabio,
On Thu, Mar 30, 2023 at 4:39 PM Fabio Estevam wrote:
>
> Hi Jagan,
>
> On Thu, Mar 30, 2023 at 4:55 AM Jagan Teki wrote:
>
> > I have a previous iteration of this conversion. Can I resend it on top
> > of drm-misc-next?
> > https://lore.kernel.
On Thu, Mar 30, 2023 at 1:08 PM Krzysztof Kozlowski
wrote:
>
> On 29/03/2023 16:41, Fabio Estevam wrote:
> > From: Fabio Estevam
> >
> > The Samsung DSIM IP block allows the inversion of the clock and
> > data lanes.
> >
> > Add an optional property called 'lane-polarities' that describes the
> >
On Wed, Mar 29, 2023 at 10:16 PM Maxime Ripard wrote:
>
> On Wed, Mar 29, 2023 at 05:28:28PM +0100, Dave Stevenson wrote:
> > On Wed, 29 Mar 2023 at 14:19, Jagan Teki wrote:
> > >
> > > DSI sink devices typically send the MIPI-DCS commands to the DSI host
> >
On Wed, Mar 29, 2023 at 9:36 PM Maxime Ripard wrote:
>
> On Wed, Mar 29, 2023 at 09:08:17PM +0530, Jagan Teki wrote:
> > On Wed, Mar 29, 2023 at 8:29 PM Maxime Ripard wrote:
> > >
> > > Hi,
> > >
> > > The patch prefix should be drm/sun4i:
> &
On Sat, Feb 18, 2023 at 4:47 PM Pin-yen Lin wrote:
>
> This series is developed for and tested on MT8173 board, and the layout is:
>
> /-- anx7688
> -- MT8173 HDMI bridge -- GPIO mux
> \-- native HDMI
What is the part number of t
clock and data lanes.
>
> This is property is useful for properly describing the hardware
> when the board designer decided to switch the polarities of the MIPI DSI
> clock and/or data lanes.
>
> Signed-off-by: Fabio Estevam
> ---
Reviewed-by: Jagan Teki
f-by: Marek Vasut
> Signed-off-by: Fabio Estevam
> ---
Prefix would be "drm: bridge: samsung-dsim: "
Otherwise look good to me, I will give a test and update.
Reviewed-by: Jagan Teki
On Wed, Mar 29, 2023 at 8:29 PM Maxime Ripard wrote:
>
> Hi,
>
> The patch prefix should be drm/sun4i:
I did follow my previous prefix, I will update this.
>
> On Wed, Mar 29, 2023 at 06:49:29PM +0530, Jagan Teki wrote:
> > Convert the encoder to bridge driver in o
On Wed, Mar 29, 2023 at 8:32 PM Maxime Ripard wrote:
>
> The commit title is wrong, it's not a rockchip device.
Thanks for the note, I will fix it in the next version.
>
> On Wed, Mar 29, 2023 at 06:46:15PM +0530, Jagan Teki wrote:
> > The DSI downstream devices are lik
On Wed, Mar 29, 2023 at 8:33 PM Maxime Ripard wrote:
>
> On Wed, Mar 29, 2023 at 06:46:08PM +0530, Jagan Teki wrote:
> > Implement a DRM-managed action helper that returns the next DSI bridge
> > in the chain.
> >
> > Unlike general bridge return helper drmm_of_ge
Panel, DSI Bridge, I2C-Configured DSI Bridge.
Signed-off-by: Jagan Teki
---
Changes for v7:
- drop bridge call chain
- use drmm_of_dsi_get_bridge
- switch to atomic bridge calls
- use atomic_pre_enable and atomic_enable for previous enable
Changes for v6:
- support donwstream bridge
- drop bridge
order with a proper explanation.
Signed-off-by: Jagan Teki
---
Changes for v7:
- new patch
drivers/gpu/drm/drm_bridge.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c
index cdc2669b3512..3c6c9937537a 100644
--- a
next_first
- Bridge 6
- Encoder
Would result in enable's being called as Encoder, Bridge 6, Bridge 3,
Bridge 4, Bridge 5, Bridge 1, Bridge 2, Panel.
and the result in disable's being called as Panel, Bridge 2, Bridge 1,
Bridge 5, Bridge 4, Bridge 3, Bridge 6, Encoder.
Signed-off-by: Jagan T
vice bindings are untouched and still represent
the downstream devices via child nodes since the sun6i-mipi-dsi host
will migrate to a standardized single helper to lookup for a
downstream device via child or OF-graph port or port node.
Signed-off-by: Jagan Teki
---
Changes for v7:
- new pat
vice bindings are untouched and still represent
the downstream devices via child nodes since the sun6i-mipi-dsi host
will migrate to a standardized single helper to lookup for a
downstream device via child or OF-graph port or port node.
Signed-off-by: Jagan Teki
---
Changes for v7:
- new patch
initialized to LP-11 before the panel
is powered up.
Cc: Icenowy Zheng
Signed-off-by: Jagan Teki
---
Changes for v7:
- new patch
drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
b/drivers/gpu/drm
initialized to LP-11 before the panel
is powered up.
Cc: Icenowy Zheng
Signed-off-by: Jagan Teki
---
Changes for v7:
- new patch
drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c
b/drivers/gpu
to LP-11 before the panel
is powered up.
Cc: Ondrej Jirman
Signed-off-by: Jagan Teki
---
Changes for v7:
- new patch
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
b/drivers/gpu/drm/panel/panel
LP-11 before the panel
is powered up.
Signed-off-by: Jagan Teki
---
Changes for v7:
- new patch
drivers/gpu/drm/panel/panel-sitronix-st7701.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c
b/drivers/gpu/drm/panel/panel-sitronix-st7701.c
initialized to LP-11 before the panel
is powered up.
Signed-off-by: Jagan Teki
---
Changes for v7:
- new patch
drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c
b/drivers/gpu/drm/panel/panel
been added via
child or OF-graph port or ports node.
Upstream DSI looks for downstream devices using drm pointer, port and
endpoint number. Downstream devices added via child node don't affect
the port and endpoint number arguments.
Signed-off-by: Jagan Teki
---
Changes for v7:
- new
ured DSI bridges.
This patch tries to add an OF-graph port or ports representation
detection code on top of existing child node detection.
Overall, this patch makes use of a single standardized DRM helper
for a given DSI pipeline representing downstream devices as child
or OF-graph port or OF-graph ports
/20211122065223.88059-4-ja...@amarulasolutions.com/
Any inputs?
Jagan.
Jagan Teki (12):
drm: of: Lookup if child node has DSI panel or bridge
drm: bridge: panel: Implement drmm_of_dsi_get_bridge helper
drm: panel: feiyang-fy07024di26a30d: Enable prepare_prev_first flag
drm: panel: sitronix-st7701: Enable
es: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski
> ---
Reviewed-by: Jagan Teki
-by: Krzysztof Kozlowski
> ---
Reviewed-by: Jagan Teki
off-by: Krzysztof Kozlowski
> ---
Reviewed-by: Jagan Teki
es: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski
> ---
Reviewed-by: Jagan Teki
-dsi pipeline
Fixes: 4fb912e5e190 ("drm/bridge: Introduce pre_enable_prev_first to
alter bridge init order")
Signed-off-by: Jagan Teki
---
Changes for v2:
- add missing dri-devel in CC
drivers/gpu/drm/drm_bridge.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git
In order to satisfy the MIPI DSI initialization sequence the bridge
init order has been altered with the help of pre_enable_prev_first
in pre_enable and post_disable bridge operations.
Document the affected bridge init order with an example on the
bridge operations helpers.
Signed-off-by: Jagan
: Frieder Schrempf
Acked-by: Robert Foss
Signed-off-by: Marek Vasut
Signed-off-by: Jagan Teki
---
Changes for v16, v15, v13:
- none
Changes for v12:
- collect RB from Marek
Changes for v11:
- collect RB from Frieder
- collect ACK from Robert
Changes for v10:
- none
Changes for v9:
- added im8mp in
Samsung MIPI DSIM bridge can also be found in i.MX8M Plus SoC.
Add dt-bingings for it.
Reviewed-by: Marek Vasut
Acked-by: Rob Herring
Signed-off-by: Jagan Teki
---
Changes for v16, v15, v13:
- none
Changes for v12:
- collect RB from Marek
Changes for v11:
- collect ACK from Rob
Changes for
Samsung MIPI DSIM master can also be found in i.MX8M Mini/Nano SoC.
Add compatible and associated driver_data for it.
Reviewed-by: Marek Vasut
Reviewed-by: Frieder Schrempf
Acked-by: Robert Foss
Reviewed-by: Laurent Pinchart
Signed-off-by: Marek Szyprowski
Signed-off-by: Jagan Teki
Samsung MIPI DSIM bridge can also be found in i.MX8M Mini/Nano SoC.
Add dt-bingings for it.
Reviewed-by: Marek Vasut
Acked-by: Rob Herring
Signed-off-by: Jagan Teki
---
Changes for v16, v15, v13:
- none
Changes for v12:
- collect RB from Marek
Changes for v11, v10, v9:
- none
Changes for v8
for supporting component and bridge
based DRM drivers, so keep the exynos component based code in existing
exynos_drm_dsi.c and move generic bridge code as part of samsung-dsim.c
Tested-by: Marek Szyprowski
Reviewed-by: Marek Vasut
Signed-off-by: Marek Szyprowski
Signed-off-by: Jagan Teki
it makes it generic across all platforms.
Tested-by: Marek Szyprowski
Reviewed-by: Marek Vasut
Signed-off-by: Jagan Teki
---
Changes for v16:
- collect TB from Marek S
Changes for v15:
- remove leading underscores in function names
- collect RB from Marek
Changes for v13:
- none
Changes for v12
invoked while DSI core host attach and
detach gets called.
Tested-by: Marek Szyprowski
Reviewed-by: Marek Vasut
Signed-off-by: Marek Szyprowski
Signed-off-by: Jagan Teki
---
Changes for v16:
- fix TE_GPIO handling
- collect TB from Marek S
Changes for v15:
- remove leading underscores in
: Jagan Teki
---
Changes for v16:
- none
Changes for v15:
- collect RB from Marek
Changes for v12:
- update the logic suggested by Marek
Changes for v11:
- collect RB from Frieder
- drop extra line
Changes for v10:
- none
Changes for v9:
- added MEDIA_BUS_FMT_FIXED
- return
platforms.
Tested-by: Marek Szyprowski
Reviewed-by: Marek Vasut
Reviewed-by: Frieder Schrempf
Suggested-by: Marek Vasut
Signed-off-by: Jagan Teki
---
Changes for v16:
- collect TB from Marek S
Changes for v15, v13:
- none
Changes for v12:
- collect RB from Marek
Changes for v11:
- collect RB
dded proper comments on the code.
Comments are suggested by Marek Vasut.
Tested-by: Marek Szyprowski
Reviewed-by: Marek Vasut
Reviewed-by: Frieder Schrempf
Signed-off-by: Jagan Teki
---
Changes for v16:
- collect TB from Marek S
Changes for v15, v13:
- none
Changes for v12:
- collect RB from M
l and not invoked for Exynos
as existing downstream drm panels and bridges in Exynos are expecting
the host initialization during DSI transfer.
Reviewed-by: Marek Vasut
Reviewed-by: Frieder Schrempf
Signed-off-by: Marek Szyprowski
Signed-off-by: Jagan Teki
---
Changes for v16, v15, v13:
- none
Ch
: Marek Vasut
Reviewed-by: Frieder Schrempf
Suggested-by: Marek Szyprowski
Signed-off-by: Jagan Teki
---
Changes for v16:
- collect TB from Marek S
Changes for v15, v13:
- none
Changes for v12:
- collect RB from Marek
Changes for v11:
- collect RB from Frieder
- drop extra line
Changes for v10
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