On Tue Jun 24, 2025 at 10:23 PM JST, Danilo Krummrich wrote:
> Implement From for u32 for all enum types used within the register!()
> macro.
>
> This avoids a conflict with [1] as reported in [2].
>
> Cc: Alexandre Courbot
> Cc: Miguel Ojeda
> Link:
> https://lore.k
On Tue Jun 24, 2025 at 10:23 PM JST, Danilo Krummrich wrote:
> Fix all warnings caused by `clippy::cast_lossless`, which is going to be
> enabled by [1].
>
> Cc: Alexandre Courbot
> Cc: Miguel Ojeda
> Link:
> https://lore.kernel.org/r/20250615-ptr-as-ptr-v12-5-f43b
The kernel's `Delta` type was not available when the `wait_on` function
was introduced. Now that it is, switch to it as it is more compact than
`Duration` and cannot panic.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/falcon.rs | 12 ++--
drivers/gpu/nova
On Tue Jun 24, 2025 at 6:01 AM JST, Danilo Krummrich wrote:
> There's one thing that would be nice to fix subsequently, which is properly
> resetting the GPU. Currently, it needs a power cycle to be able to probe
> successfully after unbinding the driver.
Yes, what I usually do is the following af
Some of the firmwares need to be patched at load-time with a signature.
Add a couple of types and traits that sub-modules can use to implement
this behavior, while ensuring that the correct kind of signature is
applied to the firmware.
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre Courbot
(Write protected
region) before the Booter runs on the SEC2 processor.
Tested on my Ampere GA102 and boot is successful.
[applied changes by Alex Courbot for fwsec signatures]
[acour...@nvidia.com: remove now-unneeded Devres acquisition]
Cc: Alexandre Courbot
Cc: John Hubbard
Cc: Shirish Baskaran
On Thu Jun 19, 2025 at 4:24 AM JST, Benno Lossin wrote:
> On Mon Jun 16, 2025 at 8:41 AM CEST, Alexandre Courbot wrote:
>> On Sun Jun 15, 2025 at 4:16 AM JST, Benno Lossin wrote:
>>> On Thu Jun 12, 2025 at 4:01 PM CEST, Alexandre Courbot wrote:
>>>>
: Alexandre Courbot
---
drivers/gpu/nova-core/fb.rs | 70
drivers/gpu/nova-core/fb/hal.rs | 12 +-
drivers/gpu/nova-core/fb/hal/ga100.rs | 12 ++
drivers/gpu/nova-core/fb/hal/ga102.rs | 36 +
drivers/gpu/nova-core/fb/hal/tu102
With all the required pieces in place, load FWSEC-FRTS onto the GSP
falcon, run it, and check that it successfully carved out the WPR2
region out of framebuffer memory.
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/falcon.rs | 3 --
drivers/gpu
: Alexandre Courbot
---
Documentation/gpu/nova/core/todo.rst | 107 --
drivers/gpu/nova-core/dma.rs | 2 +-
drivers/gpu/nova-core/driver.rs | 2 +-
drivers/gpu/nova-core/falcon.rs | 8 ++-
drivers/gpu/nova-core/falcon/hal
x27;s fields]
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/dma.rs| 3 -
drivers/gpu/nova-core/firmware.rs | 3 +-
drivers/gpu/nova-core/firmware/fwsec.rs | 398
drivers/gpu/nova-core/gpu.rs| 15 +-
drivers/gpu/nova
the
GSP and SEC2 Falcons that will be required to perform that dance and
boot the GSP.
Thanks to Ben Skeggs for pointing out an important bug in the memory
scrubbing code that could lead to a race condition and ultimately a
failure to boot the GSP!
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre
Tabi]
[applied changes related to code reorg, prints etc from Danilo Krummrich]
[acour...@nvidia.com: fix clippy warnings, read_more() function]
Cc: Alexandre Courbot
Cc: John Hubbard
Cc: Shirish Baskaran
Cc: Alistair Popple
Cc: Timur Tabi
Cc: Ben Skeggs
Signed-off-by: Alexandre Courbot
From: Joel Fernandes
The PMU table in the FWSEC image has to be located to locate the start
of the Falcon ucode in the same or another FWSEC image. Add support for
the same.
Signed-off-by: Joel Fernandes
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/vbios.rs | 179
Upon reset, the GPU executes the GFW (GPU Firmware) in order to
initialize its base parameters such as clocks. The driver must ensure
that this step is completed before using the hardware.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gfw.rs | 41
: Alexandre Courbot
---
drivers/gpu/nova-core/fb.rs | 66 +++
drivers/gpu/nova-core/fb/hal.rs | 31
drivers/gpu/nova-core/fb/hal/ga100.rs | 45
drivers/gpu/nova-core/fb/hal/tu102.rs | 42
FWSEC-FRTS is the first firmware we need to run on the GSP falcon in
order to initiate the GSP boot process. Introduce the structure that
describes it.
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/firmware.rs | 45 +++
1
Since we will need to allocate lots of distinct memory chunks to be
shared between GPU and CPU, introduce a type dedicated to that. It is a
light wrapper around CoherentAllocation.
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/dma.rs | 61
The Turing+ register address space spans over that range, so increase it
as future patches will access more registers.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/driver.rs | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/nova-core/driver.rs b
`read_poll_timeout` [1] once it
is available.
[1]
https://lore.kernel.org/lkml/20250220070611.214262-8-fujita.tomon...@gmail.com/
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/util.rs | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/gpu/nova
, and with different fields and documentation.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/regs/macros.rs | 40 ++--
1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/nova-core/regs/macros.rs
b/drivers/gpu/nova-core/regs/macr
-by: Alexandre Courbot
---
drivers/gpu/nova-core/regs/macros.rs | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/nova-core/regs/macros.rs
b/drivers/gpu/nova-core/regs/macros.rs
index
d7f09026390b4ccb1c969f2b29caf07fa9204a77
This macro is pretty complex, and most rules are just helper, so add a
delimiter to indicate when users only interested in using it can stop
reading.
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/regs/macros.rs | 2 ++
1 file changed, 2 insertions(+)
diff
Fix the paths that were not absolute to prevent a potential local module
from being picked up.
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/regs/macros.rs | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/nova
nova-core will need to use SZ_1M, so make the remaining constants
available.
Reviewed-by: Boqun Feng
Signed-off-by: Alexandre Courbot
---
rust/kernel/sizes.rs | 24
1 file changed, 24 insertions(+)
diff --git a/rust/kernel/sizes.rs b/rust/kernel/sizes.rs
index
We will use this error in the nova-core driver.
Reviewed-by: Benno Lossin
Signed-off-by: Alexandre Courbot
---
rust/kernel/error.rs | 1 +
1 file changed, 1 insertion(+)
diff --git a/rust/kernel/error.rs b/rust/kernel/error.rs
index
3dee3139fcd4379b94748c0ba1965f4e1865b633
` method that adds the desired offset
after checking that it is still valid.
Signed-off-by: Alexandre Courbot
---
rust/kernel/dma.rs | 14 ++
1 file changed, 14 insertions(+)
diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs
index
15ff639b3067d0e4a39e181bbe709a9c372a591a
These properties are very useful to have (and to be used by nova-core)
and should be accessible.
Signed-off-by: Alexandre Courbot
---
rust/kernel/dma.rs | 32 ++--
1 file changed, 26 insertions(+), 6 deletions(-)
diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs
A word was apparently missing in this sentence.
Signed-off-by: Alexandre Courbot
---
rust/kernel/dma.rs | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs
index
a33261c62e0c2d3c2c9e92a4c058faab594e5355
a.com/
Signed-off-by: Alexandre Courbot
---
Changes in v6:
- Add `dma_handle_with_offset` method to CoherentAllocation.
- Move the `num` module into its own patchset and use ad-hoc code for
now.
- Add new items (and remove obsolete ones) to the TODO tag `TODO`
entries in the code with
On Thu Jun 19, 2025 at 5:24 AM JST, Danilo Krummrich wrote:
> On Wed, Jun 18, 2025 at 10:23:15PM +0200, Danilo Krummrich wrote:
>> On Thu, Jun 12, 2025 at 11:01:51PM +0900, Alexandre Courbot wrote:
>> > @@ -237,6 +237,67 @@
On Thu Jun 19, 2025 at 5:14 AM JST, Danilo Krummrich wrote:
> On Thu, Jun 12, 2025 at 11:01:28PM +0900, Alexandre Courbot wrote:
>> Hi everyone,
>>
>> The feedback on v4 has been (hopefully) addressed. I guess the main
>> remaining unknown is the direction of
On Wed Jun 18, 2025 at 5:14 AM JST, Danilo Krummrich wrote:
> On Thu, Jun 12, 2025 at 11:01:28PM +0900, Alexandre Courbot wrote:
>> Hi everyone,
>>
>> The feedback on v4 has been (hopefully) addressed. I guess the main
>> remaining unknown is the direction of
On Wed Jun 18, 2025 at 1:33 AM JST, Danilo Krummrich wrote:
> On Thu, Jun 12, 2025 at 11:01:43PM +0900, Alexandre Courbot wrote:
>> +/// Perform a DMA write according to `load_offsets` from `dma_handle`
>> into the falcon's
>> +/// `target_mem`.
>> +///
On Sun Jun 15, 2025 at 4:16 AM JST, Benno Lossin wrote:
> On Thu Jun 12, 2025 at 4:01 PM CEST, Alexandre Courbot wrote:
>> Add an equivalent to the `fls` (Find Last Set bit) C function to Rust
>> unsigned types.
>
> Have you tried to upstream this?
I will consider alongs
On Sun Jun 15, 2025 at 10:25 PM JST, Miguel Ojeda wrote:
> On Sun, Jun 15, 2025 at 12:58 PM Alexandre Courbot
> wrote:
>>
>> Also, although this will work nicely for `impl_fls!` which is a single
>> function, I'm afraid this won't scale well for `power_of_two_im
On Sun Jun 15, 2025 at 2:31 AM JST, Boqun Feng wrote:
> On Thu, Jun 12, 2025 at 11:01:32PM +0900, Alexandre Courbot wrote:
> [...]
>> +/// An unsigned integer which is guaranteed to be a power of 2.
>> +#[derive(Debug, Clone, Copy)]
>> +#[repr(transparent)]
>
On Sun Jun 15, 2025 at 2:08 AM JST, Boqun Feng wrote:
> On Fri, Jun 13, 2025 at 11:16:10PM +0900, Alexandre Courbot wrote:
> [...]
>> >> +/// Aligns `self` down to `alignment`.
>> >> +///
>>
On Sun Jun 15, 2025 at 10:32 PM JST, Miguel Ojeda wrote:
> On Thu, Jun 12, 2025 at 4:02 PM Alexandre Courbot wrote:
>>
>> +///
>> assert_eq!(PowerOfTwotry_new(16).unwrap().value(), 16);
>
> By the way, we are trying to write examples close to norma
On Sun Jun 15, 2025 at 7:51 PM JST, Alexandre Courbot wrote:
> On Sun Jun 15, 2025 at 6:37 PM JST, Miguel Ojeda wrote:
>> On Thu, Jun 12, 2025 at 4:02 PM Alexandre Courbot
>> wrote:
>>>
>>> +/// ```
>>>
On Sun Jun 15, 2025 at 6:37 PM JST, Miguel Ojeda wrote:
> On Thu, Jun 12, 2025 at 4:02 PM Alexandre Courbot wrote:
>>
>> +/// ```
>> +/// use kernel::num::fls_u32;
>> +///
>> +/// assert_eq!(fls_u32(0x0), 0);
>&
On Fri Jun 13, 2025 at 12:07 AM JST, Boqun Feng wrote:
> On Thu, Jun 12, 2025 at 11:01:32PM +0900, Alexandre Courbot wrote:
>> Introduce the `num` module, featuring the `PowerOfTwo` unsigned wrapper
>> that guarantees (at build-time or runtime) that a value is a power of
>&g
On Thu Jun 12, 2025 at 11:49 PM JST, Benno Lossin wrote:
> On Thu Jun 12, 2025 at 3:27 PM CEST, Alexandre Courbot wrote:
>> On Thu Jun 12, 2025 at 10:17 PM JST, Alexandre Courbot wrote:
>>> On Wed Jun 4, 2025 at 4:18 PM JST, Benno Lossin wrote:
>>>> On Wed Jun 4, 2
nova-core will need to use SZ_1M, so make the remaining constants
available.
Reviewed-by: Boqun Feng
Signed-off-by: Alexandre Courbot
---
rust/kernel/sizes.rs | 24
1 file changed, 24 insertions(+)
diff --git a/rust/kernel/sizes.rs b/rust/kernel/sizes.rs
index
x27;s fields]
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/dma.rs| 3 -
drivers/gpu/nova-core/firmware.rs | 3 +-
drivers/gpu/nova-core/firmware/fwsec.rs | 395
drivers/gpu/nova-core/gpu.rs| 15 +-
drivers/gpu/nova
Fix the paths that were not absolute to prevent a potential local module
from being picked up.
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/regs/macros.rs | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/nova
: Alexandre Courbot
---
drivers/gpu/nova-core/fb.rs | 70
drivers/gpu/nova-core/fb/hal.rs | 12 +-
drivers/gpu/nova-core/fb/hal/ga100.rs | 12 ++
drivers/gpu/nova-core/fb/hal/ga102.rs | 36 +
drivers/gpu/nova-core/fb/hal/tu102
With all the required pieces in place, load FWSEC-FRTS onto the GSP
falcon, run it, and check that it successfully carved out the WPR2
region out of framebuffer memory.
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/falcon.rs | 3 --
drivers/gpu/nova-core
Some of the firmwares need to be patched at load-time with a signature.
Add a couple of types and traits that sub-modules can use to implement
this behavior, while ensuring that the correct kind of signature is
applied to the firmware.
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre Courbot
FWSEC-FRTS is the first firmware we need to run on the GSP falcon in
order to initiate the GSP boot process. Introduce the structure that
describes it.
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/firmware.rs | 45 +++
1
Since we will need to allocate lots of distinct memory chunks to be
shared between GPU and CPU, introduce a type dedicated to that. It is a
light wrapper around CoherentAllocation.
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/dma.rs | 61
(Write protected
region) before the Booter runs on the SEC2 processor.
Tested on my Ampere GA102 and boot is successful.
[applied changes by Alex Courbot for fwsec signatures]
[acour...@nvidia.com: remove now-unneeded Devres acquisition]
Cc: Alexandre Courbot
Cc: John Hubbard
Cc: Shirish Baskaran
the
GSP and SEC2 Falcons that will be required to perform that dance and
boot the GSP.
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/falcon.rs | 560 ++
drivers/gpu/nova-core/falcon/gsp.rs | 24 ++
drivers/gpu/nova
Tabi]
[applied changes related to code reorg, prints etc from Danilo Krummrich]
[acour...@nvidia.com: fix clippy warnings, read_more() function]
Cc: Alexandre Courbot
Cc: John Hubbard
Cc: Shirish Baskaran
Cc: Alistair Popple
Cc: Timur Tabi
Cc: Ben Skeggs
Signed-off-by: Alexandre Courbot
From: Joel Fernandes
The PMU table in the FWSEC image has to be located to locate the start
of the Falcon ucode in the same or another FWSEC image. Add support for
the same.
Signed-off-by: Joel Fernandes
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/vbios.rs | 179
, and with different fields and documentation.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/regs/macros.rs | 40 ++--
1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/nova-core/regs/macros.rs
b/drivers/gpu/nova-core/regs/macr
: Alexandre Courbot
---
drivers/gpu/nova-core/fb.rs | 66 +++
drivers/gpu/nova-core/fb/hal.rs | 31
drivers/gpu/nova-core/fb/hal/ga100.rs | 45
drivers/gpu/nova-core/fb/hal/tu102.rs | 42
Upon reset, the GPU executes the GFW (GPU Firmware) in order to
initialize its base parameters such as clocks. The driver must ensure
that this step is completed before using the hardware.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gfw.rs | 39
These properties are very useful to have (and to be used by nova-core)
and should be accessible.
Signed-off-by: Alexandre Courbot
---
rust/kernel/dma.rs | 32 ++--
1 file changed, 26 insertions(+), 6 deletions(-)
diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs
This macro is pretty complex, and most rules are just helper, so add a
delimiter to indicate when users only interested in using it can stop
reading.
Reviewed-by: Lyude Paul
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/regs/macros.rs | 2 ++
1 file changed, 2 insertions(+)
diff
`read_poll_timeout` [1] once it
is available.
[1]
https://lore.kernel.org/lkml/20250220070611.214262-8-fujita.tomon...@gmail.com/
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/util.rs | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/gpu/nova
The Turing+ register address space spans over that range, so increase it
as future patches will access more registers.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/driver.rs | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/nova-core/driver.rs b
-by: Alexandre Courbot
---
drivers/gpu/nova-core/regs/macros.rs | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/nova-core/regs/macros.rs
b/drivers/gpu/nova-core/regs/macros.rs
index
d7f09026390b4ccb1c969f2b29caf07fa9204a77
create masks. These operations are provided by this type.
It is introduced to be first used by the nova-core driver.
Signed-off-by: Alexandre Courbot
---
rust/kernel/lib.rs | 1 +
rust/kernel/num.rs | 173 +
2 files changed, 174 insertions
Add an equivalent to the `fls` (Find Last Set bit) C function to Rust
unsigned types.
It is to be first used by the nova-core driver.
Signed-off-by: Alexandre Courbot
---
rust/kernel/num.rs | 31 +++
1 file changed, 31 insertions(+)
diff --git a/rust/kernel/num.rs
elagn...@nvidia.com/
Signed-off-by: Alexandre Courbot
---
Changes in v5:
- Rebased on top of 6.16-rc1.
- Improve invariants of CoherentAllocation related to the new `size`
method.
- Use SZ_* consts when redefining BAR0 size.
- Split VBIOS patch into 3 patches (Joel)
- Convert all `Result<()>` i
We will use this error in the nova-core driver.
Reviewed-by: Benno Lossin
Signed-off-by: Alexandre Courbot
---
rust/kernel/error.rs | 1 +
1 file changed, 1 insertion(+)
diff --git a/rust/kernel/error.rs b/rust/kernel/error.rs
index
3dee3139fcd4379b94748c0ba1965f4e1865b633
On Thu Jun 12, 2025 at 10:17 PM JST, Alexandre Courbot wrote:
> On Wed Jun 4, 2025 at 4:18 PM JST, Benno Lossin wrote:
>> On Wed Jun 4, 2025 at 2:05 AM CEST, Alexandre Courbot wrote:
>>> On Wed Jun 4, 2025 at 8:02 AM JST, Benno Lossin wrote:
>>>> On Mon Jun 2, 2
On Wed Jun 4, 2025 at 4:18 PM JST, Benno Lossin wrote:
> On Wed Jun 4, 2025 at 2:05 AM CEST, Alexandre Courbot wrote:
>> On Wed Jun 4, 2025 at 8:02 AM JST, Benno Lossin wrote:
>>> On Mon Jun 2, 2025 at 3:09 PM CEST, Alexandre Courbot wrote:
>>>> On Thu May 29, 202
On Thu Jun 12, 2025 at 7:54 PM JST, Danilo Krummrich wrote:
> On 6/12/25 9:19 AM, Alexandre Courbot wrote:
>> On Wed Jun 4, 2025 at 7:28 PM JST, Danilo Krummrich wrote:
>>> If we can't patch them when the object is created, i.e. in
>>> FirmwareDmaObject::new(), I th
On Wed Jun 4, 2025 at 7:42 PM JST, Danilo Krummrich wrote:
> On Wed, May 21, 2025 at 03:45:14PM +0900, Alexandre Courbot wrote:
>> +impl FirmwareDmaObject {
>> +/// Patch the Fwsec firmware image in `fw` to run the command `cmd`.
>> +fn patch_command(&mut self, v3
On Wed Jun 4, 2025 at 7:28 PM JST, Danilo Krummrich wrote:
> On Wed, May 21, 2025 at 03:45:13PM +0900, Alexandre Courbot wrote:
>> +/// A [`DmaObject`] containing a specific microcode ready to be loaded into
>> a falcon.
>> +///
>> +/// This is module-local and m
On Wed Jun 4, 2025 at 7:23 PM JST, Danilo Krummrich wrote:
> On Wed, May 21, 2025 at 03:45:12PM +0900, Alexandre Courbot wrote:
>> +impl Chipset {
>> +/// Returns the HAL corresponding to this chipset.
>> +pub(super) fn get_fb_fal(self) -> &'static dyn FbHa
On Wed Jun 4, 2025 at 7:24 PM JST, Danilo Krummrich wrote:
> On Wed, Jun 04, 2025 at 01:18:37PM +0900, Alexandre Courbot wrote:
>> On Wed Jun 4, 2025 at 6:14 AM JST, Lyude Paul wrote:
>> > On Wed, 2025-05-21 at 15:45 +0900, Alexandre Courbot wrote:
>> >> +
On Wed Jun 4, 2025 at 6:14 AM JST, Lyude Paul wrote:
> On Wed, 2025-05-21 at 15:45 +0900, Alexandre Courbot wrote:
>> FWSEC-FRTS is run with the desired address of the FRTS region as
>> parameter, which we need to compute depending on some hardware
>> parameters.
>>
On Mon Jun 2, 2025 at 9:26 PM JST, Danilo Krummrich wrote:
> On Wed, May 21, 2025 at 03:45:10PM +0900, Alexandre Courbot wrote:
>> FWSEC-FRTS is the first firmware we need to run on the GSP falcon in
>> order to initiate the GSP boot process. Introduce the structure that
On Wed Jun 4, 2025 at 6:45 AM JST, Lyude Paul wrote:
> On Wed, 2025-05-21 at 15:45 +0900, Alexandre Courbot wrote:
>> With all the required pieces in place, load FWSEC-FRTS onto the GSP
>> falcon, run it, and check that it successfully carved out the WPR2
>> region out
On Fri May 30, 2025 at 6:30 AM JST, Timur Tabi wrote:
> On Wed, 2025-05-21 at 15:45 +0900, Alexandre Courbot wrote:
>
> I noticed something interesting in this change to Gpu::new().
>
>> + // Check that the WPR2 region does not already exists - if it does,
>
On Wed Jun 4, 2025 at 6:32 AM JST, Lyude Paul wrote:
>> +unsafe fn transmute<'a, 'b, T: Sized + FromBytes>(
>> +fw: &'a DmaObject,
>> +offset: usize,
>> +) -> Result<&'b T> {
>> +if offset + core::mem::size_of::() > fw.size() {
>> +return Err(EINVAL);
>> +}
>> +if (fw.s
On Wed Jun 4, 2025 at 8:02 AM JST, Benno Lossin wrote:
> On Mon Jun 2, 2025 at 3:09 PM CEST, Alexandre Courbot wrote:
>> On Thu May 29, 2025 at 4:27 PM JST, Benno Lossin wrote:
>>> On Thu May 29, 2025 at 3:18 AM CEST, Alexandre Courbot wrote:
>>>> On Thu May 29, 202
On Wed Jun 4, 2025 at 7:53 AM JST, Benno Lossin wrote:
> On Mon Jun 2, 2025 at 11:39 AM CEST, Danilo Krummrich wrote:
>> On Thu, May 29, 2025 at 09:27:33AM +0200, Benno Lossin wrote:
>>> That's also fair, but we lose the constness of `next_multiple_of`, so
>>> you can't use `align_up` in a const fu
On Tue Jun 3, 2025 at 12:15 AM JST, Joel Fernandes wrote:
> On Mon, Jun 02, 2025 at 03:33:56PM +0200, Danilo Krummrich wrote:
>> On Wed, May 21, 2025 at 03:45:11PM +0900, Alexandre Courbot wrote:
>> > +impl Vbios {
>>
>>
>>
>> > +pub(crate)
Hi Lyude, thanks for the review!
On Sat May 31, 2025 at 7:22 AM JST, Lyude Paul wrote:
>> +/// `target_mem`.
>> +///
>> +/// `sec` is set if the loaded firmware is expected to run in secure
>> mode.
>> +fn dma_wr(
>> +&self,
>> +bar: &Bar0,
>> +dma_handle:
On Mon Jun 2, 2025 at 9:06 PM JST, Danilo Krummrich wrote:
> On Wed, May 21, 2025 at 03:45:09PM +0900, Alexandre Courbot wrote:
>> Add the common Falcon code and HAL for Ampere GPUs, and instantiate the
>> GSP and SEC2 Falcons that will be required to boot the GSP.
>
> Maybe
On Thu May 29, 2025 at 4:27 PM JST, Benno Lossin wrote:
> On Thu May 29, 2025 at 3:18 AM CEST, Alexandre Courbot wrote:
>> On Thu May 29, 2025 at 5:17 AM JST, Benno Lossin wrote:
>>> On Wed May 21, 2025 at 8:44 AM CEST, Alexandre Courbot wrote:
>>>> Introduce t
On Sat May 31, 2025 at 11:37 PM JST, Danilo Krummrich wrote:
> On Sat, May 31, 2025 at 04:09:29PM +0200, Miguel Ojeda wrote:
>> On Fri, May 30, 2025 at 11:51 PM Lyude Paul wrote:
>> > TBH - we should really add some safe bindings for sleeps instead of calling
>> > this unsafely, I'd be happy to re
On Sat May 31, 2025 at 6:46 AM JST, Lyude Paul wrote:
> On Wed, 2025-05-21 at 15:45 +0900, Alexandre Courbot wrote:
>>
>> -const BAR0_SIZE: usize = 8;
>> +const BAR0_SIZE: usize = 0x100;
>> pub(crate) type Bar0 = pci::Bar;
>>
>
> Hm, conside
On Mon Jun 2, 2025 at 8:09 PM JST, Danilo Krummrich wrote:
> On Fri, May 30, 2025 at 05:57:44PM -0400, Lyude Paul wrote:
>> On Wed, 2025-05-21 at 15:45 +0900, Alexandre Courbot wrote:
>> > Reserve a page of system memory so sysmembar can perform a read on it if
>> > a
On Wed May 28, 2025 at 5:38 AM JST, Joel Fernandes wrote:
> Hello,
> I split this particular patch into 3 patches:
>
> gpu: nova-core: vbios: Add support for FWSEC ucode extraction
> gpu: nova-core: vbios: Add support to look up PMU table in FWSEC
> gpu: nova-core: vbios: Add base support for VBIOS
Hi Alice,
On Thu May 29, 2025 at 4:56 AM JST, Alice Ryhl wrote:
> On Wed, May 21, 2025 at 8:45 AM Alexandre Courbot wrote:
>>
>> Introduce the `num` module, featuring the `NumExt` extension trait
>> that expands unsigned integers with useful operations for the kernel.
>&
On Thu May 29, 2025 at 5:17 AM JST, Benno Lossin wrote:
> On Wed May 21, 2025 at 8:44 AM CEST, Alexandre Courbot wrote:
>> Introduce the `num` module, featuring the `NumExt` extension trait
>> that expands unsigned integers with useful operations for the kernel.
>>
>>
On Thu May 22, 2025 at 5:44 PM JST, Miguel Ojeda wrote:
> On Thu, May 22, 2025 at 6:01 AM Alexandre Courbot wrote:
>>
>> Either that, or we enable `#![feature(const_trait_impl)]`. I just tried
>> and with it we could indeed define and implement `NumExt` as const,
>> wh
On Wed May 21, 2025 at 9:43 PM JST, Boqun Feng wrote:
> On Wed, May 21, 2025 at 03:44:56PM +0900, Alexandre Courbot wrote:
>> These properties are very useful to have and should be accessible.
>>
>> Signed-off-by: Alexandre Courbot
>> ---
>> rust/kernel/dma.rs |
On Wed May 21, 2025 at 5:00 PM JST, Danilo Krummrich wrote:
> On Wed, May 21, 2025 at 03:44:56PM +0900, Alexandre Courbot wrote:
>> These properties are very useful to have and should be accessible.
>>
>> Signed-off-by: Alexandre Courbot
>> ---
On Wed May 21, 2025 at 5:37 PM JST, Danilo Krummrich wrote:
> On Wed, May 21, 2025 at 03:45:03PM +0900, Alexandre Courbot wrote:
>> Some registers (notably scratch registers) don't have a definitive
>> purpose, but need to be interpreted differently depending on context.
>&g
On Wed May 21, 2025 at 3:44 PM JST, Alexandre Courbot wrote:
> Introduce the `num` module, featuring the `NumExt` extension trait
> that expands unsigned integers with useful operations for the kernel.
>
> These are to be used by the nova-core driver, but they are so ubiquitous
Reserve a page of system memory so sysmembar can perform a read on it if
a system write occurred since the last flush. Do this early as it can be
required to e.g. reset the GPU falcons.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gpu.rs | 45
Since we will need to allocate lots of distinct memory chunks to be
shared between GPU and CPU, introduce a type dedicated to that. It is a
light wrapper around CoherentAllocation.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/dma.rs | 61
Upon reset, the GPU executes the GFW (GPU Firmware) in order to
initialize its base parameters such as clocks. The driver must ensure
that this step is completed before using the hardware.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gfw.rs | 37
This macro is pretty complex, and most rules are just helper, so add a
delimiter to indicate when users only interested in using it can stop
reading.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/regs/macros.rs | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/nova
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