Am Donnerstag, 15. Mai 2025, 00:24:52 CEST schrieb Marco Felsch:
> Make use of dev_err_probe() to easily spot issues via the debugfs or
> kernel log. No functional changes.
>
> Signed-off-by: Marco Felsch
Reviewed-by: Alexander Stein
> ---
> drivers/gpu/drm/bri
Use dev_err_probe() to add a reason for deferred probe. This can
especially happen on lcdif3 which uses hdmi_tx_phy for 'pix' clock
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/mxsfb/lcdif_drv.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drive
Am Donnerstag, 17. April 2025, 17:19:33 CEST schrieb Frank Li:
> Convert fsl,dcu.txt to yaml format.
>
> Additional changes:
> - remove label in example.
> - change node to display-controller in example.
> - use 32bit address in example.
>
> Signed-off-by: Frank Li
> ---
> .../devicetree/bindin
Am Mittwoch, 16. April 2025, 23:19:27 CEST schrieb Frank Li:
> Convert ldb.txt to yaml format.
>
> Additional changes
> - fix clock-names order to match existed dts file.
> - remove lvds-panel and iomuxc-gpr node in examples.
> - fsl,imx6q-ldb fail back to fsl,imx53-ldb.
>
> Signed-off-by: Frank
This is a RGB to HDMI bridge, so set the bridge type accordingly.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/sii902x.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c
index 914a2609a685f..ab70df3b60eb8 100644
Hi Marek,
Am Dienstag, 25. März 2025, 00:35:41 CET schrieb Marek Vasut:
> On 3/24/25 8:02 AM, Alexander Stein wrote:
>
> Hi,
>
> >> @@ -1890,6 +1919,35 @@ netc_emdio: mdio@0,0 {
> >>};
> >>};
> >>
> &g
Am Freitag, 21. März 2025, 21:05:59 CET schrieb Marek Vasut:
> The instance of the GPU populated in i.MX95 is the G310,
> describe this GPU in the DT. Include description of the
> GPUMIX block controller, which can be operated as a simple
> reset. Include dummy GPU voltage regulator and OPP tables.
Hi,
Am Dienstag, 4. März 2025, 16:23:20 CET schrieb Rob Herring:
> On Tue, Mar 04, 2025 at 06:15:28PM +0800, Liu Ying wrote:
> > A DPI color encoder, as a simple display bridge, converts input DPI color
> > coding to output DPI color coding, like Adafruit Kippah DPI hat[1] which
> > converts input
Hi,
Am Dienstag, 4. März 2025, 11:15:25 CET schrieb Liu Ying:
> Hi,
>
> This patch series aims to add DPI color encoder support as a simple DRM
> bridge. A DPI color encoder simply converts input DPI color coding to
> output DPI color coding, like Adafruit Kippah DPI hat[1] which converts
> inpu
Hi,
thanks for the update.
Am Dienstag, 4. März 2025, 09:24:34 CET schrieb Liu Ying:
> NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which
> configures parallel display format by using the "PARALLEL_DISP_FORMAT"
> field. Add a DRM bridge driver to support the display format confi
"apb", "axi", "nic", "disp", "cam",
> "pxp", "lcdif", "isi", "csi", "dsi";
> + #address-cells = <1>;
> + #size-cells = <1>;
>#pow
Am Donnerstag, 27. Februar 2025, 23:21:22 CET schrieb Frank Li:
> On Thu, Feb 27, 2025 at 10:34:20PM +0100, Marek Vasut wrote:
> > On 2/27/25 10:27 PM, Frank Li wrote:
> >
> > [...]
> >
> > > > > > + gpu: gpu@4d90 {
> > > > > > + compatible = "fsl,imx95-mali",
> > >
Hi Marek,
Am Donnerstag, 27. Februar 2025, 17:58:09 CET schrieb Marek Vasut:
> The instance of the GPU populated in i.MX95 is the G310,
> describe this GPU in the DT. Include description of the
> GPUMIX block controller, which can be operated as a simple
> reset. Include dummy GPU voltage regulato
Hi Marek,
Am Donnerstag, 27. Februar 2025, 17:58:08 CET schrieb Marek Vasut:
> The instance of the GPU populated in Freescale i.MX95 is the
> Mali G310, add support for this variant.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Boris Brezillon
> Cc: Conor Dooley
> Cc: David Airlie
> Cc: Fabio E
Am Donnerstag, 27. Februar 2025, 17:58:07 CET schrieb Marek Vasut:
> The instance of the GPU populated in Freescale i.MX95 is the
> Mali G310, document support for this variant.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Alexander Stein
> ---
> Cc: Boris Brezillon
> C
Am Donnerstag, 27. Februar 2025, 17:58:05 CET schrieb Marek Vasut:
> The driver code power domain binding to driver instances only works
> for single power domain, in case there are multiple power domains,
> it is necessary to explicitly attach via dev_pm_domain_attach*().
> As DT bindings list sup
Hi Marek,
Am Donnerstag, 27. Februar 2025, 17:58:04 CET schrieb Marek Vasut:
> The instance of the GPU populated in Freescale i.MX95 does require
> release from reset by writing into a single GPUMIX block controller
> GPURESET register bit 0. Implement support for one optional reset.
>
> Signed-o
Hi Marek,
Am Donnerstag, 27. Februar 2025, 17:58:02 CET schrieb Marek Vasut:
> The instance of the GPU populated in Freescale i.MX95 does require
> release from reset by writing into a single GPUMIX block controller
> GPURESET register bit 0. Implement support for this reset register.
>
> Signed-
Polarity for DE is stored in bridge state. Use this flag for setting
the DE polarity in the bridge.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
b/drivers/gpu/drm/bridge/ti
support for a recovery
> mechanism.
>
> Compare to the previous iteration, this v6 series fixes a NULL
> pointer dereference.
>
> Best regards,
> Hervé Codina
FWIW
Tested-by: Alexander Stein #tqma8mqml-mba8mx
> Changes v5 -> v6
> v5:
> https://lore.kernel.o
i.MX91/93 have a single register specifying parallel display output
format. Add a bridge driver for setting the corresponding format.
Currently only RGB565, RGB666 and RGB888 output is supported.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/Kconfig| 10 +
drivers
nsure about the name. There is no dedicated IP, according to
reference manual, just that single register. I would also agree
to imx9-dpi or imx93-dpi.
Note: It's only applicable to i.MX91/93, but not i.MX95!
Tested on TQMa9352 on MBa91xxCA
Best regards,
Alexander
Alexander Stein (2):
d
The i.MX91/93 contains a single syscon registers which is responsible
for configuring DPI output format. Add DT binding which represents
this configuration as a bridge.
Signed-off-by: Alexander Stein
---
.../bridge/fsl,imx9-parallel-disp-fmt.yaml| 78 +++
1 file changed, 78
Hi Herve,
Am Freitag, 7. Februar 2025, 19:08:16 CET schrieb Herve Codina:
> Hi Alexander,
>
> On Thu, 06 Feb 2025 16:39:09 +0100
> Alexander Stein wrote:
>
> > Hi Herve,
> >
> > Am Donnerstag, 6. Februar 2025, 16:20:48 CET schrieb Herve Codina:
> > >
Hi Herve,
Am Donnerstag, 6. Februar 2025, 16:20:48 CET schrieb Herve Codina:
> Hi Alexander,
>
> On Thu, 06 Feb 2025 15:38:42 +0100
> Alexander Stein wrote:
>
> ...
> > With interrupt configured I got the following stack trace upon
> > reboot/poweroff:
> >
Hi,
Am Montag, 3. Februar 2025, 17:16:06 CET schrieb Herve Codina:
> In some cases observed during ESD tests, the TI SN65DSI83 cannot recover
> from errors by itself. A full restart of the bridge is needed in those
> cases to have the bridge output LVDS signals again.
>
> Also, during tests, case
Hi,
Am Donnerstag, 23. Januar 2025, 17:20:34 CET schrieb Tomi Valkeinen:
> Hi,
>
> On 16/01/2025 13:16, Jayesh Choudhary wrote:
> > For the cases we have DRM_BRIDGE_ATTACH_NO_CONNECTOR flag set,
>
> Any idea if any other platform than K3 is using this driver? tidss
> supports DRM_BRIDGE_ATTACH_
This is a DSI bridge, so set the bridge type accordingly.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/nwl-dsi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c
index 1e5b2a37cb8c9..6f2581e0034b4 100644
--- a
This is a DSI to LVDS bridge, so set the bridge type accordingly.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
index 336380114eea9
Hi,
I'm sorry I'm late to the party.
Am Mittwoch, 14. August 2024, 12:37:26 CET schrieb Esben Haabendal:
> Using the correct bit helps. The documentation specifies bit 0 in both
> registers to be controlling polarity of dpi_vsync_input and
> dpi_hsync_input polarity. Bit 1 is reserved, and should
hg33.dtb:
> dsi@30a0: ports:port@1:endpoint: Unevaluated properties are not allowed
> ('data-lanes' was unexpected)
>
> Signed-off-by: Frank Li
I've had a similar patch WIP. Looks good to me. For the record I based
my local change according to commit 54df4868fb728 (&qu
Hi Herve,
Am Mittwoch, 8. Januar 2025, 18:44:42 CET schrieb Herve Codina:
> Hi Alexander,
>
> On Wed, 08 Jan 2025 11:54:49 +0100
> Alexander Stein wrote:
>
> [...]
> > > #include
> > > #include
> > > +#include /* DRM_MODESET_LOCK_ALL_BEG
Hi Herve,
Am Donnerstag, 9. Januar 2025, 11:38:34 CET schrieb Herve Codina:
> Hi Alexander,
>
> On Wed, 8 Jan 2025 18:44:42 +0100
> Herve Codina wrote:
>
> > > > #include
> > > > #include
> > > > +#include /* DRM_MODESET_LOCK_ALL_BEGIN() needs
> > > > drm_drv_uses_atomic_modeset() */
Hi Herve,
Am Mittwoch, 8. Januar 2025, 11:19:02 CET schrieb Herve Codina:
> In some cases observed during ESD tests, the TI SN65DSI83 cannot recover
> from errors by itself. A full restart of the bridge is needed in those
> cases to have the bridge output LVDS signals again.
>
> Also, during test
Hi,
Am Mittwoch, 8. Januar 2025, 04:13:51 CET schrieb Liu Ying:
> On 01/07/2025, Alexander Stein wrote:
> > Hi everyone,
>
> Hi Alexander,
>
> >
> > this is a v2 of an old series still in my queue.
> >
> > Changes in v2:
> > * Rebase to ne
Hi,
Am Mittwoch, 8. Januar 2025, 04:37:55 CET schrieb Liu Ying:
> On 01/07/2025, Alexander Stein wrote:
> > This simplifies the code and gives additional information upon deferral.
> >
> > Signed-off-by: Alexander Stein
> > ---
> > drivers/gpu/drm
Hi,
Am Mittwoch, 8. Januar 2025, 04:22:19 CET schrieb Liu Ying:
> On 01/07/2025, Alexander Stein wrote:
> > This simplifies the code and gives additional information upon deferral.
> >
> > Signed-off-by: Alexander Stein
> > ---
> > drivers/gpu/drm/
Hi,
Am Mittwoch, 8. Januar 2025, 01:31:11 CET schrieb Sandor Yu:
> > Hi,
> >
> > Am Dienstag, 7. Januar 2025, 15:42:56 CET schrieb Sandor Yu:
> > > Hi Alexander
> > >
> > > It may cause by the first preferred mode in EDID is not supported by
> > > driver.
> > > Please use modetest or other user a
Hi,
Am Dienstag, 7. Januar 2025, 15:42:56 CET schrieb Sandor Yu:
> Hi Alexander
>
> It may cause by the first preferred mode in EDID is not supported by driver.
> Please use modetest or other user application to change the video mode to CTA
> standard modes.
> Such as148.5MHz 1080p60 or 594MHz 3
This simplifies the code and gives additional information upon deferral.
Signed-off-by: Alexander Stein
---
.../gpu/drm/bridge/imx/imx8qxp-pixel-link.c | 19 ++-
1 file changed, 6 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c
b
This simplifies the code and gives additional information upon deferral.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/imx/imx-ldb-helper.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/bridge/imx/imx-ldb-helper.c
b/drivers/gpu
This simplifies the code and gives additional information upon deferral.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c | 37
1 file changed, 12 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c
b/drivers
Hi everyone,
this is a v2 of an old series still in my queue.
Changes in v2:
* Rebase to next-20250107
* Remove 'imx' prefix for commit subject in patch 2 & 3
Best regards,
Alexander
Alexander Stein (4):
drm/bridge: imx8qxp-pxl2dpi: Use dev_err_probe
drm/bridge: im
This simplifies the code and gives additional information upon deferral.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c | 26 ++--
1 file changed, 7 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c
b
Hi Fabio,
Am Dienstag, 7. Januar 2025, 11:35:48 CET schrieb Fabio Estevam:
> Hi Alexander,
>
> On Tue, Jan 7, 2025 at 6:50 AM Alexander Stein
> wrote:
> >
> > This add a imx7(d) specific compatible which is compatible to imx8mm.
> > This silences the dtbs_check
#x27;] is too long
Signed-off-by: Alexander Stein
---
.../devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml
b/Documentation/devicetree/bindin
'
from schema $id:
http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml#
Signed-off-by: Alexander Stein
---
arch/arm/boot/dts/nxp/imx/imx7s.dtsi | 56 ++--
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/arch/arm/boot/dts/nxp/imx/imx7s.d
Hi,
this fixes two dtbs_check warnings by moving the video muxing node out of gpr
and adding a new imx7 specific DSI compatible to DT schema.
Best regards,
Alexander
Alexander Stein (2):
ARM: dts: imx7s: Move csi-mux to below root
dt-bindings: samsung,mipi-dsim: Add imx7d specific
Hi Sandor,
thanks for the updates.
Am Dienstag, 17. Dezember 2024, 07:51:42 CET schrieb Sandor Yu:
> The patch set initial support Cadence MHDP8501(HDMI/DP) DRM bridge
> driver and Cadence HDP-TX PHY(HDMI/DP) driver for Freescale i.MX8MQ.
>
> The patch set compose of DRM bridge drivers and PHY d
Hi Marek,
Am Samstag, 26. Oktober 2024, 06:10:42 CET schrieb Marek Vasut:
> The driver configures mostly Pixel PLL from the clock cached in
> local copy of the mode. Make sure the driver uses adjusted mode
> which contains the updated Pixel PLL settings negotiated in
> tc_dpi_atomic_check()/tc_edp
Am Freitag, 18. Oktober 2024, 14:31:20 CEST schrieb Dmitry Baryshkov:
> On Fri, Oct 18, 2024 at 02:48:12PM +0800, Liu Ying wrote:
> > Set DW HDMI platform data's output_port to 1 in imx8mp_dw_hdmi_probe()
> > so that dw_hdmi_probe() called by imx8mp_dw_hdmi_probe() can tell the
> > DW HDMI bridge c
the DW HDMI bridge core driver would
> try to attach the next bridge which is the HDMI connector.
>
> Signed-off-by: Liu Ying
Looks similar to imx8mp-tqma8mpql-mba8mpxl.dts, so:
Reviewed-by: Alexander Stein
> ---
> .../dts/freescale/imx8mp-msc-sm2s-ep1.dts | 19 ++
the DW HDMI bridge core driver would
> try to attach the next bridge which is the HDMI connector.
>
> Signed-off-by: Liu Ying
Looks similar to imx8mp-tqma8mpql-mba8mpxl.dts, so:
Reviewed-by: Alexander Stein
> ---
> .../imx8mp-kontron-smarc-eval-carrier.dts | 19 ++
the DW HDMI bridge core driver would
> try to attach the next bridge which is the HDMI connector.
>
> Signed-off-by: Liu Ying
Looks similar to imx8mp-tqma8mpql-mba8mpxl.dts, so:
Reviewed-by: Alexander Stein
> ---
> .../dts/freescale/imx8mp-kontron-bl-osm-s.dts | 19 ++
by devicetree.
> This is a preparation for making the i.MX8MP LCDIF driver use
> drm_bridge_connector which requires the DRM_BRIDGE_ATTACH_NO_CONNECTOR
> flag.
>
> Signed-off-by: Liu Ying
Reviewed-by: Alexander Stein
> ---
> drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c | 1 +
>
ed this using HDMI output. HPD and CEC is still working.
Also output using a DSI->DP bridge (tc358767) also works.
My platform: imx8mp-tqma8mpql-mba8mpxl.dts
Tested-by: Alexander Stein
> ---
> drivers/gpu/drm/mxsfb/Kconfig | 1 +
> drivers/gpu/drm/mxsfb/lcdif_drv.c | 17 +++
Hi everyone,
Am Freitag, 27. September 2024, 01:13:57 CEST schrieb Dmitry Baryshkov:
> On Thu, Sep 26, 2024 at 04:09:03PM GMT, Alexander Stein wrote:
> > Hi Dmitry,
> >
> > Am Donnerstag, 26. September 2024, 08:05:56 CEST schrieb Dmitry Baryshkov:
> > > On Thu,
Hi Dmitry,
Am Donnerstag, 26. September 2024, 08:05:56 CEST schrieb Dmitry Baryshkov:
> On Thu, Sep 26, 2024 at 07:55:51AM GMT, Alexander Stein wrote:
> > From: Matthias Schiffer
> >
> > The PIXCLK needs to be enabled in SCFG before accessing certain DCU
> > registe
fsl_dcu_drm_modeset_init can return -EPROBE_DEFER, so use dev_err_probe
to remove an invalid error message and add it to deferral description.
Signed-off-by: Alexander Stein
---
Changes in v2:
* None
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 6 ++
1 file changed, 2 insertions(+), 4
From: Matthias Schiffer
The PIXCLK needs to be enabled in SCFG before accessing certain DCU
registers, or the access will hang. For simplicity, the PIXCLK is enabled
unconditionally, resulting in increased power consumption.
Signed-off-by: Matthias Schiffer
Signed-off-by: Alexander Stein
Hi Sandor,
Am Dienstag, 24. September 2024, 09:36:46 CEST schrieb Sandor Yu:
> MHDP8546 mailbox access functions will be share to other mhdp driver
> and Cadence HDP-TX HDMI/DP PHY drivers.
> Create a new mhdp helper driver and move all those functions into.
>
> cdns_mhdp_reg_write() is renamed t
When drm/bridge-connector was moved to DRM_DISPLAY_HELPER not all
users were updated. Add missing Kconfig selections.
Fixes: 9da7ec9b19d8 ("drm/bridge-connector: move to DRM_DISPLAY_HELPER module")
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/imx/ipuv3/Kconfig | 2 ++
1 file
: Alexander Stein
Reviewed-by: Robert Foss
---
drivers/gpu/drm/bridge/tc358767.c | 40 ---
1 file changed, 26 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/bridge/tc358767.c
b/drivers/gpu/drm/bridge/tc358767.c
index 1c42c8c6e632e..159c95b26d33c 100644
--- a
Currently the output the following output is printed upon each interrupt:
tc358767 1-000f: GPIO0:
This spams the kernel log while debugging an IRQ storm from the bridge.
Only print the debug output if the GPIO hotplug event actually happened.
Signed-off-by: Alexander Stein
Reviewed-by: Robert
The function calls preceding these returns can return -EPROBE_DEFER. So
use dev_err_probe to add some information to
/sys/kernel/debug/devices_deferred
Signed-off-by: Alexander Stein
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/tc358767.c | 8 +---
1 file changed, 5 insertions
write-only registers
Best regards,
Alexander
Alexander Stein (3):
drm/bridge: tc358767: Use dev_err_probe
drm/bridge: tc358767: Only print GPIO debug output if they actually
occur
drm/bridge: tc358767: Support write-only registers
drivers/gpu/drm/bridge/tc358
From: Matthias Schiffer
The PIXCLK needs to be enabled in SCFG before accessing certain DCU
registers, or the access will hang.
Signed-off-by: Matthias Schiffer
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/fsl-dcu/Kconfig | 1 +
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 14
fsl_dcu_drm_modeset_init can return -EPROBE_DEFER, so use dev_err_probe
to remove an invalid error message and add it to deferral description.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a
drivers/gpu/ipu-v3).
You might want to adjust the commit message.
Tested-by: Alexander Stein
Best regards,
Alexander
> Am 04.09.24 um 00:53 schrieb Linus Walleij:
> > On Fri, Apr 19, 2024 at 10:35 AM Thomas Zimmermann
> > wrote:
> >
> >> Add support for damage
Hi Linus,
Am Mittwoch, 4. September 2024, 08:36:46 CEST schrieb Linus Walleij:
> On Wed, Sep 4, 2024 at 8:09 AM Alexander Stein
> wrote:
>
> > Can you please check in which memory zone this VRAM is located. In my case
> > it's important CMA is located in Normal zo
Hi Linus,
Am Mittwoch, 4. September 2024, 00:53:42 CEST schrieb Linus Walleij:
> On Fri, Apr 19, 2024 at 10:35 AM Thomas Zimmermann
> wrote:
>
> > Add support for damage handling and deferred I/O to fbdev-dma. This
> > enables fbdev-dma to support all DMA-memory-based DRM drivers, even
> > such
Hello,
I noticed that on linux-next one platform (TQMa6S imx6qdl-mba6.dtsi, using
i.MX6 Solo) I'm hitting SIGBUS errors when using fb-test on /dev/fb0.
strace shows:
> openat(AT_FDCWD, "/dev/fb0", O_RDWR|O_LARGEFILE) = 4
> ioctl(4, FBIOGET_VSCREENINFO, 0x4cb818) = 0
> ioctl(4, FBIOGET_FSCREENINFO,
Hi,
with more and more patches for TC9595 support got meged into linux-next,
only a few remain on my patch stack.
This is one of them and is necessary for DP support:
Tested-by: Alexander Stein
Am Dienstag, 25. Juni 2024, 14:26:10 CEST schrieb Marek Vasut:
> Initialize the bridge on att
/soc@0/bus@3080/mipi-dsi@30a0 to encoder None-34: -517
Signed-off-by: Alexander Stein
Reviewed-by: Robert Foss
---
Changes in v5:
* Added dev_err_probe() call if probe deferral occurs
drivers/gpu/drm/drm_bridge.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a
/soc@0/bus@3080/mipi-dsi@30a0 to encoder None-34: -517
Signed-off-by: Alexander Stein
Reviewed-by: Robert Foss
---
Changes in v4:
* Rebased to next-20240628
drivers/gpu/drm/drm_bridge.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_bridge.c b
FIELD_PREP(DP0_SRCCTRL_PRE1, tc->pre_emphasis[1]));
> if (ret)
> return ret;
>
> @@ -2435,6 +2454,18 @@ static int tc_probe_bridge_endpoint(struct tc_data *tc)
> return -EINVAL;
> }
>
Hi Marek,
Am Dienstag, 25. Juni 2024, 14:05:14 CEST schrieb Marek Vasut:
> Document default DP port preemphasis configurable via new DT property
> "toshiba,pre-emphasis". This is useful in case the DP link properties
> are known and starting link training from preemphasis setting of 0 dB
> is not
h callback called from DSIM attach callback,
> and recovered out of the debug mode just before TC9595 performs first
> AUX channel access later in its attach callback.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Adam Ford
> Cc: Alexander Stein
> Cc: Andrzej Hajda
> Cc: Dan
Hi Marek,
Am Dienstag, 25. Juni 2024, 02:33:53 CEST schrieb Marek Vasut:
> On 6/24/24 11:26 AM, Alexander Stein wrote:
> > Hi Marek,
>
> Hi,
>
> > Am Freitag, 21. Juni 2024, 16:54:51 CEST schrieb Marek Vasut:
> >> On 6/21/24 12:32 PM, Alexander Stein wrote:
>
Hi Dmitry,
Am Montag, 24. Juni 2024, 13:49:03 CEST schrieb Dmitry Baryshkov:
> On Mon, 24 Jun 2024 at 14:32, Alexander Stein
> wrote:
> >
> > Hi,
> >
> > Am Montag, 24. Juni 2024, 12:31:46 CEST schrieb Dmitry Baryshkov:
> > > Existing in-kernel device
Hi,
Am Montag, 24. Juni 2024, 12:31:46 CEST schrieb Dmitry Baryshkov:
> Existing in-kernel device trees use LCDIF with the dsim + adv7533, dsim
> + tc358762 or with ldb + panel_bridge. All these combinations support
> using DRM_BRIDGE_ATTACH_NO_CONNECTOR for bridge attachment.
>
> Change lcdif dr
Hi,
Am Montag, 24. Juni 2024, 11:49:04 CEST schrieb Dmitry Baryshkov:
> On Mon, Jun 24, 2024 at 03:07:10PM GMT, Aradhya Bhatia wrote:
> >
> >
> > On 22/06/24 17:49, Dmitry Baryshkov wrote:
> > > On Sat, Jun 22, 2024 at 05:16:58PM GMT, Aradhya Bhatia wrote:
> > >>
> > >>
> > >> On 17-Jun-24 13:41
Hi Marek,
Am Freitag, 21. Juni 2024, 16:54:51 CEST schrieb Marek Vasut:
> On 6/21/24 12:32 PM, Alexander Stein wrote:
>
> Hi,
>
> skipping the parts where I would simply write "OK" ...
>
> >>>> As FVUEN is cleared at the next VSYNC event I suspect the
the AUX channel. That way,
> the AUX channel communication from this point on does surely run at
> 10 MHz as it should.
>
> Signed-off-by: Marek Vasut
This does the trick on my hardware as well.
Reviewed-by: Alexander Stein
> ---
> Cc: Adam Ford
> Cc: Alexander Stein
> Cc:
ack called from DSIM attach callback,
> and recovered out of the debug mode just before TC9595 performs first
> AUX channel access later in its attach callback.
>
> Signed-off-by: Marek Vasut
This does the trick on my hardware as well.
Reviewed-by: Alexander Stein
> ---
> Cc: Adam For
g. when LCDIFv3 feeds DSIM which feeds TC358767
> with (e)DP output, where the TC358767 expects precise timing on
> its input side, the precise timing must be generated by the LCDIF.
>
> Signed-off-by: Marek Vasut
With the other rc358767 patches in place, this does the trick.
R
Am Montag, 24. Juni 2024, 09:45:13 CEST schrieb Alexander Stein:
> Hi,
>
> Am Sonntag, 23. Juni 2024, 16:38:36 CEST schrieb Marek Vasut:
> > The MIPI_DSI_CLOCK_NON_CONTINUOUS causes visible artifacts in high
> > resolution modes, disable it. Namely, in DSI->DP mode 1920x
urn 0;
> }
>
> -static u32 div64_round_up(u64 v, u32 d)
> +static int tc_pxl_pll_calc(struct tc_data *tc, u32 refclk, u32 pixelclock,
> +int *out_best_pixelclock, u32 *out_pxl_pllparam)
> {
> - return div_u64(v + d - 1, d);
> -}
There seems to be a rebase mishap. Th
nges the media_disp1_pix clock to match the
configured PLL rate in the bridge. 147333000 instead of 14850.
Reviewed-by: Alexander Stein
> ---
> Cc: Andrzej Hajda
> Cc: Daniel Vetter
> Cc: David Airlie
> Cc: Jernej Skrabec
> Cc: Jonas Karlman
> Cc: Laurent Pinchar
e is even necessary to get the DP test mode running, using DSI as input.
With the removal of div64_round_up() from patch 1 addeded here:
Reviewed-by: Alexander Stein
> ---
> Cc: Andrzej Hajda
> Cc: Daniel Vetter
> Cc: David Airlie
> Cc: Jernej Skrabec
> Cc: Jonas Karlman
>
K is 162 MHz (for DP 1.62G mode) is unclear, but empirical test
> confirms using LSCLK_DIV 1 has no adverse effects either. In the worst
> case, the internal TC358767 clock would run faster.
>
> Signed-off-by: Marek Vasut
Works also on a 2.7Gbps link.
Reviewed-by: Alexander Stein
&
Signed-off-by: Marek Vasut
Although calculation sheet indicates this depends on DSI-Timings, this
works as well.
Reviewed-by: Alexander Stein
> ---
> Cc: Andrzej Hajda
> Cc: Daniel Vetter
> Cc: David Airlie
> Cc: Jernej Skrabec
> Cc: Jonas Karlman
> Cc: Laurent
image contains jittering empty lines.
>
> Signed-off-by: Marek Vasut
I can't see these artifacts in 1920x1200 24bpp, but still looks good to me
Acked-by: Alexander Stein
> ---
> Cc: Andrzej Hajda
> Cc: Daniel Vetter
> Cc: David Airlie
> Cc: Jernej Skrabec
> Cc: Jonas
Hi Marek,
Am Freitag, 21. Juni 2024, 05:30:26 CEST schrieb Marek Vasut:
> On 6/11/24 6:45 PM, Marek Vasut wrote:
> > On 6/6/24 12:10 PM, Alexander Stein wrote:
> >> Hi Marek,
> >
> > Hello Alexander,
> >
> > sorry for the delay.
> >
> >&g
Hi Marek,
Am Mittwoch, 5. Juni 2024, 18:25:13 CEST schrieb Marek Vasut:
> On 6/5/24 12:52 PM, Alexander Stein wrote:
> > Hi Marek,
>
> Hi,
>
> [snip]
> > Ah, right. That seems simple. But I noticed another thing:
> > The TC9595 PLL is configured to 14733 w
Hi Marek,
Am Dienstag, 4. Juni 2024, 18:17:53 CEST schrieb Marek Vasut:
> On 6/4/24 1:35 PM, Alexander Stein wrote:
> > Hi Marek,
>
> Hi,
>
> > Am Montag, 3. Juni 2024, 23:27:34 CEST schrieb Marek Vasut:
> >> On 6/3/24 2:45 PM, Alexander Stein wrote:
>
Hi Marek,
Am Montag, 3. Juni 2024, 23:27:34 CEST schrieb Marek Vasut:
> On 6/3/24 2:45 PM, Alexander Stein wrote:
>
> Hi,
>
> >> @@ -1631,6 +1643,18 @@ static int tc_edp_atomic_check(struct drm_bridge
> >> *bridge,
> >>
Hi Marek,
Am Montag, 3. Juni 2024, 23:25:43 CEST schrieb Marek Vasut:
> On 6/3/24 2:18 PM, Alexander Stein wrote:
> > Hi Marek,
>
> Hi,
>
> > Am Freitag, 31. Mai 2024, 22:39:49 CEST schrieb Marek Vasut:
> >> This line_pixel_subtract is no longer needed now tha
Hi Marek,
Am Freitag, 31. Mai 2024, 22:42:04 CEST schrieb Marek Vasut:
> Make the default DP port preemphasis configurable via new DT property
> "toshiba,pre-emphasis". This is useful in case the DP link properties
> are known and starting link training from preemphasis setting of 0 dB
> is not us
Hi Marek,
Am Freitag, 31. Mai 2024, 22:42:03 CEST schrieb Marek Vasut:
> Document default DP port preemphasis configurable via new DT property
> "toshiba,pre-emphasis". This is useful in case the DP link properties
> are known and starting link training from preemphasis setting of 0 dB
> is not us
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