FWSEC-FRTS is run with the desired address of the FRTS region as
parameter, which we need to compute depending on some hardware
parameters.
Do this in a `FbLayout` structure, that will be later extended to
describe more memory regions used to boot the GSP.
Signed-off-by: Alexandre Courbot
---
d
From: Joel Fernandes
Add support for navigating and setting up vBIOS ucode data required for
GSP to boot. The main data extracted from the vBIOS is the FWSEC-FRTS
firmware which runs on the GSP processor. This firmware runs in high
secure mode, and sets up the WPR2 (Write protected region) before
While programming the hardware, we frequently need to busy-wait until
a condition (like a given bit of a register to switch value) happens.
Add a basic `wait_on` helper function to wait on such conditions
expressed as a closure, with a timeout argument.
This is temporary as we will switch to `rea
The FWSEC firmware needs to be extracted from the VBIOS and patched with
the desired command, as well as the right signature. Do this so we are
ready to load and run this firmware into the GSP falcon and create the
FRTS region.
[joelagn...@nvidia.com: give better names to FalconAppifHdrV1's fields
With all the required pieces in place, load FWSEC-FRTS onto the GSP
falcon, run it, and check that it successfully carved out the WPR2
region out of framebuffer memory.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/falcon.rs | 3 ---
drivers/gpu/nova-core/gpu.rs| 57 +++
Add the common Falcon code and HAL for Ampere GPUs, and instantiate the
GSP and SEC2 Falcons that will be required to boot the GSP.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/falcon.rs | 560 ++
drivers/gpu/nova-core/falcon/gsp.rs | 22
FWSEC-FRTS is the first firmware we need to run on the GSP falcon in
order to initiate the GSP boot process. Introduce the structure that
describes it.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/firmware.rs | 43 +++
1 file changed, 43 insertio
Introduce the `num` module, featuring the `NumExt` extension trait
that expands unsigned integers with useful operations for the kernel.
These are to be used by the nova-core driver, but they are so ubiquitous
that other drivers should be able to take advantage of them as well.
The currently impl
These properties are very useful to have and should be accessible.
Signed-off-by: Alexandre Courbot
---
rust/kernel/dma.rs | 18 ++
1 file changed, 18 insertions(+)
diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs
index
605e01e35715667f93297fd9ec49d8e7032e0910..2a60eefa47df
Although we want to access registers using the provided methods, it is
sometimes needed to use their raw offset, for instance when working with
a register array.
Expose the offset of each register using a type constant to avoid
resorting to hardcoded values.
Signed-off-by: Alexandre Courbot
---
Some registers (notably scratch registers) don't have a definitive
purpose, but need to be interpreted differently depending on context.
Expand the register!() macro to support a syntax indicating that a
register type should be at the same offset as another one, but under a
different name, and wit
Fix the paths that were not absolute to prevent a potential local module
from being picked up.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/regs/macros.rs | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/nova-core/regs/macros.rs
b/driver
We will use this error in the nova-core driver.
Signed-off-by: Alexandre Courbot
---
rust/kernel/error.rs | 1 +
1 file changed, 1 insertion(+)
diff --git a/rust/kernel/error.rs b/rust/kernel/error.rs
index
3dee3139fcd4379b94748c0ba1965f4e1865b633..083c7b068cf4e185100de96e520c54437898ee72
100
nova-core will need to use SZ_1M, so make the remaining constants
available.
Signed-off-by: Alexandre Courbot
---
rust/kernel/sizes.rs | 24
1 file changed, 24 insertions(+)
diff --git a/rust/kernel/sizes.rs b/rust/kernel/sizes.rs
index
834c343e4170f507821b870e77afd08e
Hi everyone,
New revision addressing the feedback received on v3, and then some.
Notably the `register!` macro gets a few new features that add clarity
to the code (like register aliases), and the `vbios` module has also
been reworked according to feedback. We also now have a HAL in the fb
module
On Tue, 20 May 2025 18:43:58 +0100
Adrián Larumbe wrote:
> Functions for labelling UM-exposed an internal BOs are provided. An
> example of the latter would be the Perfcnt sample buffer.
>
> This commit is done in preparation of a following one that will allow
> UM to set BO labels through a new
On Tue, 20 May 2025 18:44:02 +0100
Adrián Larumbe wrote:
> Commit 64111a0e22a9 ("drm/panfrost: Fix incorrect updating of current
> device frequency") was a Panfrost port of a similar fix in Panthor.
>
> Fix the Panfrost device pointer variable name so that it follows
> Panfrost naming convention
On 20/05/2025 22:06, Dmitry Baryshkov wrote:
> On Tue, May 20, 2025 at 01:13:26PM +0200, Krzysztof Kozlowski wrote:
>> Driver unconditionally saves current state on first init in
>> dsi_pll_10nm_init(), but does not save the VCO rate, only some of the
>> divider registers. The state is then restor
On 5/20/2025 10:23 PM, Jouni Högander wrote:
Add new definition for size of Panel Replay DPCD capability registers
area. Rename existing definitions to group capability registers together.
Signed-off-by: Jouni Högander
LGTM
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: s/ctx/lcd. fix compilation
v2: none.
---
drivers/gpu/drm/panel/panel-lincolntech-lcd197.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
On Wed, 2025-05-21 at 10:31 +0530, Nautiyal, Ankit K wrote:
>
> On 5/20/2025 10:23 PM, Jouni Högander wrote:
> > This patch is allowing Panel Replay with VRR. All VRR modes are
> > supposed to
>
>
> I think you missed to remove `patch` from the commit message.
I missed this comment. I will chan
On Wed, 2025-05-21 at 10:30 +0530, Nautiyal, Ankit K wrote:
>
> On 5/20/2025 10:23 PM, Jouni Högander wrote:
> > Add function to configre LFPS sending for Panel Replay according to
> > link
> > training sequence in HAS document.
> >
> > This assumes we are using AUX Less always if it's supported
On Wed, 2025-05-21 at 10:19 +0530, Nautiyal, Ankit K wrote:
>
> On 5/20/2025 10:23 PM, Jouni Högander wrote:
> > Add PANEL REPLAY CAPABILITY register (0xb1) bits.
> >
> > Signed-off-by: Jouni Högander
> > ---
> > include/drm/display/drm_dp.h | 10 --
> > 1 file changed, 8 insertions(+
Currently, hugetlb_reserve_pages() returns a bool to indicate whether
the reservation map update for the range [from, to] was successful or
not. This is not sufficient for the case where the caller needs to
determine how many entries were updated for the range.
Therefore, have hugetlb_reserve_page
There are cases when we try to pin a folio but discover that it has
not been faulted-in. So, we try to allocate it in memfd_alloc_folio()
but there is a chance that we might encounter a crash/failure
(VM_BUG_ON(!h->resv_huge_pages)) if there are no active reservations
at that instant. This issue wa
Unlike the existing tests, this new test will create a memfd (backed
by hugetlb) and pin the folios in it (a small subset) before writing/
populating it with data. This is a valid use-case that invokes the
memfd_alloc_folio() kernel API and is expected to work unless there
aren't enough hugetlb fol
There are cases where we try to pin a folio but discover that it has
not been faulted-in. So, we try to allocate it in memfd_alloc_folio()
but there is a chance that we might encounter a crash/failure
(VM_BUG_ON(!h->resv_huge_pages)) if there are no active reservations
at that instant. This issue w
On 5/20/2025 10:23 PM, Jouni Högander wrote:
Add PANEL REPLAY CAPABILITY register (0xb1) bits.
Signed-off-by: Jouni Högander
---
include/drm/display/drm_dp.h | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/dr
On 5/20/2025 10:23 PM, Jouni Högander wrote:
This patch is allowing Panel Replay with VRR. All VRR modes are supposed to
I think you missed to remove `patch` from the commit message.
Regards,
Ankit
work with Panel Replay.
Bspec: 68920, 68925
Signed-off-by: Jouni Högander
Reviewed-by:
On 5/20/2025 10:23 PM, Jouni Högander wrote:
It is specified in Bspec where port alpm configuration is supposed to be
performed. Change accordingly.
v2:
- drop HAS reference
- ensure PORT_ALPM registers are not writen on older platform
Bspec: 68849
Signed-off-by: Jouni Högander
Revie
On 5/20/2025 10:23 PM, Jouni Högander wrote:
There are several Panel Replay capability register in DPCD. Read them
all for later use.
v2:
- avoid using hardcoded indices
- read all Panel Replay capability registers
Signed-off-by: Jouni Högander
Reviewed-by: Ankit Nautiyal
---
.
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: fix compilation.
v2: none.
---
drivers/gpu/drm/panel/panel-magnachip-d53e6ea8966.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff -
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gp
Hi all,
On Tue, 13 May 2025 13:55:21 +1000 Stephen Rothwell
wrote:
>
> Today's linux-next merge of the drm-nova tree got a conflict in:
>
> samples/rust/Makefile
>
> between commit:
>
> 1bfb10505156 ("rust: configfs: add a sample demonstrating configfs usage")
>
> from the configfs tree
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-novatek-nt35560.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/g
On Wed, May 21, 2025 at 09:21:09AM +0800, jianqi.ren...@windriver.com wrote:
> From: Vinod Polimera
>
> [ Upstream commit c0cd12a5d29fa36a8e2ebac7b8bec50c1a41fb57 ]
>
> Use atomic variants for encoder callback functions such that
> certain states like self-refresh can be accessed as part of
> en
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: Use dev instead of &dsi->dev.
v2: none.
---
drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c | 11 +--
1 file changed, 5 insertions(+), 6 deletion
> -Original Message-
> From: T.J. Mercier
> Sent: Wednesday, May 21, 2025 10:01 AM
> To: wangtao
> Cc: Christian König ; sumit.sem...@linaro.org;
> benjamin.gaign...@collabora.com; brian.star...@arm.com;
> jstu...@google.com; linux-me...@vger.kernel.org; dri-
> de...@lists.freedesktop.o
Hi all,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/xe/xe_svm.c
between commit:
794f5493f518 ("drm/xe: Strict migration policy for atomic SVM faults")
from Linus' tree and commit:
80bcbdfc8cf5 ("drm/xe/svm: Add stats for SVM page faults")
from the drm tr
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drive
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-novatek-nt35950.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: fix alignment
v2: none.
---
drivers/gpu/drm/panel/panel-novatek-nt39016.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/dri
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-novatek-nt36672e.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gp
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-novatek-nt36523.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/d
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: fix alignment (Neil)
v2: none.
---
drivers/gpu/drm/panel/panel-newvision-nv3052c.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-novatek-nt35510.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/g
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-newvision-nv3051d.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers
Hi all,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/xe/xe_lrc.c
between commit:
617d824c5323 ("drm/xe: Add WA BB to capture active context utilization")
from Linus' tree and commits:
bac016066536 ("drm/xe: Make PPHWSP size explicit in xe_gt_lrc_size()")
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-lg-lg4573.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drive
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-innolux-ej030na.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gp
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: fix alignment (Neil)
v2: none.
---
drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff -
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-innolux-p079zca.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gp
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-himax-hx8394.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/d
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Michael Walle
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-ilitek-ili9806e.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(
Start using the new helper that does the refcounted
allocations
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/pa
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-ilitek-ili9322.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: update commit prefix to match the driver
v2: none.
---
drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c | 11 +--
1 file changed, 5 insertions(+),
cd-olinuxino.c| 11 +--
drivers/gpu/drm/panel/panel-orisetech-ota5601a.c | 11 +--
30 files changed, 145 insertions(+), 174 deletions(-)
---
base-commit: a4b4e3fd536763b3405c70ef97a6e7f9af8a00dc
change-id: 20250520-drivers-mass-convert-part2-1a76098178c3
Best regards,
--
Anusha Srivatsa
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-himax-hx83112a.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: none.
v2: none.
---
drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/dri
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Reviewed-by: Neil Armstrong
Signed-off-by: Anusha Srivatsa
---
v3: Update the patch commit to match with rest of series
v2: none.
---
drivers/gpu/drm/panel/panel-elida-kd35t133.c | 10 --
1 file changed, 4 insertion
On Tue, May 20, 2025 at 3:00 AM Maxime Ripard wrote:
>
> We've discussed a number of times of how some heap names are bad, but
> not really what makes a good heap name.
>
> Let's document what we expect the heap names to look like.
>
> Signed-off-by: Maxime Ripard
> ---
> Documentation/userspace
>
> So in the GPU case, you'd charge on allocation, free objects into a
> cgroup-specific pool, and shrink using a cgroup-specific LRU
> list. Freed objects can be reused by this cgroup, but nobody else.
> They're reclaimed through memory pressure inside the cgroup, not due
> to the action of other
On Mon, May 19, 2025 at 9:06 PM wangtao wrote:
>
>
>
> > -Original Message-
> > From: wangtao
> > Sent: Monday, May 19, 2025 8:04 PM
> > To: 'T.J. Mercier' ; Christian König
> >
> > Cc: sumit.sem...@linaro.org; benjamin.gaign...@collabora.com;
> > brian.star...@arm.com; jstu...@google.com
From: Abhinav Kumar
[ Upstream commit aedf02e46eb549dac8db4821a6b9f0c6bf6e3990 ]
For cases where the crtc's connectors_changed was set without enable/active
getting toggled , there is an atomic_enable() call followed by an
atomic_disable() but without an atomic_mode_set().
This results in a NUL
From: Vinod Polimera
[ Upstream commit c0cd12a5d29fa36a8e2ebac7b8bec50c1a41fb57 ]
Use atomic variants for encoder callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
Reviewe
On Tue, May 20, 2025 at 12:00:53PM +0200, Maxime Ripard wrote:
> +Naming Convention
> +=
> +
> +A good heap name is a name that:
> +
> +- Is stable, and won't change from one version to the other;
> +
> +- Describes the memory region the heap will allocate from, and will
> + unique
Reviewed-by: Alex Hung
On 4/29/25 16:39, Melissa Wen wrote:
On 25/04/2025 17:52, Melissa Wen wrote:
Match what is declared as DPP color caps with hw caps. DCN401 has MPC
shaper+3D+blnd LUTs that are movable before and after blending (get from
plane or stream), but no DPP shaper+3D+blend LUTs
On Tue, May 20, 2025 at 3:31 PM Dave Airlie wrote:
>
> On Wed, 21 May 2025 at 07:53, Rob Clark wrote:
> >
> > On Tue, May 20, 2025 at 2:25 PM Dave Airlie wrote:
> > >
> > > On Sat, 17 May 2025 at 02:20, Rob Clark wrote:
> > > >
> > > > On Fri, May 16, 2025 at 2:01 AM Danilo Krummrich
> > > >
Switch VC4 driver to using CEC helpers code, simplifying hotplug and
registration / cleanup. The existing vc4_hdmi_cec_release() is kept for
now.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Maxime Ripard
Signed-off-by: Dmitry Baryshkov
---
This is a part of the HDMI CEC rework, posting separat
On Sat, 17 May 2025 04:59:36 +0300, Dmitry Baryshkov wrote:
> Currently it is next to impossible to implement CEC handling for the
> setup using drm_bridges and drm_bridge_connector: bridges don't have a
> hold of the connector at the proper time to be able to route CEC events.
>
> At the same t
On Wed, 21 May 2025 at 07:53, Rob Clark wrote:
>
> On Tue, May 20, 2025 at 2:25 PM Dave Airlie wrote:
> >
> > On Sat, 17 May 2025 at 02:20, Rob Clark wrote:
> > >
> > > On Fri, May 16, 2025 at 2:01 AM Danilo Krummrich wrote:
> > > >
> > > > On Thu, May 15, 2025 at 02:57:46PM -0700, Rob Clark wr
---
base-commit: 8ffd015db85fea3e15a77027fda6c02ced4d2444
change-id: 20250520-msm-reset-context-state-100249ca5368
Best regards,
--
Connor Abbott
Based on kgsl.
Fixes: af66706accdf ("drm/msm/a6xx: Add skeleton A7xx support")
Signed-off-by: Connor Abbott
---
drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml
b/drivers
Calling this packet is necessary when we switch contexts because there
are various pieces of state used by userspace to synchronize between BR
and BV that are persistent across submits and we need to make sure that
they are in a "safe" state when switching contexts. Otherwise a
userspace submission
On Tue, May 20, 2025 at 2:25 PM Dave Airlie wrote:
>
> On Sat, 17 May 2025 at 02:20, Rob Clark wrote:
> >
> > On Fri, May 16, 2025 at 2:01 AM Danilo Krummrich wrote:
> > >
> > > On Thu, May 15, 2025 at 02:57:46PM -0700, Rob Clark wrote:
> > > > On Thu, May 15, 2025 at 10:55 AM Danilo Krummrich
On Wed, 21 May 2025 at 04:13, Joel Fernandes wrote:
>
>
>
> On 5/20/2025 11:36 AM, Danilo Krummrich wrote:
> >>> If you want a helper type with Options while parsing that's totally fine,
> >>> but
> >>> the final result can clearly be without Options. For instance:
> >>>
> >>> struct Data {
>
On Sat, 17 May 2025 at 02:20, Rob Clark wrote:
>
> On Fri, May 16, 2025 at 2:01 AM Danilo Krummrich wrote:
> >
> > On Thu, May 15, 2025 at 02:57:46PM -0700, Rob Clark wrote:
> > > On Thu, May 15, 2025 at 10:55 AM Danilo Krummrich wrote:
> > > > Anyways, I don't agree with that. Even if you can t
On Tue, May 20, 2025 at 09:53:42AM +0200, neil.armstr...@linaro.org wrote:
> On 19/05/2025 18:04, Dmitry Baryshkov wrote:
> > From: Dmitry Baryshkov
> >
> > Continue migration to the MDSS-revision based checks and replace
> > DPU_MDP_AUDIO_SELECT feature bit with the core_major_ver == 8 ||
> > co
On Tue, May 20, 2025 at 09:57:38AM +0200, neil.armstr...@linaro.org wrote:
> On 19/05/2025 18:04, Dmitry Baryshkov wrote:
> > From: Dmitry Baryshkov
> >
> > Continue migration to the MDSS-revision based checks and replace
> > DPU_CTL_ACTIVE_CFG feature bit with the core_major_ver >= 5 check.
> >
On Tue, May 20, 2025 at 12:57:25PM +0200, Krzysztof Kozlowski wrote:
> On 03/05/2025 00:44, Dmitry Baryshkov wrote:
> > On Wed, Apr 30, 2025 at 03:00:45PM +0200, Krzysztof Kozlowski wrote:
> >> Add bitfields for PHY_CMN_CTRL_0 registers to avoid hard-coding bit
> >> masks and shifts and make the co
On Tue, May 20, 2025 at 01:07:09PM +0200, Konrad Dybcio wrote:
> From: Konrad Dybcio
>
> Start the great despaghettification by getting a pointer to the common
> UBWC configuration, which houses e.g. UBWC versions that we need to
> make decisions.
>
> Signed-off-by: Konrad Dybcio
> ---
> drive
From: Dmitry Baryshkov
Add support for HDMI PHY on Qualcomm MSM8974 / APQ8074 platforms.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Dmitry Baryshkov
---
drivers/phy/qualcomm/phy-qcom-hdmi-28hpm.c | 259 +
1 file changed, 259 insertions(+)
diff --git a/drivers/
From: Dmitry Baryshkov
Import register definitions from 28nm DSI and HDMI PHYs, adding more UNI
PHY registers.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Dmitry Baryshkov
---
drivers/phy/qualcomm/phy-qcom-uniphy.h | 33 +
1 file changed, 33 insertions(+)
d
From: Dmitry Baryshkov
With the HDMI PHYs migrated to the generic PHY subsystem and to a
separate drivers there is no point in keeping HDMI PHY registers in the
drm/msm database, drop them.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/registers/displ
From: Dmitry Baryshkov
The "uni" PLL is shared between several PHYS: APQ8064's SATA,
MSM8974/APQ8084 HDMI, MSM8916 DSI, MSM8974/APQ8084 DSI.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Dmitry Baryshkov
---
drivers/phy/qualcomm/phy-qcom-apq8064-sata.c | 23 +---
drivers/phy/
The MSM HDMI PHYs have been using the ad-hoc approach / API instead of
using the generic API framework. Move MSM HDMI PHY drivers to
drivers/phy/qualcomm and rework them to use generic PHY framework. This
way all the QMP-related code is kept at the same place.
Also MSM8974 HDMI PHY, 28nm DSI PHY an
Drive-by fix, it doesn't seem like anything actually uses this constant
anymore.
Signed-off-by: Lyude Paul
Reviewed-by: Danilo Krummrich
---
rust/kernel/drm/gem/mod.rs | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/rust/kernel/drm/gem/mod.rs b/rust/kernel/drm/gem/mod.rs
One of the original intents with the gem bindings was that drivers could
specify additional gem implementations, in order to enable for driver
private gem objects. This wasn't really possible however, as up until now
our GEM bindings have always assumed that the only GEM object we would run
into wa
Just to reduce the clutter with the File<…> types in gem.rs.
Signed-off-by: Lyude Paul
---
V3:
* Rename ObjectFile to DriverFile
Signed-off-by: Lyude Paul
---
rust/kernel/drm/gem/mod.rs | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/rust/kernel/d
Now that my rust skills have been honed, I noticed that there's a lot of
generics in our gem bindings that don't actually need to be here. Currently
the hierarchy of traits in our gem bindings looks like this:
* Drivers implement:
* BaseDriverObject (has the callbacks)
* DriverObject (ha
Look mom, no generic soup!
Anyway - this is just the last of the cleanup stuff I ended up while
working on cleaning up the gem shmem patch series. It:
* Simplifies the use of generics
* Adds a type alias for some very long type names
* Moves stuff around to enable a feature Asahi originally inten
On 2025-05-19 19:43, Simon Ser wrote:
> On Sunday, May 18th, 2025 at 00:32, Xaver Hugl wrote:
>
>>> We can always make the property mutable on drivers that support it in
>>
>>> the future, much like the zpos property. I think we should keep it
>>> immutable for now.
>>
>> Sure, but I don't see
On Tue, May 20, 2025 at 01:13:26PM +0200, Krzysztof Kozlowski wrote:
> Driver unconditionally saves current state on first init in
> dsi_pll_10nm_init(), but does not save the VCO rate, only some of the
> divider registers. The state is then restored during probe/enable via
> msm_dsi_phy_enable()
On Tue, 20 May 2025 11:11:12 -0400, Hugo Villeneuve wrote:
> From: Hugo Villeneuve
>
> Allow to inherit valid properties from the dsi-controller. This fixes the
> following warning when adding a panel property:
>
> rzg2lc.dtb: dsi@1085: '#address-cells', '#size-cells', 'panel@0' do not
>
Now that my rust skills have been honed, I noticed that there's a lot of
generics in our gem bindings that don't actually need to be here. Currently
the hierarchy of traits in our gem bindings looks like this:
* Drivers implement:
* BaseDriverObject (has the callbacks)
* DriverObject (ha
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