On Tue, May 20, 2025 at 12:57:25PM +0200, Krzysztof Kozlowski wrote:
> On 03/05/2025 00:44, Dmitry Baryshkov wrote:
> > On Wed, Apr 30, 2025 at 03:00:45PM +0200, Krzysztof Kozlowski wrote:
> >> Add bitfields for PHY_CMN_CTRL_0 registers to avoid hard-coding bit
> >> masks and shifts and make the code a bit more readable.
> >>
> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlow...@linaro.org>
> >>
> >> ---
> >>
> >> Changes in v5:
> >> 1. New patch
> >> ---
> >> drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 9 ++++++---
> >> drivers/gpu/drm/msm/registers/display/dsi_phy_7nm.xml | 11 ++++++++++-
> >> 2 files changed, 16 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> >> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> >> index
> >> ca1a120f630a3650bf6d9f9d426cccea88c22e7f..7ef0aa7ff41b7d10d2630405c3d2f541957f19ea
> >> 100644
> >> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> >> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> >> @@ -362,17 +362,19 @@ static int dsi_pll_7nm_lock_status(struct
> >> dsi_pll_7nm *pll)
> >> static void dsi_pll_disable_pll_bias(struct dsi_pll_7nm *pll)
> >> {
> >> u32 data = readl(pll->phy->base + REG_DSI_7nm_PHY_CMN_CTRL_0);
> >
> > This (and several following functions) should be triggering a warning
> > regarding empty line after variable declaration block.
>
> Hey Dmitry,
>
> I am implementing all the feedback and probably rebasing but to clarify
> this part:
>
> There is no checkpatch --strict warning here exactly for the reason I
> was saying. For readability there should be no empty line after because
> such statements are expected to be together. I don't mind of course
> adding one, so I will implement the change.
I'd prefer this:
u32 data;
data = readl();
data &= foo;;
>
>
> Best regards,
> Krzysztof
--
With best wishes
Dmitry
