Ping?
On 4/11/2025 6:34 PM, Sunil Khatri wrote:
Add helper function which get the process information for
the drm_file and updates the user provided character buffer
with the information of process name and pid as a string.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/drm_file.c | 30
On Thu, Apr 10, 2025 at 11:22:05AM +, Matt Coster wrote:
> On 09/04/2025 13:22, Arnd Bergmann wrote:
...
> > Rather than adding more #ifdef blocks, address this by changing the
> > existing #ifdef into equivalent IS_ENABLED() checks so gcc can see
> > where the symbol is used but still elimin
The return value of fiji_populate_smc_boot_level() is always 0, which
represent the failure of the function. The result of phm_find_boot_level()
should be recored and return. An error handling is also needed to
phm_find_boot_level() to reset the boot level when the function fails.
A proper implemen
i.MX8qxp Display Controller display engine consists of all processing units
that operate in a display clock domain.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v9:
* No change.
v8:
* Drop instance numbers from compatible strings. This means switching back to
the patch in v4. So
Freescale i.MX8qxp Display Controller is implemented as construction set of
building blocks with unified concept and standardized interfaces. Document
all existing processing units.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v9:
* No change.
v8:
* Drop instance numbers from com
Introduce luminance_set flag which indicates if we can manipulate
backlight using luminance value or not which is only possible
after eDP v1.5.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/display/drm_dp_helper.c | 8 ++--
include/drm/display/drm_dp_helper.h | 1 +
2 files changed, 7
Now that drm_edp_backlight init has been to be able to setup
brightness manipulation via luminance we can just use that.
Signed-off-by: Suraj Kandpal
---
.../drm/i915/display/intel_dp_aux_backlight.c | 100 +-
1 file changed, 49 insertions(+), 51 deletions(-)
diff --git a/driver
Now that the drm helper sets the backlight using luminance
too we can use that. Remove the obselete function.
Signed-off-by: Suraj Kandpal
---
.../drm/i915/display/intel_dp_aux_backlight.c | 34 ++-
1 file changed, 3 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i9
Add bool argument in drm_edp_backlight init to provide the drivers
option to choose if they want to use luminance values to
manipulate brightness.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/display/drm_dp_helper.c | 7 ---
drivers/gpu/drm/i915/display/intel_dp_aux_backlig
On 13-04-2025 16:54, Svyatoslav Ryhel wrote:
From: Maxim Schwalm
Driver adds support for panels with Renesas R69328 IC
Currently supported compatible is:
- jdi,dx12d100vm0eaa
Co-developed-by: Svyatoslav Ryhel
Signed-off-by: Svyatoslav Ryhel
Signed-off-by: Maxim Schwalm
---
drivers/gpu
Reviewed-by:Arvind Yadav
On 4/12/2025 8:09 PM, Dan Carpenter wrote:
1) Checkpatch complains if we print an error message for kzalloc()
failure. The kzalloc() failure already has it's own error messages
built in. Also this allocation is small enough that it is guaranteed
to succeed
Reviewed-by:Reviewed-by:Arvind Yadav
On 4/12/2025 8:09 PM, Dan Carpenter wrote:
The goto frees "fence_drv" so this is a double free bug. There is no
need to call amdgpu_seq64_free(adev, fence_drv->va) since the seq64
allocation failed so change the goto to goto free_fence_drv. Also
propagate
Add new argument to drm_edp_backlight_init which gives the
drm_luminance_range_info struct which will be needed to set the min
and max values for backlight.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/display/drm_dp_helper.c | 5 -
drivers/gpu/drm/i915/display/intel_dp_aux
Modify drm_edp_backlight_set_level to be able to set the value
for register in DP_EDP_PANEL_TARGET_LUMINANCE_VALUE. We multiply
the level with 1000 since we get the value in Nits and the
register accepts it in milliNits.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/display/drm_dp_helper.c |
Change the current_level argument type to u32 from u16
since it can now carry the value which it gets from
DP_EDP_PANEL_TARGET_LUMINANCE_VALUE.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/display/drm_dp_helper.c | 4 ++--
drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c |
Use drm dp helper to enable backlight now that it has been modified
to set PANEL_LUMINANCE_CONTROL_ENABLE bit based on if capability
supports it and the driver wants it. Remove the dead code.
Signed-off-by: Suraj Kandpal
---
.../gpu/drm/i915/display/intel_dp_aux_backlight.c | 14 --
Use u32 instead of u16 for max variable in drm_edp_backlight_info
since it can now hold max luminance range value which is u32.
We will set this max with max_luminance value when luminance_set is
true.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/display/drm_dp_helper.c | 10 +++---
incl
Change the argument type to u32 for the default level being sent
since it has to now account for luminance value which has to be
set for DP_EDP_PANEL_LUMINANCE_TARGET_VALUE.
--v2
-No need to typecast [Jani]
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/display/drm_dp_helper.c | 2 +-
drivers
Use u32 for level variable as one may need to pass value for
DP_EDP_PANEL_TARGET_LUMINANCE_VALUE.
--v2
-Typecase is not needed [Jani]
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/display/drm_dp_helper.c | 2 +-
include/drm/display/drm_dp_helper.h | 2 +-
2 files changed, 2 insertions(+)
Add flag to enable brightness control via luminance value
when enabling edp backlight.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/display/drm_dp_helper.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c
b/drivers/gpu/drm/display/drm_dp_helper.
Modify drm_edp_probe_state to read current level from
DP_EDP_PANEL_TARGET_LUMINANCE_VALUE. We divide it by
1000 since the value in this register is in millinits.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/display/drm_dp_helper.c | 35 ++---
1 file changed, 25 insertions
This series modifies drm dp edp helpers so that drivers can now use them
to manipulate brightness using luminance value via the
PANEL_TARGET_LUMINANCE_VALUE register. This feature was
introduced frin eDP 1.5.
Signed-off-by: Suraj Kandpal
Suraj Kandpal (13):
drm/dp: Introduce new member in drm_
> -Original Message-
> From: Jani Nikula
> Sent: Friday, April 11, 2025 4:09 PM
> To: Kandpal, Suraj ; nouv...@lists.freedesktop.org;
> dri-devel@lists.freedesktop.org; intel...@lists.freedesktop.org; intel-
> g...@lists.freedesktop.org
> Cc: Nautiyal, Ankit K ; Murthy, Arun R
> ; Kandp
Hi,
This patch series aims to add Freescale i.MX8qxp Display Controller support.
The controller is comprised of three main components that include a blit
engine for 2D graphics accelerations, display controller for display output
processing, as well as a command sequencer.
Previous patch series
Add myself as the maintainer of i.MX8qxp Display Controller.
Signed-off-by: Liu Ying
Reviewed-by: Maxime Ripard
---
v9:
* Add Maxime's R-b tag.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* Improve file list. (Frank)
MAINTAIN
i.MX8qxp Display Controller has a built-in interrupt controller to support
Enable/Status/Preset/Clear interrupt bit.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v9:
* No change.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* Collec
i.MX8qxp Display Controller has a built-in interrupt controller to support
Enable/Status/Preset/Clear interrupt bit. Add driver for it.
Reviewed-by: Maxime Ripard
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Liu Ying
---
v9:
* No change.
v8:
* Collect Dmitry's R-b tag.
v7:
* Fix regmap_confi
i.MX8qxp Display Controller pixel engine consists of all processing units
that operate in the AXI bus clock domain. Command sequencer and interrupt
controller of the Display Controller work with AXI bus clock, but they are
not in pixel engine.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Ar
The MIPI-LVDS combo subsystems are peripherals of pixel link MSI
bus in i.MX8qxp display controller subsystem. Add the MIPI-LVDS
combo subsystems.
Signed-off-by: Liu Ying
---
v9:
* No change.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No chan
i.MX8qxp Display Controller contains a command sequencer is designed to
autonomously process command lists.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v9:
* Add Rob's R-b tag.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* Replace "fsl,iram" proper
i.MX8qxp Display Controller display engine consists of all processing
units that operate in a display clock domain. Add minimal feature
support with FrameGen and TCon so that the engine can output display
timings. The FrameGen driver, TCon driver and display engine driver
are components to be agg
MX8-DLVDS-LCD1 display module integrates a KOE TX26D202VM0BWA LCD panel
and a touch IC. Add an overlay to support the LCD panel on i.MX8qxp
MEK. mipi_lvds_0_ldb channel0 and mipi_lvds_1_ldb channel1 send odd
and even pixels to the panel respectively.
Signed-off-by: Liu Ying
---
v9:
* Rebase on
Add display controller subsystem in i.MX8qxp SoC.
Signed-off-by: Liu Ying
---
v9:
* No change.
v8:
* Drop instance numbers from display controller internal devices' compatible
strings. (Dmitry)
v7:
* Add instance numbers to display controller internal devices' compatible
strings.
* Drop ali
Document SCU controlled display pixel link child nodes.
Signed-off-by: Liu Ying
---
v9:
* No change.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* New patch as needed by display controller subsystem device tree.
.../devicetree
i.MX8qxp Display Controller contains a AXI performance counter which allows
measurement of average bandwidth and latency during operation.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v9:
* No change.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* Co
i.MX8qxp Display Controller contains a blit engine for raster graphics.
It may read up to 3 source images from memory and computes one destination
image from it, which is written back to memory.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v9:
* No change.
v8:
* Drop instance numb
The function fill_stream_properties_from_drm_display_mode() calls the
function drm_hdmi_avi_infoframe_from_display_mode() and the
function drm_hdmi_vendor_infoframe_from_display_mode(), but does
not check its return value. Log the error messages to prevent silent
failure if either function fails.
Hi Dmitry,
On 2025/4/1 13:11, Dmitry Baryshkov wrote:
The analogix_dp_prepare_panel() returns immediately if there is no
attached panel. Drop several calls to this function which are performed
when dp->plat_data->panel is NULL.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/analo
On 2025/4/14 9:20, Damon Ding wrote:
Hi Dmitry,
On 2025/4/1 13:11, Dmitry Baryshkov wrote:
The analogix_dp_prepare_panel() returns immediately if there is no
attached panel. Drop several calls to this function which are performed
when dp->plat_data->panel is NULL.
Signed-off-by: Dmitry Baryshk
Hi Dmitry,
On 2025/4/1 13:11, Dmitry Baryshkov wrote:
Follow the example of other drivers and ignore return values of the
drm_panel_prepare() / unprepare() / enable() / disable() calls. There is
no possible error recovery, so the driver just logs a message.
Signed-off-by: Dmitry Baryshkov
---
Hi Dmitry,
On 2025/4/1 13:11, Dmitry Baryshkov wrote:
The analogix_dp_prepare_panel() is now only calling a corresponding
drm_panel function. Inline it to simplify the code.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 43 +-
1
Hi Dmitry,
On 2025/4/1 13:11, Dmitry Baryshkov wrote:
The analogix_dp_prepare_panel() function is called from bridge's
atomic_pre_enable() and atomic_post_disable() callbacks, which can not
happen simultaneously. Drop the useless mutex.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/bri
Hi Dmitry,
On 2025/4/1 13:11, Dmitry Baryshkov wrote:
The dp->panel_is_modeset is now a write-only field. Drop it completely.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 11 +--
drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 1 -
Hi Dmitry,
On 2025/4/1 13:11, Dmitry Baryshkov wrote:
After previous cleanup all calling sites pass true as is_modeset_prepare
argument to analogix_dp_prepare_panel(). Drop dead code depending on
that argument being false.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/analogix/a
On Fri, Apr 11, 2025 at 10:21:03AM +0530, Gupta, Nipun wrote:
> On 10-04-2025 13:06, Krzysztof Kozlowski wrote:
> > On Wed, Apr 09, 2025 at 11:00:32PM GMT, Nipun Gupta wrote:
> > > The AMD PKI accelerator driver provides a accel interface to interact
> > > with the device for offloading and acceler
If the Adreno device is used in a headless mode, there is no need to
build all KMS components. Build corresponding parts conditionally, only
selecting them if modeset support is actually required.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Kconfig | 14 ++
drivers/gpu/drm/
Currently the KMS and GPU parts of the msm driver are pretty much
intertwined. It is impossible to register a KMS-only device and
registering a GPU-only DRM device requires modifying the DT. Not to
mention that binding the GPU-only device creates an interim platform
devices, which complicates IOMM
From: "Dr. David Alan Gilbert"
qxl_io_flush_release() and qxl_io_flush_surfaces() were both added
in 2013's
commit f64122c1f6ad ("drm: add new QXL driver. (v1.4)")
but have remained unused. Remove them.
Signed-off-by: Dr. David Alan Gilbert
---
drivers/gpu/drm/qxl/qxl_cmd.c | 10 --
From: "Dr. David Alan Gilbert"
qxl_debugfs_add_files() has been unused since 2022's
commit d0719e09264b ("drm/qxl: Use TTM builtin resource manager debugfs
code")
Remove it.
This now leaves the debugfs_count and debugfs members of struct
qxl_device unused. Remove them.
QXL_DEBUGFS_MAX_COMPONE
From: "Dr. David Alan Gilbert"
Hi,
A couple of small deadcodings for qxl. The first
just cleans up a couple of trivial unusued wrappers.
The second cleans out some debugfs code that's been unused
for a few years.
Dave
Signed-off-by: Dr. David Alan Gilbert
Dr. David Alan Gilbert (2):
drm:
Currently the msm driver creates an extra interim platform device for
Imageon GPUs. This is not ideal, as the device doesn't have
corresponding OF node. If the headless mode is used for newer GPUs, then
the msm_use_mmu() function can not detect corresponding IOMMU devices.
Also the DRM device (alth
The global workqueue is only used for vblanks inside KMS code. Move
allocation / flushing / deallcation of it to msm_kms.c
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_drv.c | 21 ++---
drivers/gpu/drm/msm/msm_kms.c | 16 +++-
2 files changed, 17 insert
There are cases when we want to have separate DRM devices for GPU and
display pipelines.
One example is development, when it is beneficial to be able to bind the
GPU driver separately, without the display pipeline (and without the
hacks adding "amd,imageon" to the compatible string).
Another exampl
Extract two more KMS-related codepieces to msm_kms.c, removing last
pieces of KMS code from msm_drv.c.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_drv.c | 9 +++--
drivers/gpu/drm/msm/msm_kms.c | 20
drivers/gpu/drm/msm/msm_kms.h | 2 ++
3 files changed
Move symbol selection to be more fine grained: select DP helpers only if
DP driver is also enabled, move KMS and display helpers to the newly
introduced DRM_MSM_KMS.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Kconfig | 20 ++--
1 file changed, 10 insertions(+), 10 de
Both perf and hangrd make sense only for GPU devices. Bail out if we are
registering a KMS-only device.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_debugfs.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_debugfs.c
b/drivers/gpu/drm/msm/msm_debu
On Thu, 10. Apr 11:07, Christian König wrote:
> Am 09.04.25 um 19:27 schrieb Linus Torvalds:
> > The VM layer allows larger allocations. But the "this is a simple
> > allocation, choose kmalloc or vmalloc automatically based on size"
> > helper says "you are being simple, I'm going to check your ar
R69328 is liquid crystal driver for high-definition amorphous silicon
(a-Si) panels and is ideal for tablets and smartphones.
Signed-off-by: Svyatoslav Ryhel
---
.../display/panel/renesas,r69328.yaml | 72 +++
1 file changed, 72 insertions(+)
create mode 100644
Document
From: Maxim Schwalm
Driver adds support for panels with Renesas R69328 IC
Currently supported compatible is:
- jdi,dx12d100vm0eaa
Co-developed-by: Svyatoslav Ryhel
Signed-off-by: Svyatoslav Ryhel
Signed-off-by: Maxim Schwalm
---
drivers/gpu/drm/panel/Kconfig| 13 +
drivers/
R61307 is liquid crystal driver for high-definition amorphous silicon
(a-Si) panels and is ideal for tablets and smartphones.
Supported compatibles are:
- hit,tx13d100vm0eaa
- koe,tx13d100vm0eaa
Signed-off-by: Svyatoslav Ryhel
---
drivers/gpu/drm/panel/Kconfig| 13 +
drivers/gp
R61307 is liquid crystal driver for high-definition amorphous silicon
(a-Si) panels and is ideal for tablets and smartphones.
Signed-off-by: Svyatoslav Ryhel
---
.../display/panel/renesas,r61307.yaml | 93 +++
1 file changed, 93 insertions(+)
create mode 100644
Document
Add support for panels used in LG P880/P895 which are based on Renesas IC
(not related to Renesas RISC-V architecture just the same manufacturer).
Maxim Schwalm (1):
drm: panel: Add support for Renesas R69328 based MIPI DSI panel
Svyatoslav Ryhel (3):
dt-bindings: display: panel: Document Ren
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