Am 20.02.25 um 17:27 schrieb André Almeida:
> Instead of only triggering a wedged event for complete GPU resets,
> trigger for all types, like soft resets and ring resets. Regardless of
> the reset, it's useful for userspace to know that it happened because
> the kernel will reject further submissi
On Thu, Feb 20, 2025 at 05:48:10PM -0600, Lucas De Marchi wrote:
> On Thu, Feb 20, 2025 at 01:24:20PM +0100, Greg Kroah-Hartman wrote:
> > On Wed, Feb 12, 2025 at 12:05:37PM -0800, Lucas De Marchi wrote:
> > > When releasing a device, if the release action causes a group to be
> > > released, a war
Problem: If prev(last_scheduled) was already signaled I encountred a
memory leak in drm_sched_entity_fini. This is because the
prev(last_scheduled) fence is not free properly.
Fix: Balance the prev(last_scheduled) fence refcnt when
dma_fence_add_callback failed.
Signed-off-by: qianyi liu
---
dr
On Fri, Feb 21, 2025 at 12:41:40AM +0100, Heiko Stuebner wrote:
> The component helpers already expose the bound status in debugfs, but at
> times it might be necessary to also check that state in the kernel and
> act differently depending on the result.
>
> For example the shutdown handler of a d
On Fri, Feb 21, 2025 at 10:38:04AM +0530, Raag Jadav wrote:
> Directly include bug.h for WARN() helpers instead of relying on
> intermediate headers.
>
> Signed-off-by: Raag Jadav
> ---
> drivers/gpu/drm/drm_draw.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/drm_dra
Drop unused headers and type declaration from io.h.
Signed-off-by: Raag Jadav
---
include/linux/io.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/linux/io.h b/include/linux/io.h
index 40cb2de73f5e..6a6bc4d46d0a 100644
--- a/include/linux/io.h
+++ b/include/linux/io.h
@@ -9,13 +9
Directly include bug.h for WARN() helpers instead of relying on
intermediate headers.
Signed-off-by: Raag Jadav
---
drivers/gpu/drm/drm_draw.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/drm_draw.c b/drivers/gpu/drm/drm_draw.c
index cb2ad12bce57..0a0e1eebf481 100644
--- a
In a wider effort to improve build speeds, we're attempting to split/cleanup
core headers.
This series attempts to cleanup io.h with "include what you need" approach.
This depends on earlier modifications available in immutable tag[1]. Feel
free to carry your subsystem patches with it, or let And
On Wed, Feb 19, 2025 at 02:41:12PM -0700, Jeff Hugo wrote:
> Qualcomm is migrating away from quicinc.com email addresses towards ones
> with *.qualcomm.com.
>
> Signed-off-by: Jeff Hugo
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> .mailmap| 3 ++-
> MAINTAINERS | 2 +-
> 2 files c
Add check for the return value of alloc_ordered_workqueue()
and alloc_workqueue(). Furthermore, if some allocations fail,
cleanup works are added to avoid potential memory leak problem.
Fixes: 40053823baad ("drm/i915/display: move modeset probe/remove functions to
intel_display_driver.c")
Cc: sta
All Allwinner H616/H618 SoCs contain a Mali G31 MP2 GPU.
Enable the DT nodes for that GPU, and specify the regulator providing
power to the VDD_GPU pins of the package. The rest of the DT node is set
by the SoC, so is not board specific.
Signed-off-by: Andre Przywara
---
arch/arm64/boot/dts/all
The Allwinner H616/H618/H313/H700 SoCs contain a Mali G32 MP2 GPU. This
IP is from the Bifrost family and is already supported by the panfrost
driver, so enabling support for 3D graphics on this SoC is rather
straight-forward.
However Allwinner added some bits in the PRCM block, that control the
po
The Allwinner H616 SoC contains a Mali-G31 MP2 GPU, which is of the Mali
Bifrost family. There is a power domain specifically for that GPU, which
needs to be enabled to make use of the it.
Add the DT nodes for those two devices, and link them together through
the "power-domains" property.
Any boar
The Allwinner H616 SoC has a Mali-G31 MP2 GPU, which is of the Mali
Bifrost family.
Add the SoC specific compatible string and pair it with the bifrost
fallback compatible.
Signed-off-by: Andre Przywara
---
Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
1 file changed, 1 inse
The Allwinner Power Reset Clock Management (RPCM) block contains a few
bits that control some power domains. The most prominent one is the one
for the Mali GPU. On the Allwinner H6 this domain is enabled at reset, so
we didn't care about it so far, but the H616 defaults to it being disabled.
Add a
The Allwinner H6 and some later SoCs contain some bits in the PRCM (Power
Reset Clock Management) block that control some power domains.
Those power domains include the one for the GPU, the PLLs and some
analogue circuits.
Signed-off-by: Andre Przywara
---
.../power/allwinner,sun50i-h6-prcm-ppu.
On Thu, Feb 20, 2025 at 10:50:57PM +0100, Marijn Suijten wrote:
> On 2025-02-20 18:06:01, Dmitry Baryshkov wrote:
> > On Thu, Feb 20, 2025 at 11:42:28PM +0800, Jun Nie wrote:
> > > Dmitry Baryshkov 于2025年2月20日周四 18:39写道：
> > > >
> > > > On Thu, Feb 20, 2025 at 06:07:56PM +0800, Jun Nie wrote:
> >
On Fri, Feb 21, 2025 at 12:34:12AM +0100, Marijn Suijten wrote:
> On 2025-02-20 12:26:23, Dmitry Baryshkov wrote:
> > Unlike previous generation, since DPU 5.0 it is possible to use just one
> > CTL to handle all INTF and WB blocks for a single output. And one has to
> > use single CTL to support b
On Thu, Feb 20, 2025 at 01:24:20PM +0100, Greg Kroah-Hartman wrote:
On Wed, Feb 12, 2025 at 12:05:37PM -0800, Lucas De Marchi wrote:
When releasing a device, if the release action causes a group to be
released, a warning is emitted because it can't find the group. This
happens because devres_rel
The component helpers already expose the bound status in debugfs, but at
times it might be necessary to also check that state in the kernel and
act differently depending on the result.
For example the shutdown handler of a drm-driver might need to stop
a whole output pipeline if the drm device is
Probe deferral can cause the platform-data we access to be freed already
causing ugly splats on system shutdown.
Fix this via a small component-helper and adapting the rockchip-drm
shutdown handler.
Heiko Stuebner (2):
drivers: base: component: add function to query the bound status
drm/rockc
When the drm-driver probes, it mainly creates the component device, where
all the sub-drivers (vops, hdmi, etc) hook into.
This will cause the shutdown handler to get called on shutdown, even
though the drm-device might not have been set up, or the component bind
might have failed.
So use the new
On 2025-02-20 12:26:24, Dmitry Baryshkov wrote:
> Since DPU 5.0 CTL blocks do not require DPU_CTL_SPLIT_DISPLAY, as single
> CTL is used for both interfaces. As both RM and encoder now handle
> active CTLs, drop that feature bit.
I was wondering if this bit only existed to ensure the right "pair"
On 2025-02-20 12:26:21, Dmitry Baryshkov wrote:
> On DPU >= 5.0 CTL blocks were reworked in order to support using a
> single CTL for all outputs. In preparation of reworking the RM code to
> return single CTL make sure that dpu_encoder can cope with that.
>
> Signed-off-by: Dmitry Baryshkov
Rev
On 2025-02-20 12:26:23, Dmitry Baryshkov wrote:
> Unlike previous generation, since DPU 5.0 it is possible to use just one
> CTL to handle all INTF and WB blocks for a single output. And one has to
> use single CTL to support bonded DSI config. Allocate single CTL for
> these DPU versions.
>
> Sig
On 2025-02-20 12:26:20, Dmitry Baryshkov wrote:
> Active controls require setup of the master interface. Pass the selected
> interface to CTL configuration.
>
> Signed-off-by: Dmitry Baryshkov
Reviewed-by: Marijn Suijten
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 2 ++
> d
On 2025-02-20 12:26:19, Dmitry Baryshkov wrote:
> If several interfaces are being handled through a single CTL, a main
> ('master') INTF needs to be programmed into a separate register. Write
> corresponding value into that register.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/ms
On 2025-02-20 12:26:18, Dmitry Baryshkov wrote:
> In case of complex pipelines (e.g. the forthcoming quad-pipe) the DPU
> might use more that one MERGE_3D block for a single output. Follow the
> pattern and extend the CTL_MERGE_3D_ACTIVE active register instead of
> simply writing new value there.
On 2/17/2025 8:41 AM, Krzysztof Kozlowski wrote:
The set_active_pipes() callback configures CTL_FETCH_PIPE_ACTIVE and
newer DPU v12.0 comes with CTL_PIPE_ACTIVE, thus rename it to
set_active_fetch_pipes() to better match the purpose.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Jessica
Use the newly introduced SHM_PAGE_SHIFT register to read the page shift
for the shared memory region, derive the page size from it and store the
resulting value into virtio_shm_region.
Reviewed-by: Dmitry Osipenko
Signed-off-by: Sergio Lopez
---
drivers/virtio/virtio_mmio.c | 20 +++
If VIRTIO_F_SHM_PAGE_SIZE has been negotiated and cfg_type is
VIRTIO_PCI_CAP_SHARED_MEMORY_CFG, the driver must read the page_shift
field, derive the supported page size from it, and honor it when
requesting the map of memory into the shared memory region to the
device.
Extend virtio_pci_cap to ho
Add VIRTGPU_PARAM_HOST_SHM_PAGE_SIZE as a param that can be read with
VIRTGPU_GETPARAM by userspace applications running in the guest to
obtain the host's page size and find out the right alignment to be used
in shared memory allocations.
Reviewed-by: Dmitry Osipenko
Signed-off-by: Sergio Lopez
Introduce VIRTIO_F_SHM_PAGE_SIZE, a feature bit which indicates that the
transport provides the page size for SHM regions.
Reviewed-by: Dmitry Osipenko
Signed-off-by: Sergio Lopez
---
drivers/virtio/virtio_pci_modern.c | 3 +++
drivers/virtio/virtio_ring.c | 2 ++
include/uapi/linux/virti
re.kernel.org/r/20250220-virtio-shm-page-size-v3-0-874fff6f3...@redhat.com
Changes in v3:
- Merge patch 2 (virtio: introduce VIRTIO_F_SHM_PAGE_SIZE) into the
changes for virtio-pci (thanks Dmitry Osipenko).
- In virtio_gpu_getparam_ioctl(), return ENOENT instead of EINVAL
if the device lacks
Reviewed-by: Lyude Paul
On Tue, 2025-02-18 at 15:23 +0100, Thomas Zimmermann wrote:
> Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
> buffer size. Align the pitch to a multiple of 256.
>
> Signed-off-by: Thomas Zimmermann
> Cc: Karol Herbst
> Cc: Lyude Paul
> Cc: Danilo
Hi
> On 21 Feb 2025, at 12:04 AM, Neal Gompa wrote:
>
> On Thu, Feb 20, 2025 at 11:47 AM Aditya Garg wrote:
>>
>> From: Kerem Karabay
>>
>> The Touch Bars found on x86 Macs support two USB configurations: one
>> where the device presents itself as a HID keyboard and can display
>> predefined
On 2025-02-20 18:06:01, Dmitry Baryshkov wrote:
> On Thu, Feb 20, 2025 at 11:42:28PM +0800, Jun Nie wrote:
> > Dmitry Baryshkov 于2025年2月20日周四 18:39写道：
> > >
> > > On Thu, Feb 20, 2025 at 06:07:56PM +0800, Jun Nie wrote:
> > > > There is dual DSI case that every DSI link is connected to an
> > > >
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Dave,
The AMD XDNA driver will follow the guideline requirements.
Thanks,
Lizhi
From: Dave Airlie
Date: Wednesday, February 19, 2025 at 1:02 PM
To: dri-devel , Jacek Lawrynowicz
, Stanislaw Gruszka
, Ma, Min , Hou, Lizhi
Subject:
Pass the drm file to the query funcs in xe_query.c. This will be
necessary for a future query.
Signed-off-by: Jonathan Cavitt
---
drivers/gpu/drm/xe/xe_query.c | 39 ---
1 file changed, 27 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c
Add additional information to drm client so it can report up to the last
50 exec queues to have been banned on it, as well as the last pagefault
seen when said exec queues were banned. Since we cannot reasonably
associate a pagefault to a specific exec queue, we currently report the
last seen page
Migrate the pagefault struct from xe_gt_pagefault.c to the
xe_gt_pagefault.h header file, along with the associated enum values.
Signed-off-by: Jonathan Cavitt
---
drivers/gpu/drm/xe/xe_gt_pagefault.c | 27 ---
drivers/gpu/drm/xe/xe_gt_pagefault.h | 28 +++
Add a counter to xe_drm_client that tracks the number of times the
engine has been reset since the drm client was created.
Signed-off-by: Jonathan Cavitt
---
drivers/gpu/drm/xe/xe_drm_client.h | 2 ++
drivers/gpu/drm/xe/xe_guc_submit.c | 4 +++-
2 files changed, 5 insertions(+), 1 deletion(-)
d
Add the exec queue id to the exec queue struct. This is useful for
performing a reverse lookup into the xef->exec_queue xarray.
Signed-off-by: Jonathan Cavitt
---
drivers/gpu/drm/xe/xe_exec_queue.c | 1 +
drivers/gpu/drm/xe/xe_exec_queue_types.h | 2 ++
2 files changed, 3 insertions(+)
d
Add support for userspace to query per drm client reset stats via the
query ioctl. This includes the number of engine resets the drm client
has observed, as well as a list of up to the last 50 relevant exec
queue bans and their associated causal pagefaults (if they exists).
v2: Report EOPNOTSUPP
Add additional information to drm client so it can report the last 50
exec queues to have been banned on it, as well as the last pagefault
seen when said exec queues were banned. Since we cannot reasonably
associate a pagefault to a specific exec queue, we currently report the
last seen pagefault o
Add tests that exercise the xe reset stats query. The current tests
simply output the result of the tests and assert that the reset and ban
counters properly increment.
Signed-off-by: Jonathan Cavitt
---
include/drm-uapi/xe_drm.h | 50 ++
tests/intel/xe_query.c| 339 +++
Hi Boris,
On 15.02.2025 10:44, Boris Brezillon wrote:
> On Fri, 14 Feb 2025 20:55:21 +
> Adrián Larumbe wrote:
>
> > Commit 434e5ca5b5d7 ("drm/panthor: Expose size of driver internal BO's over
> > fdinfo") locks the VMS xarray, to avoid UAF errors when the same VM is
> > being concurrently de
On Thu, Feb 20, 2025 at 04:59:29PM +0100, Thomas Hellström wrote:
> On Thu, 2025-02-20 at 15:53 +, Matthew Auld wrote:
> > On 13/02/2025 02:11, Matthew Brost wrote:
> > > Migration is implemented with range granularity, with VRAM backing
> > > being
> > > a VM private TTM BO (i.e., shares dma-r
On Thu, Feb 20, 2025 at 03:28:23PM +0200, Gwan-gyeong Mun wrote:
>
>
> On 2/13/25 4:10 AM, Matthew Brost wrote:
> > Avoid multiple CPU page faults to the same device page racing by trying
> > to lock the page in do_swap_page before taking an extra reference to the
> > page. This prevents scenario
On Thu, Feb 20, 2025 at 6:30 AM Sergio Lopez wrote:
[...]
> @@ -829,6 +839,7 @@ static int virtio_pci_find_shm_cap(struct pci_dev *dev,
> u8 required_id,
> *bar = res_bar;
> *offset = res_offset;
> *len = res_length;
> + *page_size = 1
Jerome Brunet wrote:
> Add helper functions to create a device on the auxiliary bus.
>
> This is meant for fairly simple usage of the auxiliary bus, to avoid having
> the same code repeated in the different drivers.
>
> Suggested-by: Stephen Boyd
> Cc: Arnd Bergmann
Reviewed-by: Ira Weiny
[s
Thank you all, pushed to drm-misc-fixes. :)
On 2025-02-20 16:42, Tejun Heo wrote:
On Thu, Feb 20, 2025 at 03:07:57PM +0100, Maarten Lankhorst wrote:
The cgroups controller is currently maintained through the
drm-misc tree, so lets add add Maxime Ripard, Natalie Vock
and me as specific maintaine
Hi Sebastian,
On Thursday, 20 February 2025 17:10:57 CET Sebastian Brzezinka wrote:
> Hi Janusz
>
> On Wed Feb 19, 2025 at 6:37 PM UTC, Janusz Krzysztofik wrote:
> > Starting with commit ec3e00b4ee27 ("drm/i915: stop registering if
> > drm_dev_register() fails"), we return immediately from
> > i9
чт, 20 лют. 2025 р. о 17:07 Dmitry Baryshkov пише:
>
> On Thu, Feb 20, 2025 at 02:26:22PM +0200, Svyatoslav Ryhel wrote:
> > т, 20 лют. 2025 р. о 13:35 Dmitry Baryshkov
> > пише:
> > >
> > > On Thu, Feb 20, 2025 at 09:37:18AM +0200, Svyatoslav Ryhel wrote:
> > > > ср, 19 лют. 2025 р. о 15:34 Dmi
> Wiadomość napisana przez Detlev Casanova w
> dniu 20 lut 2025, o godz. 18:03:
>
> Hi Piotr,
>
> On Thursday, 20 February 2025 06:16:20 EST Piotr Oniszczuk wrote:
>>
>>
>> Detelv,
>>
>> Just curious of your opinion:
>>
>> I’m on 6.14-rc3 and using
>> https://gitlab.collabora.com/cristic
Hi Dave, Simona,
A few fixes for v6.14, as described below.
The following changes since commit 866e43b945bf98f8e807dfa45eca92f931f3a032:
drm/msm: UAPI error reporting (2025-01-03 07:20:28 -0800)
are available in the Git repository at:
https://gitlab.freedesktop.org/drm/msm.git tags/drm-msm
Dmitry Baryshkov 于2025年2月18日周二 03:57写道：
>
> On Mon, Feb 17, 2025 at 10:16:01PM +0800, Jun Nie wrote:
> > Currently, only 2 pipes are used at most for a plane. A stage structure
> > describes the configuration for a mixer pair. So only one stage is needed
> > for current usage cases. The quad-pipe
Hi
> On 19 Feb 2025, at 1:27 PM, Thomas Zimmermann wrote:
>
> Hi
>
> Am 18.02.25 um 21:12 schrieb Aditya Garg:
>> Hi
>>
>> In continuation to my previous mail.
>>
+
+static int appletbdrm_send_msg(struct appletbdrm_device *adev, u32 msg)
+{
+ struct appletbdrm_msg_simple_r
After a GPU reset happens, the driver creates a coredump file. However,
the user might not be aware of it. Log the file creation the user can
find more information about the device and add the file to bug reports.
This is similar to what the xe driver does.
Reviewed-by: Christian König
Signed-off
Hi Dave and Sima,
Here goes our round of Xe fixes of this week.
Thanks,
Rodrigo.
drm-xe-fixes-2025-02-20:
- Fix error handling in xe_irq_install (Lucas)
- Fix devcoredump format (Jose, Lucas)
The following changes since commit 0ad2507d5d93f39619fc42372c347d6006b64319:
Linux 6.14-rc3 (2025-02
Hi Dave and Sima,
Here goes our i915 fixes for this round. Mostly display related,
with the exception of the spin_lock_irqsave conversion on guc submission.
Thanks,
Rodrigo.
drm-intel-fixes-2025-02-20:
- Use spin_lock_irqsave() in interruptible context on guc submission (Krzysztof)
- Fixes on DD
Hi Piotr,
On Thursday, 20 February 2025 06:16:20 EST Piotr Oniszczuk wrote:
> > Wiadomość napisana przez Detlev Casanova w
> > dniu 17 lut 2025, o godz. 22:47:
> >
> > To support HDMI audio on the rk3588 based devices, the generic HDMI
> > Codec framework is used in the dw-hdmi-qp DRM bridge dri
From: Hector Martin
%p4cc is designed for DRM/V4L2 FOURCCs with their specific quirks, but
it's useful to be able to print generic 4-character codes formatted as
an integer. Extend it to add format specifiers for printing generic
32-bit FOURCCs with various endian semantics:
%p4ch Host-endian
On Thu, 2025-02-20 at 12:37 -0400, Jason Gunthorpe wrote:
> > I think one of key advantages of open source is that people
> > stick
> > around for a very long time. Even when they switch jobs or move
> > around. Maybe the usual “for life” qualifier isn’t really a
> > great
> > choic
Corrects the following grammatical issues in the VGA Arbiter documentation:
- Fixes subject-verb agreement by changing "co-exists" to "co-exist"
- Corrects pluralization by changing "server" to "servers"
- Improves sentence structure for clarity
Signed-off-by: Pranav Tyagi
Reviewed-by: Bagas Sanj
From: Kerem Karabay
The Touch Bars found on x86 Macs support two USB configurations: one
where the device presents itself as a HID keyboard and can display
predefined sets of keys, and one where the operating system has full
control over what is displayed.
This commit adds support for the displa
>
> The thing is I am still new to DRM code and APIs, it's my first driver (and
> probably the last). I actually thought I could learn more here, but I'll try
> to find solutions myself now.
>
> I'll send a v2 once all the issues are addressed
>
V2 with all the problems pointed out solved
From: Kerem Karabay
Add XRGB emulation helper for devices that only support BGR888.
Signed-off-by: Kerem Karabay
Signed-off-by: Aditya Garg
Reviewed-by: Thomas Zimmermann
---
v2 -> Fix incorrect description
drivers/gpu/drm/drm_format_helper.c | 54 +
.../gpu/drm/tes
When a ring reset happens, the kernel log shows only "amdgpu: Starting
ring reset", but when it finishes nothing appears in the
log. Explicitly write in the log that the reset has finished correctly.
Reviewed-by: Christian König
Signed-off-by: André Almeida
---
drivers/gpu/drm/amd/amdgpu/amdgp
On Thu, Feb 20, 2025 at 05:24:01PM +0100, Simona Vetter wrote:
> Better analogy aside, I fundamentally disagree with understanding
> maintainership as a gatekeeper role that exists to keep the chaos out. My
> goal is to help build a community where people enjoy collaborating, and
> then gtfo so I d
This series does some small improvements to GPU reset information collection.
v2: Keep the wedge event in amdgpu_device_gpu_recover() and add and
extra check to avoid triggering two events.
André Almeida (3):
drm/amdgpu: Log the creation of a coredump file
drm/amdgpu: Log after a successf
Instead of only triggering a wedged event for complete GPU resets,
trigger for all types, like soft resets and ring resets. Regardless of
the reset, it's useful for userspace to know that it happened because
the kernel will reject further submissions from that app.
Signed-off-by: André Almeida
--
On Tue, Feb 18, 2025 at 11:13:39AM +0530, Murthy, Arun R wrote:
> On 17-02-2025 15:38, Pekka Paalanen wrote:
> > Hi Arun,
> >
> > this whole series seems to be missing all the UAPI docs for the DRM
> > ReST files, e.g. drm-kms.rst. The UAPI header doc comments are not a
> > replacement for them, I
On Thu, Feb 13, 2025 at 08:20:52PM +1000, David Airlie wrote:
> On Sun, Feb 9, 2025 at 6:48 AM Theodore Ts'o wrote:
> >
> > On Fri, Feb 07, 2025 at 06:16:38AM -0600, Dr. Greg wrote:
> > >
> > > The all powerful sub-system maintainer model works well if the big
> > > technology companies can employ
On Thu, Feb 20, 2025 at 11:48:45PM +0800, Jun Nie wrote:
> Dmitry Baryshkov 于2025年2月18日周二 03:57写道：
> >
> > On Mon, Feb 17, 2025 at 10:16:01PM +0800, Jun Nie wrote:
> > > Currently, only 2 pipes are used at most for a plane. A stage structure
> > > describes the configuration for a mixer pair. So o
On 13/02/2025 02:11, Matthew Brost wrote:
Migration is implemented with range granularity, with VRAM backing being
a VM private TTM BO (i.e., shares dma-resv with VM). The lifetime of the
TTM BO is limited to when the SVM range is in VRAM (i.e., when a VRAM
SVM range is migrated to SRAM, the TTM
Hi Janusz
On Wed Feb 19, 2025 at 6:37 PM UTC, Janusz Krzysztofik wrote:
> Starting with commit ec3e00b4ee27 ("drm/i915: stop registering if
> drm_dev_register() fails"), we return immediately from
> i915_driver_register() if drm_dev_register() fails, skipping remaining
> registration steps. Howev
On 1/9/25 17:57, Thomas Zimmermann wrote:
> Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
> buffer size. Align the pitch to a multiple of 4.
>
> Signed-off-by: Thomas Zimmermann
> Cc: David Airlie
> Cc: Gerd Hoffmann
> Cc: Gurchetan Singh
> Cc: Chia-I Wu
> ---
> drivers
On Thu, Feb 20, 2025 at 11:42:28PM +0800, Jun Nie wrote:
> Dmitry Baryshkov 于2025年2月20日周四 18:39写道：
> >
> > On Thu, Feb 20, 2025 at 06:07:56PM +0800, Jun Nie wrote:
> > > There is dual DSI case that every DSI link is connected to an independent
> > > panel. In this dual panel case, the frame width
On Thu, Feb 20, 2025 at 11:40:03PM +0800, Jun Nie wrote:
> Dmitry Baryshkov 于2025年2月20日周四 18:33写道：
> >
> > On Thu, Feb 20, 2025 at 06:07:55PM +0800, Jun Nie wrote:
> > > The DSI interface can be connected to a panel that has a dual DSI channel,
> > > or to two separate panels, each equipped with a
On Thu, 2025-02-20 at 15:53 +, Matthew Auld wrote:
> On 13/02/2025 02:11, Matthew Brost wrote:
> > Migration is implemented with range granularity, with VRAM backing
> > being
> > a VM private TTM BO (i.e., shares dma-resv with VM). The lifetime
> > of the
> > TTM BO is limited to when the SVM
On Thu, Feb 20, 2025 at 11:45:18PM +0800, Jun Nie wrote:
> Dmitry Baryshkov 于2025年2月20日周四 18:27写道：
> >
> > On Thu, Feb 20, 2025 at 06:07:52PM +0800, Jun Nie wrote:
> > > This change originates from the Qualcomm Android Linux driver. It is
> > > essential to support a dual-DSI configuration with tw
On Thu, Feb 20, 2025 at 03:07:57PM +0100, Maarten Lankhorst wrote:
> The cgroups controller is currently maintained through the
> drm-misc tree, so lets add add Maxime Ripard, Natalie Vock
> and me as specific maintainers for dmem.
>
> We keep the cgroup mailing list CC'd on all cgroup specific pa
On Wed, 19 Feb 2025 09:28:51 +0530
"Murthy, Arun R" wrote:
> On 18-02-2025 21:48, Pekka Paalanen wrote:
> > On Tue, 18 Feb 2025 11:13:39 +0530
> > "Murthy, Arun R" wrote:
> >
> >> On 17-02-2025 15:38, Pekka Paalanen wrote:
> >>> Hi Arun,
> >>>
> >>> this whole series seems to be missing all t
Dmitry Baryshkov 于2025年2月20日周四 18:27写道：
>
> On Thu, Feb 20, 2025 at 06:07:52PM +0800, Jun Nie wrote:
> > This change originates from the Qualcomm Android Linux driver. It is
> > essential to support a dual-DSI configuration with two panels in
> > some circumstances per testing. As the name suggest
Dmitry Baryshkov 于2025年2月20日周四 18:39写道：
>
> On Thu, Feb 20, 2025 at 06:07:56PM +0800, Jun Nie wrote:
> > There is dual DSI case that every DSI link is connected to an independent
> > panel. In this dual panel case, the frame width for DSC on each link should
> > be halved to support the usage case
Hi,
On 2/20/2025 2:53 PM, Tvrtko Ursulin wrote:
>
> On 20/02/2025 13:14, Jacek Lawrynowicz wrote:
>> Hi,
>>
>> On 2/19/2025 11:55 AM, Joonas Lahtinen wrote:
>>> Quoting Jacek Lawrynowicz (2025-02-11 17:57:03)
Hi, can I submit this to drm-misc or should someone commit this to
drm-intel?
Dmitry Baryshkov 于2025年2月20日周四 18:33写道：
>
> On Thu, Feb 20, 2025 at 06:07:55PM +0800, Jun Nie wrote:
> > The DSI interface can be connected to a panel that has a dual DSI channel,
> > or to two separate panels, each equipped with a single DSI channel. To
> > prevent the DSC configuration for the d
On Thu, Feb 20, 2025 at 03:07:57PM +0100, Maarten Lankhorst wrote:
> The cgroups controller is currently maintained through the
> drm-misc tree, so lets add add Maxime Ripard, Natalie Vock
> and me as specific maintainers for dmem.
>
> We keep the cgroup mailing list CC'd on all cgroup specific pa
On Thu, 2025-02-20 at 10:28 -0300, Maíra Canal wrote:
> Hi Philipp,
>
> On 20/02/25 08:28, Philipp Stanner wrote:
> > The documentation for drm_sched_backend_ops.run_job() mentions a
> > certain
> > function called drm_sched_job_recovery(). This function does not
> > exist.
> > What's actually mea
On Thu, Feb 20, 2025 at 11:00:28AM +0100, Simona Vetter wrote:
> On Thu, Feb 20, 2025 at 10:53:57AM +0100, Simona Vetter wrote:
> > On Wed, Feb 19, 2025 at 06:02:39PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Video players (eg. mpv) do periodic XResetScreenSaver() calls to
On 2/20/25 17:28, Sergio Lopez wrote:
> Add VIRTGPU_PARAM_HOST_SHM_PAGE_SIZE as a param that can be read with
> VIRTGPU_GETPARAM by userspace applications running in the guest to
> obtain the host's page size and find out the right alignment to be used
> in shared memory allocations.
>
> Signed-of
On Thu, Feb 20, 2025 at 02:26:22PM +0200, Svyatoslav Ryhel wrote:
> т, 20 лют. 2025 р. о 13:35 Dmitry Baryshkov
> пише:
> >
> > On Thu, Feb 20, 2025 at 09:37:18AM +0200, Svyatoslav Ryhel wrote:
> > > ср, 19 лют. 2025 р. о 15:34 Dmitry Baryshkov
> > > пише:
> > > >
> > > > On Tue, Feb 18, 2025 a
On Thu, 2025-02-20 at 10:42 -0300, Maíra Canal wrote:
> Hi Philipp,
>
> On 20/02/25 08:28, Philipp Stanner wrote:
> > drm_sched_backend_ops.timedout_job()'s documentation is outdated.
> > It
> > mentions the deprecated function drm_sched_resubmit_job().
> > Furthermore,
> > it does not point out t
On Thu, Feb 20, 2025 at 03:17:23PM +0100, Konrad Dybcio wrote:
> On 20.02.2025 12:14 PM, Dmitry Baryshkov wrote:
> > Instead of using .parent_names, use .parent_data, which binds parent
> > clocks by using relative names specified in DT rather than using global
> > system clock names.
>
> You're n
чт, 20 лют. 2025 р. о 17:07 Dmitry Baryshkov пише:
>
> On Thu, Feb 20, 2025 at 02:26:22PM +0200, Svyatoslav Ryhel wrote:
> > т, 20 лют. 2025 р. о 13:35 Dmitry Baryshkov
> > пише:
> > >
> > > On Thu, Feb 20, 2025 at 09:37:18AM +0200, Svyatoslav Ryhel wrote:
> > > > ср, 19 лют. 2025 р. о 15:34 Dmi
On 20.02.2025 12:14 PM, Dmitry Baryshkov wrote:
> Link LVDS clocks to the from MDP4 to the MMCC and back from the MMCC
> to the MDP4 display controller.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
On Fri, 14 Feb 2025 12:02:11 +0800, Nick Chan wrote:
> Apple SoCs come with a 2-wire interface named DWI. On some iPhones, iPads
> and iPod touches the backlight controller is connected via this interface.
> This series adds a backlight driver for backlight controllers connected
> this way.
>
> Ch
return ERR_PTR(ret);
- bridge->pre_enable_prev_first = panel->prepare_prev_first;
-
return bridge;
}
EXPORT_SYMBOL(drmm_panel_bridge_add);
---
base-commit: 8936cec5cb6e27649b86fabf383d7ce4113bba49
change-id: 20250220-panel_prev_first-fc90c6c8aefa
Best regards,
--
Dmitry Baryshkov
On Thu, 13 Feb 2025, Thomas Zimmermann wrote:
> Hi
>
> Am 11.02.25 um 14:57 schrieb Lee Jones:
> > On Thu, 06 Feb 2025, Thomas Zimmermann wrote:
> >
> > > Remove support for fb events from the led backlight trigger. Provide the
> > > helper ledtrig_backlight_blank() instead. Call it from fbdev t
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