I was pondering with myself for a while if I should just make it official
that I'm not really involved in the kernel community anymore, neither as a
reviewer, nor as a maintainer.
Most of the time I simply excused myself with "if something urgent comes
up, I can chime in and help out". Lyude and D
I was writing this up on Wednesday night, chatted with a few folks about
it. A lot of things have happened. I often thought about at least
contributing some patches again once I find the time, but...
Anyway, you'll find a full and proper statement in the patch itself. And I
wish everybody the best
Hi Heiko,
At 2025-02-15 06:24:17, "Heiko Stübner" wrote:
>Am Mittwoch, 12. Februar 2025, 10:34:59 MEZ schrieb Andy Yan:
>> From: Andy Yan
>>
>> Now these two function share the same logic, the can
>> be merged as one.
>>
>> Signed-off-by: Andy Yan
>> ---
>>
>> (no changes since v1)
>>
>>
On Fri, Feb 14, 2025 at 07:16:30PM +0100, Jerome Brunet wrote:
> On Fri 14 Feb 2025 at 17:33, Greg Kroah-Hartman
> wrote:
>
> > On Tue, Feb 11, 2025 at 06:27:58PM +0100, Jerome Brunet wrote:
> >> Add helper functions to create a device on the auxiliary bus.
> >>
> >> This is meant for fairly si
On Fri, Feb 14, 2025 at 12:13:03PM -0600, Elizabeth Figura wrote:
> On Friday, 14 February 2025 07:06:20 CST Greg Kroah-Hartman wrote:
> > On Fri, Feb 14, 2025 at 12:28:00PM +, Mike Lothian wrote:
> > > This allows ntsync to be usuable by non-root processes out of the box
> >
> > Are you sure
Hi Svyatoslav,
kernel test robot noticed the following build errors:
[auto build test ERROR on robh/for-next]
[also build test ERROR on linus/master v6.14-rc2 next-20250214]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use
On 2/15/25 6:12 AM, Doug Anderson wrote:
> Hi,
>
> On Fri, Feb 14, 2025 at 9:30 AM Tejas Vipin wrote:
>>
>> Change the sony-td4353-jdi panel to use multi style functions for
>> improved error handling.
>>
>> Signed-off-by: Tejas Vipin
>> ---
>> drivers/gpu/drm/panel/panel-sony-td4353-jdi.c |
On Sat, 15 Feb 2025, at 2:18 PM, Ryan Walklin wrote:
> On Sun, 20 Oct 2024, at 3:14 AM, Dmitry Baryshkov wrote:
>> On Sun, Sep 29, 2024 at 10:04:40PM +1300, Ryan Walklin wrote:
>
>>> diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h
>>> b/drivers/gpu/drm/sun4i/sunxi_engine.h
>>> index c48cbc1aceb8
On Sun, 20 Oct 2024, at 3:14 AM, Dmitry Baryshkov wrote:
> On Sun, Sep 29, 2024 at 10:04:40PM +1300, Ryan Walklin wrote:
>> diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h
>> b/drivers/gpu/drm/sun4i/sunxi_engine.h
>> index c48cbc1aceb80..ffafc29b3a0c3 100644
>> --- a/drivers/gpu/drm/sun4i/su
On Sun, 20 Oct 2024, at 3:11 AM, Dmitry Baryshkov wrote:
> On Sun, Sep 29, 2024 at 10:04:33PM +1300, Ryan Walklin wrote:
Hi Dmitry, thanks for reviewing, and apologies for the delay in replying.
>> -enum sun8i_csc_mode {
>> -SUN8I_CSC_MODE_OFF,
>> -SUN8I_CSC_MODE_YUV2RGB,
>> -SUN8I_CS
On Fri, Feb 14, 2025 at 10:29:29AM +0100, Josef Luštický wrote:
> Hello Alex,
> there is a bug in mipi_dbi_hw_reset() function that implements the logic of
> display reset contrary.
> It keeps the reset line activated which keeps displays in reset state.
>
> I reported the bug to
> https://gitlab.
On Fri, Feb 14, 2025 at 04:15:25PM -0600, Elizabeth Figura wrote:
> On Friday, 14 February 2025 12:45:39 CST Darrick J. Wong wrote:
> > On Fri, Feb 14, 2025 at 12:13:03PM -0600, Elizabeth Figura wrote:
> > > On Friday, 14 February 2025 07:06:20 CST Greg Kroah-Hartman wrote:
> > > > On Fri, Feb 14,
On Fri, Feb 14, 2025 at 01:29:10PM +, David Laight wrote:
> On Thu, 13 Feb 2025 20:54:59 -0500
> Alex Lanzano wrote:
>
> > On Thu, Jan 16, 2025 at 05:48:01AM -0800, Nikita Zhandarovich wrote:
> > > There are conditions, albeit somewhat unlikely, under which right hand
> > > expressions, calcu
VOP2 on RK3588 is able to use the HDMI PHY PLL as an alternative and
more accurate pixel clock source to improve handling of display modes up
to 4K@60Hz on video ports 0, 1 and 2.
The HDMI1 PHY PLL clock source cannot be added directly to vop node in
rk3588-base.dtsi, along with the HDMI0 related
The RK3588 specific implementation is currently quite limited in terms
of handling the full range of display modes supported by the connected
screens, e.g. 2560x1440@75Hz, 2048x1152@60Hz, 1024x768@60Hz are just a
few of them.
Additionally, it doesn't cope well with non-integer refresh rates like
5
Add the necessary DT changes to enable the second HDMI output port on
Rockchip RK3588 EVB1.
While at it, switch the position of &vop_mmu and @vop to maintain the
alphabetical order.
Signed-off-by: Cristian Ciocaltea
---
arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 42 +
Since commit c4b09c562086 ("phy: phy-rockchip-samsung-hdptx: Add clock
provider support"), the HDMI PHY PLL can be used as an alternative and
more accurate pixel clock source for VOP2 to improve display modes
handling on RK3588 SoC.
Add the missing #clock-cells property to allow using the clock pr
As a followup to getting basic HDMI1 output support [1] merged upstream,
make use of the HDMI1 PHY PLL to provide better VOP2 display modes
handling for the second HDMI output port on RK3588 SoC, similarly to
what has been achieved recently for HDMI0 [2].
Additionally, enable HDMI1 output on Rockc
On 1/17/2025 8:00 AM, Jun Nie wrote:
Current code only supports usage cases with one pair of mixers at
most. To support quad-pipe usage case, two pairs of mixers need to
be reserved. The lm_count for all pairs is cleared if a peer
allocation fails in current implementation. Reset the current l
Hi,
On Fri, Feb 14, 2025 at 9:30 AM Tejas Vipin wrote:
>
> mipi_dsi_dcs_set_tear_off can heavily benefit from being converted
> to a multi style function as it is often called in the context of
> similar functions.
Given that it has one caller, the wording "heavily benefit" and "often
called" is
Hi,
On Fri, Feb 14, 2025 at 9:30 AM Tejas Vipin wrote:
>
> Change the sony-td4353-jdi panel to use multi style functions for
> improved error handling.
>
> Signed-off-by: Tejas Vipin
> ---
> drivers/gpu/drm/panel/panel-sony-td4353-jdi.c | 107 --
> 1 file changed, 23 insertions(
From: Dmitry Baryshkov
Stop poking into CRTC state from dpu_encoder.c, fill CRTC HW resources
from dpu_crtc_assign_resources().
Signed-off-by: Dmitry Baryshkov
[quic_abhin...@quicinc.com: cleaned up formatting]
Signed-off-by: Abhinav Kumar
Reviewed-by: Abhinav Kumar
Reviewed-by: Dmitry Barysh
On 1/17/2025 8:00 AM, Jun Nie wrote:
Add pipe as trace argument in trace_dpu_crtc_setup_mixer() to ease
converting pipe into pipe array later.
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +-
drive
On 1/17/2025 8:00 AM, Jun Nie wrote:
Currently, only one pair of mixers is supported, so a non-zero counter
value is sufficient to identify the correct mixer within that pair.
However, future implementations may involve multiple mixer pairs. With
the current implementation, all mixers within t
Set writeback encoders as possible clones for DSI encoders and vice
versa.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 32 +
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 2
The CWB mux has a pending flush bit and *_active register.
Add support for configuring them within the dpu_hw_ctl layer.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 13 ++
.../gpu/drm/ms
For concurrent writeback, the real time encoder is responsible for
trigger flush and trigger start. Return early for trigger start and
trigger flush for the concurrent writeback encoders.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/
On 1/17/2025 8:00 AM, Jun Nie wrote:
It is more likely that resource allocation may fail in complex usage
case, such as quad-pipe case, than existing usage cases.
A resource type ID is printed on failure in the current implementation,
but the raw ID number is not explicit enough to help easily
Currently, our hardware only supports a single output using CDM block at
most. Because of this, we cannot support cases where both writeback and DP
output request CDM simultaneously
To avoid this happening when CWB is enabled, change
msm_display_topoloy.needs_cdm into a num_cdm counter to track ho
Adjust QoS remapper, OT limit, and CDP parameters to account for
concurrent writeback
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
DPU supports a single writeback session running concurrently with primary
display when the CWB mux is configured properly. This series enables
clone mode for DPU driver and adds support for programming the CWB mux
in cases where the hardware has dedicated CWB pingpong blocks. Currently,
the CWB har
Add a helper that will handle the correct order of the encoder kickoffs
for concurrent writeback.
For concurrent writeback, the realtime encoder must always kickoff last
as it will call the trigger flush and start.
This avoids the following scenario where the writeback encoder
increments the pend
Add support for RM to reserve dedicated CWB PINGPONGs and CWB muxes
For concurrent writeback, even-indexed CWB muxes must be assigned to
even-indexed LMs and odd-indexed CWB muxes for odd-indexed LMs. The same
even/odd rule applies for dedicated CWB PINGPONGs.
Track the CWB muxes in the global st
From: Dmitry Baryshkov
All resource allocation is centered around the LMs. Then other blocks
(except DSCs) are allocated basing on the LMs that was selected, and LM
powers up the CRTC rather than the encoder.
Moreover if at some point the driver supports encoder cloning,
allocating resources fro
If the clone mode enabled status is changing, a modeset needs to happen
so that the resources can be reassigned
Reviewed-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 17 -
drivers/gpu/drm/msm/disp/dp
Cache the CWB block mask in the DPU virtual encoder and configure CWB
according to the CWB block mask within the writeback phys encoder
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 75
Currently, the topology is calculated based on the assumption that the
user cannot request real-time and writeback simultaneously. For example,
the number of LMs and CTLs are currently based off the number of phys
encoders under the assumption there will be at least 1 LM/CTL per phys
encoder.
This
From: Dmitry Baryshkov
Up to now the driver has been using encoder to allocate hardware
resources. Switch it to use CRTC id in preparation for the next step.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
Changes in v
Starting the frame done timer before the encoder is finished kicking off
can lead to unnecessary frame done timeouts when the device is
experiencing heavy load (ex. when debug logs are enabled).
Thus, create a separate API for starting the encoder frame done timer and
call it after the encoder kic
Jerome Brunet wrote:
> On Fri 14 Feb 2025 at 10:15, Ira Weiny wrote:
>
> > Jerome Brunet wrote:
> >> The auxiliary device creation of this driver is simple enough to
> >> use the available auxiliary device creation helper.
> >>
> >> Use it and remove some boilerplate code.
> >>
> >> Signed-off-
Hi Xin,
kernel test robot noticed the following build errors:
[auto build test ERROR on linus/master]
[also build test ERROR on drm-misc/drm-misc-next v6.14-rc2 next-20250214]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use
Am Mittwoch, 12. Februar 2025, 10:34:59 MEZ schrieb Andy Yan:
> From: Andy Yan
>
> Now these two function share the same logic, the can
> be merged as one.
>
> Signed-off-by: Andy Yan
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 42 +---
>
On Fri, 14 Feb 2025, 18:45 Darrick J. Wong, wrote:
> On Fri, Feb 14, 2025 at 12:13:03PM -0600, Elizabeth Figura wrote:
> > On Friday, 14 February 2025 07:06:20 CST Greg Kroah-Hartman wrote:
> > > On Fri, Feb 14, 2025 at 12:28:00PM +, Mike Lothian wrote:
> > > > This allows ntsync to be usuabl
Hi Xin,
kernel test robot noticed the following build errors:
[auto build test ERROR on linus/master]
[also build test ERROR on drm-misc/drm-misc-next v6.14-rc2 next-20250214]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use
Add a counter to xe_drm_client that tracks the number of times the
engine has been reset since the drm client was created.
Signed-off-by: Jonathan Cavitt
---
drivers/gpu/drm/xe/xe_drm_client.c | 2 ++
drivers/gpu/drm/xe/xe_drm_client.h | 2 ++
drivers/gpu/drm/xe/xe_guc_submit.c | 4 +++-
3 files
Commit 434e5ca5b5d7 ("drm/panthor: Expose size of driver internal BO's over
fdinfo") locks the VMS xarray, to avoid UAF errors when the same VM is
being concurrently destroyed by another thread. However, that puts the
current thread in atomic context, which means taking the VMS' heap locks
will tri
Commit 0590c94c3596 ("drm/panthor: Fix race condition when gathering fdinfo
group samples") introduced an xarray lock to deal with potential
use-after-free errors when accessing groups fdinfo figures. However, this
toggles the kernel's atomic context status, so the next nested mutex lock
will raise
Add the exec queue id to the exec queue struct. This is useful for
performing a reverse lookup into the xef->exec_queue xarray.
Signed-off-by: Jonathan Cavitt
---
drivers/gpu/drm/xe/xe_exec_queue.c | 1 +
drivers/gpu/drm/xe/xe_exec_queue_types.h | 2 ++
2 files changed, 3 insertions(+)
d
Migrate the pagefault struct from xe_gt_pagefault.c to the
xe_gt_pagefault.h header file, along with the associated enum values.
Additionally, add string declarations for the associated enum values, as
well as functions that translate from the enum values to their string
counterparts. The string
Add additional information to drm client so it can report the last 50
exec queues to have been banned on it, as well as the last pagefault
seen when said exec queues were banned. Since we cannot reasonably
associate a pagefault to a specific exec queue, we currently report the
last seen pagefault o
Add additional information to drm client so it can report the last 50
exec queues to have been banned on it, as well as the last pagefault
seen when said exec queues were banned. Since we cannot reasonably
associate a pagefault to a specific exec queue, we currently report the
last seen pagefault
On Fri, Feb 14, 2025 at 02:10:57AM -0500, Neal Gompa wrote:
> On Mon, Feb 10, 2025 at 12:28 PM Mark Brown wrote:
> >
> > On Sun, Feb 09, 2025 at 03:25:26AM -0500, Neal Gompa wrote:
> > > On Friday, February 7, 2025 1:16:11 PM Eastern Standard Time Konstantin
> > > Ryabitsev wrote:
> >
> > > > It i
On 2/14/25 20:45, Rob Clark wrote:
> On Sun, Jan 26, 2025 at 12:43 PM Dmitry Osipenko
> wrote:
>>
>> If userspace never maps GEM object, then BO wastes hostmem space
>> because VirtIO-GPU driver maps VRAM BO at the BO's creating time.
>>
>> Make mappings on-demand by adding new RESOURCE_CREATE_BLO
On Fri, Feb 14, 2025 at 12:13:03PM -0600, Elizabeth Figura wrote:
> On Friday, 14 February 2025 07:06:20 CST Greg Kroah-Hartman wrote:
> > On Fri, Feb 14, 2025 at 12:28:00PM +, Mike Lothian wrote:
> > > This allows ntsync to be usuable by non-root processes out of the box
> >
> > Are you sure
On Fri, Feb 14, 2025 at 05:26:48PM +0100, Thomas Hellström wrote:
> Hi!
>
> On Fri, 2025-02-14 at 11:14 -0500, Demi Marie Obenour wrote:
> > On Fri, Feb 14, 2025 at 09:47:13AM +0100, Thomas Hellström wrote:
> > > Hi
> > >
> > > On Thu, 2025-02-13 at 16:23 -0500, Demi Marie Obenour wrote:
> > > >
> -Original Message-
> From: Borah, Chaitanya Kumar
> Sent: Thursday, February 13, 2025 3:26 PM
> To: Murthy, Arun R ; dri-
> de...@lists.freedesktop.org; intel-...@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org
> Cc: Syrjala, Ville
> Subject: RE: [PATCH v5 2/3] drm/plane: mo
Le 14/02/2025 à 16:53, José Expósito a écrit :
On Thu, Feb 13, 2025 at 02:59:52PM +0100, Louis Chauvet wrote:
On 11/02/25 - 12:09, José Expósito wrote:
From: Louis Chauvet
As the configuration will be used by userspace, add a validator to avoid
creating a broken DRM device.
For the moment
On Fri 14 Feb 2025 at 10:15, Ira Weiny wrote:
> Jerome Brunet wrote:
>> The auxiliary device creation of this driver is simple enough to
>> use the available auxiliary device creation helper.
>>
>> Use it and remove some boilerplate code.
>>
>> Signed-off-by: Jerome Brunet
>> ---
>> drivers/c
On 2/14/25 18:41, Ville Syrjälä wrote:
On Thu, Feb 13, 2025 at 11:47:42PM +0100, Helge Deller wrote:
On 2/13/25 15:42, Ville Syrjälä wrote:
On Thu, Sep 26, 2024 at 12:13:04PM +0200, Helge Deller wrote:
On 9/26/24 11:57, Ville Syrjälä wrote:
On Thu, Sep 26, 2024 at 08:08:07AM +0200, Helge Dell
On Fri 14 Feb 2025 at 17:33, Greg Kroah-Hartman
wrote:
> On Tue, Feb 11, 2025 at 06:27:58PM +0100, Jerome Brunet wrote:
>> Add helper functions to create a device on the auxiliary bus.
>>
>> This is meant for fairly simple usage of the auxiliary bus, to avoid having
>> the same code repeated in
On 2/14/2025 8:21 AM, Jeffrey Hugo wrote:
> If mhi_fw_load_handler() bails out early because the EE is not capable
> of loading firmware, we may reference fw_load_type in cleanup which is
> uninitialized at this point. The cleanup code checks fw_load_type as a
> proxy for knowing if fbc_image was
Hi Thomas, Jocelyn
Same error with linux-6.1.124 debian package ...
It's reported in log as a drm bug by kernel:
[ cut here ]
BUG: the value to copy was not set!
WARNING: CPU: 13 PID: 6163 at drivers/gpu/drm/drm_ioctl.c:478
drm_copy_field+0xa2/0xb0 [drm]
This server ha
On Sun, Jan 26, 2025 at 12:43 PM Dmitry Osipenko
wrote:
>
> If userspace never maps GEM object, then BO wastes hostmem space
> because VirtIO-GPU driver maps VRAM BO at the BO's creating time.
>
> Make mappings on-demand by adding new RESOURCE_CREATE_BLOB IOCTL/UAPI
> hinting flag telling that hos
On Fri, Feb 14, 2025 at 09:21:09AM -0700, Jeffrey Hugo wrote:
> If mhi_fw_load_handler() bails out early because the EE is not capable
> of loading firmware, we may reference fw_load_type in cleanup which is
> uninitialized at this point. The cleanup code checks fw_load_type as a
> proxy for knowin
On 2/14/2025 10:34 AM, Manivannan Sadhasivam wrote:
On Fri, Feb 14, 2025 at 09:21:09AM -0700, Jeffrey Hugo wrote:
If mhi_fw_load_handler() bails out early because the EE is not capable
of loading firmware, we may reference fw_load_type in cleanup which is
uninitialized at this point. The cleanup
On Thu, Feb 13, 2025 at 11:47:42PM +0100, Helge Deller wrote:
> On 2/13/25 15:42, Ville Syrjälä wrote:
> > On Thu, Sep 26, 2024 at 12:13:04PM +0200, Helge Deller wrote:
> >> On 9/26/24 11:57, Ville Syrjälä wrote:
> >>> On Thu, Sep 26, 2024 at 08:08:07AM +0200, Helge Deller wrote:
> Hi Ville,
>
From: Michael Kelley Sent: Monday, February 10, 2025
1:36 PM
>
> From: thomas@oracle.com Sent: Monday, February
> 10, 2025 7:08 AM
> >
> >
> >
> > >> Then the question is why the efifb driver doesn't work in the kdump
> > >> kernel. Actually, it *does* work in many cases. I built the 6.13
This patch removes mipi_dsi_dcs_set_tear_off and replaces it with a
multi version as after replacing it in sony-td4353-jdi, it doesn't
appear anywhere else. sony-td4353-jdi is converted to use multi style
functions, including mipi_dsi_dcs_set_tear_off_multi.
Tejas Vipin (2):
drm/mipi-dsi: Replac
mipi_dsi_dcs_set_tear_off can heavily benefit from being converted
to a multi style function as it is often called in the context of
similar functions.
Signed-off-by: Tejas Vipin
---
drivers/gpu/drm/drm_mipi_dsi.c | 42 +++---
include/drm/drm_mipi_dsi.h | 2 +-
2
Change the sony-td4353-jdi panel to use multi style functions for
improved error handling.
Signed-off-by: Tejas Vipin
---
drivers/gpu/drm/panel/panel-sony-td4353-jdi.c | 107 --
1 file changed, 23 insertions(+), 84 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sony-td43
On 2/14/25 18:16, Sergio Lopez wrote:
> diff --git a/drivers/gpu/drm/virtio/virtgpu_ioctl.c
> b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
> index
> c33c057365f85a2ace536f91655c903036827312..4b49635b4fe1d4256f219823341cef8e5fa8f029
> 100644
> --- a/drivers/gpu/drm/virtio/virtgpu_ioctl.c
> +++ b/driv
On 2/4/2025 1:46 AM, Jacek Lawrynowicz wrote:
From: Karol Wachowski
Add power_profile firmware boot param and set it to 0 by default
which is default FW power profile.
I don't think that patch does this. It looks like
boot_params->power_profile is already defined. What am I missing?
-Jeff
Le 13/02/2025 à 16:36, José Expósito a écrit :
On Thu, Feb 13, 2025 at 02:59:25PM +0100, Louis Chauvet wrote:
On 11/02/25 - 12:09, José Expósito wrote:
Creating a new vkms_config structure will be more complex once we
start adding more options.
Extract the vkms_config structure to its own h
Hi Thomas, Jocelyn
Starting with 6.1.128 longterm kernel failed and it seems to be a 'drm
error'
Xorg error :
(==) Log file: "/var/log/Xorg.0.log", Time: Fri Feb 14 17:32:59 2025
(==) Using system config directory "/usr/share/X11/xorg.conf.d"
(==) No Layout section. Using the first Screen se
Le 14/02/2025 à 16:44, José Expósito a écrit :
On Thu, Feb 13, 2025 at 04:11:20PM +0100, Louis Chauvet wrote:
On 12/02/25 - 15:06, Louis Chauvet wrote:
Le 12/02/2025 à 09:53, Thomas Zimmermann a écrit :
Am 12.02.25 um 09:49 schrieb José Expósito:
If the driver initialization fails, the
Hi,
On Thu, Feb 13, 2025 at 6:44 AM Maxime Ripard wrote:
>
> It's pretty inconvenient to access the full atomic state from
> drm_bridges, so let's change the atomic_post_disable hook prototype to
> pass it directly.
>
> Reviewed-by: Dmitry Baryshkov
> Signed-off-by: Maxime Ripard
>From the poi
Hi,
On Thu, Feb 13, 2025 at 6:44 AM Maxime Ripard wrote:
>
> It's pretty inconvenient to access the full atomic state from
> drm_bridges, so let's change the atomic_enable hook prototype to pass it
> directly.
>
> Reviewed-by: Dmitry Baryshkov
> Signed-off-by: Maxime Ripard
>From the point of
Hi,
On Thu, Feb 13, 2025 at 6:45 AM Maxime Ripard wrote:
>
> The drm_bridge structure contains an encoder pointer that is widely used
> by bridge drivers. This pattern is largely documented as deprecated in
> other KMS entities for atomic drivers.
>
> However, one of the main use of that pointer
Hi,
On Thu, Feb 13, 2025 at 6:44 AM Maxime Ripard wrote:
>
> It's pretty inconvenient to access the full atomic state from
> drm_bridges, so let's change the atomic_disable hook prototype to pass
> it directly.
>
> Reviewed-by: Dmitry Baryshkov
> Signed-off-by: Maxime Ripard
>From the point of
Hi,
On Thu, Feb 13, 2025 at 6:44 AM Maxime Ripard wrote:
>
> It's pretty inconvenient to access the full atomic state from
> drm_bridges, so let's change the atomic_pre_enable hook prototype to
> pass it directly.
>
> Reviewed-by: Dmitry Baryshkov
> Signed-off-by: Maxime Ripard
>From the point
On 2/4/2025 1:46 AM, Jacek Lawrynowicz wrote:
From: Karol Wachowski
Add IVPU_TEST_MODE_CLK_RELINQ_[DISABLE|ENABLE] that overrides
workaround for disabling clock relinquish for testing purposes.
Reviewed-by: Jacek Lawrynowicz
Signed-off-by: Karol Wachowski
Signed-off-by: Jacek Lawrynowicz
On 2/4/2025 1:46 AM, Jacek Lawrynowicz wrote:
From: Tomasz Rusinowicz
Use ivpu_gem_prime_import() based on drm_gem_prime_import_dev()
for importing buffers, removing optimization for same device
imports. This optimization reused the same ivpu_bo object in multiple
contexts but a single buffer c
On 2/4/2025 1:46 AM, Jacek Lawrynowicz wrote:
From: Karol Wachowski
Add debugfs interface to modify following priority bands properties:
* grace period
* process grace period
* process quantum
This allows for the adjustment of hardware scheduling algorithm parameters
for each existing pr
On 2/4/2025 1:46 AM, Jacek Lawrynowicz wrote:
From: Andrzej Kacprowski
Increment the runtime PM counter when entering
ivpu_context_abort_work_fn() to prevent the device
from suspending while the function is executing.
Why should suspend be prevented during the abort fn?
-Jeff
HDMI audio is available on the Rock 5B HDMI TX port.
Enable it.
Reviewed-by: Quentin Schulz
Signed-off-by: Detlev Casanova
---
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
b/arch/arm6
Use the simple-audio-card driver with the hdmi0 QP node as CODEC and
the i2s5 device as CPU.
The simple-audio-card,mclk-fs value is set to 128 as it is done in
the downstream driver.
The #sound-dai-cells value is set to 0 in the hdmi0 node so that it can be
used as an audio codec node.
Tested-by
From: Sugar Zhang
Register the dw-hdmi-qp bridge driver as an HDMI audio codec.
The register values computation functions (for n) are based on the
downstream driver, as well as the register writing functions.
The driver uses the generic HDMI Codec framework in order to implement
the HDMI audio
To support HDMI audio on the rk3588 based devices, the generic HDMI
Codec framework is used in the dw-hdmi-qp DRM bridge driver.
The implementation is mainly based on the downstream driver, ported to the
generic HDMI Codec framework [1] recently merged in the master branch.
The parameters computat
To support HDMI audio on the rk3588 based devices, the generic HDMI
Codec framework is used in the dw-hdmi-qp DRM bridge driver.
The implementation is mainly based on the downstream driver, ported to the
generic HDMI Codec framework [1] recently merged in the master branch.
The parameters computat
On 2/4/2025 1:46 AM, Jacek Lawrynowicz wrote:
From: Andrzej Kacprowski
Multiple threads were accessing mmu cmd queue simultaneously
causing sporadic failures in ivpu_mmu_cmdq_sync() function.
Protect critical code with mmu mutex.
Describe a scenario in which this can occur? The two functions
Hi,
On Thu, Feb 13, 2025 at 6:45 AM Maxime Ripard wrote:
>
> The TI sn65dsi86 driver follows the drm_encoder->crtc pointer that is
> deprecated and shouldn't be used by atomic drivers.
>
> This was due to the fact that we did't have any other alternative to
> retrieve the CRTC pointer. Fortunatel
> > > Fixes")
> > > Signed-off-by: Nathan Chancellor
> > > ---
> > > If you would prefer reapplying the local fix, feel free to do so, but I
> > > would like for it to be in the upstream source so it does not have to
> > > keep being applied.
&
On Tue, Feb 11, 2025 at 06:27:58PM +0100, Jerome Brunet wrote:
> Add helper functions to create a device on the auxiliary bus.
>
> This is meant for fairly simple usage of the auxiliary bus, to avoid having
> the same code repeated in the different drivers.
>
> Suggested-by: Stephen Boyd
> Cc: A
t to be in the upstream source so it does not have to
> > keep being applied.
>
> I've reapplied the original fix and I've confirmed that the fix will
> be pushed to the DML tree as well this time.
Did that actually end up happening? Commit 1b30456150e5
("drm/amd/display: DML21 Reintegration") in next-20250214 reintroduces
this warning... I guess it may be a timing thing because the author date
is three weeks ago or so. Should I send my "Reapply" patch or will you
take care of it?
Cheers,
Nathan
Hi!
On Fri, 2025-02-14 at 11:14 -0500, Demi Marie Obenour wrote:
> On Fri, Feb 14, 2025 at 09:47:13AM +0100, Thomas Hellström wrote:
> > Hi
> >
> > On Thu, 2025-02-13 at 16:23 -0500, Demi Marie Obenour wrote:
> > > On Wed, Feb 12, 2025 at 06:10:40PM -0800, Matthew Brost wrote:
> > > > Version 5 o
Hi,
On Thu, Feb 13, 2025 at 12:44 PM Anusha Srivatsa wrote:
>
> A lot of mipi API are deprecated and have a _multi() variant
> which is the preferred way forward. This covers TODO in the
> gpu Documentation:[1]
>
> An incomplete effort was made in the previous version
> to address this[2]. It re
If mhi_fw_load_handler() bails out early because the EE is not capable
of loading firmware, we may reference fw_load_type in cleanup which is
uninitialized at this point. The cleanup code checks fw_load_type as a
proxy for knowing if fbc_image was allocated and needs to be freed, but
we can directl
Jerome Brunet wrote:
> The auxiliary device creation of this driver is simple enough to
> use the available auxiliary device creation helper.
>
> Use it and remove some boilerplate code.
>
> Signed-off-by: Jerome Brunet
> ---
> drivers/clk/imx/clk-imx8mp-audiomix.c | 56
> -
On Fri, Feb 14, 2025 at 09:47:13AM +0100, Thomas Hellström wrote:
> Hi
>
> On Thu, 2025-02-13 at 16:23 -0500, Demi Marie Obenour wrote:
> > On Wed, Feb 12, 2025 at 06:10:40PM -0800, Matthew Brost wrote:
> > > Version 5 of GPU SVM. Thanks to everyone (especially Sima, Thomas,
> > > Alistair, Himal)
On Fri, 14 Feb 2025, Egor Vorontsov wrote:
> Using le16 instead of u8[2].
>
> Suggested-by: Jani Nikula
> Signed-off-by: Egor Vorontsov
The vsync and hsync having high bit indicate polarity makes this less
than perfect, but I think it's fine.
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/dr
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