Hi all,
After merging the drm-misc tree, today's linux-next build (htmldocs)
produced this warning:
Documentation/gpu/drm-mm:571:
/home/sfr/next/next/drivers/gpu/drm/scheduler/sched_main.c:1359: ERROR:
Unexpected indentation.
Introduced by commit
baf4afc58314 ("drm/sched: Improve teardown d
AMD AI Engine forms the core of AMD NPU and can be used for accelerating
machine learning applications.
Add the driver to support AI Engine integrated to AMD CPU.
Only very basic functionalities are added.
- module and PCI device initialization
- firmware load
- power up
- low level hardwa
When there is a hardware error, the NPU firmware notifies the host through
a mailbox message. The message includes details of the error, such as the
tile and column indexes where the error occurred.
The driver starts a thread to handle the NPU error message. The thread
stops the clients which are
This patchset introduces a new Linux Kernel Driver, amdxdna for AMD NPUs.
The driver is based on Linux accel subsystem.
NPU (Neural Processing Unit) is an AI inference accelerator integrated
into AMD client CPUs. NPU enables efficient execution of Machine Learning
applications like CNNs, LLMs, etc
There different types of BOs are supported:
- shmem
A user application uses shmem BOs as input/output for its workload running
on NPU.
- device memory heap
The fixed size buffer dedicated to the device.
- device buffer
The buffer object allocated from device memory heap.
- command buffer
The bu
Add interfaces for user application to submit command and wait for its
completion.
Co-developed-by: Min Ma
Signed-off-by: Min Ma
Signed-off-by: Lizhi Hou
---
drivers/accel/amdxdna/aie2_ctx.c | 634 +-
drivers/accel/amdxdna/aie2_message.c | 343 ++
Add GET_INFO ioctl to retrieve hardware information, including
AIE, clock, hardware context etc.
Co-developed-by: Min Ma
Signed-off-by: Min Ma
Reviewed-by: Jeffrey Hugo
Signed-off-by: Lizhi Hou
---
drivers/accel/amdxdna/aie2_message.c| 65 +++
drivers/accel/amdxdna/aie2_pci.c
Implement PCI power management suspend and resume callbacks.
Co-developed-by: Narendra Gutta
Signed-off-by: Narendra Gutta
Co-developed-by: Xiaoming Ren
Signed-off-by: Xiaoming Ren
Co-developed-by: Min Ma
Signed-off-by: Min Ma
Reviewed-by: Jeffrey Hugo
Signed-off-by: Lizhi Hou
---
drivers
AMD NPU (Neural Processing Unit) is a multi-user AI inference accelerator
integrated into AMD client APU. NPU enables efficient execution of Machine
Learning applications like CNN, LLM, etc. NPU is based on AMD XDNA
Architecture. NPU is managed by amdxdna driver.
Co-developed-by: Sonal Santan
Sig
The hardware can be shared among multiple user applications. The
hardware resources are allocated/freed based on the request from
user application via driver IOCTLs.
DRM_IOCTL_AMDXDNA_CREATE_HWCTX
Allocate tile columns and create a hardware context structure to track the
usage and status of the re
The AI Engine consists of 2D array of tiles arranged as columns. Provides
the basic column allocation and release functions for the tile columns.
Co-developed-by: Min Ma
Signed-off-by: Min Ma
Reviewed-by: Jeffrey Hugo
Signed-off-by: Lizhi Hou
---
drivers/accel/amdxdna/Makefile | 1
The hardware mailboxes are used by the driver to submit requests to
firmware and receive the completion notices from hardware.
Initially, a management mailbox channel is up and running. The driver may
request firmware to create/destroy more channels dynamically through
management channel.
Add dri
On Wed, 18 Sept 2024 at 23:48, Christian König
wrote:
>
> Tearing down the scheduler with jobs still on the pending list can
> lead to use after free issues. Add a warning if drivers try to
> destroy a scheduler which still has work pushed to the HW.
>
> When there are still entities with jobs the
From: Jocelyn Falempe
Virtio gpu supports the drm_panic module, which displays a message to
the screen when a kernel panic occurs.
Signed-off-by: Ryosuke Yasuoka
Signed-off-by: Jocelyn Falempe
---
v3:
- As per Jocelyn's comment, add a finite timeout 500usec in
virtio_gpu_panic_put_vbuf() to
On the D1 and T113 the TCON TOP cannot handle setting both DEs to a
single output, even if the outputs are disabled. As a workaround assign
DE1 to TVE0 by default.
A full fix for this would include logic that makes sure both DEs never
share the same output.
Signed-off-by: John Watts
---
drivers
On Tue, Nov 5, 2024 at 1:20 PM Alexei Starovoitov
wrote:
>
> From: Alexei Starovoitov
>
> Move drm_mm.c to lib:
> - The next commit will use drm_mm to manage memory regions
> in bpf arena.
> - Move drm_mm_print to drivers/gpu/drm/drm_print.c, since
> it's not a core functionality of drm_mm an
Hi,
在 2024/11/07 22:41, Chuck Lever 写道:
On Thu, Nov 07, 2024 at 08:57:23AM +0800, Yu Kuai wrote:
Hi,
在 2024/11/06 23:19, Chuck Lever III 写道:
On Nov 6, 2024, at 1:16 AM, Greg KH wrote:
On Thu, Oct 24, 2024 at 09:19:41PM +0800, Yu Kuai wrote:
From: Yu Kuai
Fix patch is patch 27, relied
Quoting Dmitry Baryshkov (2024-10-31 15:54:49)
> On Thu, Oct 31, 2024 at 02:45:29PM -0700, Stephen Boyd wrote:
> > Quoting Dmitry Baryshkov (2024-10-31 11:42:36)
> > > On Tue, Oct 29, 2024 at 01:15:51PM -0700, Stephen Boyd wrote:
> >
> > Or use a displayport property that goes to connector node its
All other submodules pass arguments directly. Drop struct
msm_dp_panel_in that is used to wrap dp_panel's submodule args and pass
all data to msm_dp_panel_get() directly.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_display.c | 9 +
drivers/gpu/drm/msm/dp/dp_panel.c |
It makes it easier to keep all interrupts-related code in dp_ctrl
submodule. Move all functions to dp_ctrl.c.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_aux.c | 9 +--
drivers/gpu/drm/msm/dp/dp_aux.h | 2 +-
drivers/gpu/drm/msm/dp/dp_catalog.c | 95 ---
Move msm_dp_read()/msm_write_foo() functions to the dp_catalog.h,
allowing other modules to access the data directly.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 65
drivers/gpu/drm/msm/dp/dp_catalog.h | 66 ++
Move several misnamed functions accessing AUX bus to dp_aux.c, further
cleaning up dp_catalog submodule.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_aux.c | 88 -
drivers/gpu/drm/msm/dp/dp_aux.h | 7 +++
drivers/gpu/drm/msm/dp/dp_cat
Move audio-related functions to dp_audio.c, following up the cleanup
done by the rest of the submodules. Inline functions with simple
register access patterns.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_audio.c | 72 +
drivers/gpu/drm/msm/dp/dp_catal
Move all register-level functions to dp_aux.c, inlining one line
wrappers during this process.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_aux.c | 98 +++--
drivers/gpu/drm/msm/dp/dp_catalog.c | 96
driver
Drop obsolete functions to access audio packet headers. The dp_audio.c
now writes them using msm_dp_write_link() directly.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_audio.c | 2 -
drivers/gpu/drm/msm/dp/dp_catalog.c | 76 -
drivers/gpu/d
Use msm_dp_utils_pack_sdp_header() and call msm_dp_write_link() directly
to program audio packet data. Use 0 as Packet ID, as it was not
programmed earlier.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_audio.c | 288 +-
1 file changed, 66 inse
Move panel-related functions to dp_panel.c, following up the cleanup
done by the rest of the submodules.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 114
drivers/gpu/drm/msm/dp/dp_catalog.h | 6 --
drivers/gpu/drm/msm/dp/dp_ctr
Move CTRL-related functions to dp_ctrl.c, inlining one line wrappers
during this process. The enable/disable functions have been split to the
enable/disable or enter/exit pairs. The IRQ and HPD related functions
are left in dp_catalog.c, pending later cleanup.
Signed-off-by: Dmitry Baryshkov
---
Drop even more dead code. The msm_dp_panel_tpg_config() has never been
called. Drop it and the implementation inside dp_catalog.c
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 78 -
drivers/gpu/drm/msm/dp/dp_catalog.h | 3 --
drive
Having I/O regions inside a msm_dp_catalog_private() results in extra
layers of one-line wrappers for accessing the data. Move I/O region base
and size to the globally visible struct msm_dp_catalog.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 453 ++-
The msm_dp_panel_dump_regs() and msm_dp_catalog_dump_regs() are not
called anywhere. If there is a necessity to dump registers, the
snapshotting should be used instead. Drop these two functions.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 37
The msm_dp_utils_pack_sdp_header() accepts an unlimited-size u32 pointer
for the header output, while it expects a two-element array. It performs
a sizeof check which is always true on 64-bit platforms (since
sizeof(u32*) is 8) and is always falce on 32-bit platforms. It returns
an error code which
- Fix register programming in the dp_audio module
- Rework most of the register programming functions to be local to the
calling module rather than accessing everything through huge
dp_catalog monster.
Signed-off-by: Dmitry Baryshkov
---
Dmitry Baryshkov (14):
drm/msm/dp: fix msm_dp_uti
On Tue, Nov 05, 2024 at 07:17:53AM -0500, Usyskin, Alexander wrote:
> > -Original Message-
> > From: Vivi, Rodrigo
> > Sent: Monday, November 4, 2024 11:16 PM
> > To: Usyskin, Alexander
> > Cc: Gupta, Anshuman ; Deak, Imre
> > ; Miquel Raynal ;
> > Richard Weinberger ; Vignesh Raghavendra
On Thu, Nov 07, 2024 at 03:13:53PM +0200, Alexander Usyskin wrote:
> Enable access to internal non-volatile memory on
> DGFX devices via a child device.
> The nvm child device is exposed via auxiliary bus.
Reviewed-by: Rodrigo Vivi
>
> CC: Rodrigo Vivi
> CC: Lucas De Marchi
> Co-developed-by:
On Thu, Nov 07, 2024 at 03:13:54PM +0200, Alexander Usyskin wrote:
> Check NVM access mode from GSC FW status registers
> and overwrite access status read from SPI descriptor, if needed.
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Alexander Usyskin
> ---
> drivers/gpu/drm/i915/intel_nvm.c |
On Thu, Nov 07, 2024 at 03:13:56PM +0200, Alexander Usyskin wrote:
> Check NVM access mode from GSC FW status registers
> and overwrite access status read from SPI descriptor, if needed.
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Alexander Usyskin
> ---
> drivers/gpu/drm/xe/regs/xe_gsc_regs
Hi Dave, hi Sima,
please pull the following changes for the next merge window. They were
all in linux-next for at least a week.
Regards,
Lucas
The following changes since commit 9852d85ec9d492ebef56dc5f229416c925758edc:
Linux 6.12-rc1 (2024-09-29 15:06:19 -0700)
are available in the Git repo
Hi Laurent,
Thanks for the feedback.
> -Original Message-
> From: Laurent Pinchart
> Sent: 06 November 2024 19:25
> Subject: Re: [PATCH v3 3/3] drm: adv7511: Drop dsi single lane support
>
> Hi Biju,
>
> Thank you for the patch.
>
> On Wed, Nov 06, 2024 at 06:49:30PM +, Biju Das w
Hi Geert,
Thanks for the feedback.
> -Original Message-
> From: Geert Uytterhoeven
> Sent: 06 November 2024 19:07
> Subject: Re: [PATCH v3 2/3] dt-bindings: display: adi,adv7533: Drop single
> lane support
>
> Hi Biju,
>
> On Wed, Nov 6, 2024 at 7:49 PM Biju Das wrote:
> > As per [1]
Hi Dave, Simona,
Fixes for 6.12.
The following changes since commit 59b723cd2adbac2a34fc8e12c74ae26ae45bf230:
Linux 6.12-rc6 (2024-11-03 14:05:52 -1000)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-6.12-2024-11-07
for you to fe
Hi Laurent,
Thanks for the feedback.
> -Original Message-
> From: Laurent Pinchart
> Sent: 06 November 2024 19:33
> Subject: Re: [PATCH v3 1/3] drm: adv7511: Fix use-after-free in
> adv7533_attach_dsi()
>
> On Wed, Nov 06, 2024 at 08:04:16PM +0100, Geert Uytterhoeven wrote:
> > Hi Biju
On Wed, Nov 06, 2024 at 11:48:27AM +0100, Luca Ceresoli wrote:
> Calling drm_connector_cleanup() should only be done via the free_cb =>
> .destroy path, which cleans up the struct drm_connector only when the
> refcount drops to zero.
>
> A cleanup done with a refcount higher than 0 can result from
On 07/11/2024 14:24, Li, Yunxiang (Teddy) wrote:
[Public]
From: Tvrtko Ursulin
Sent: Thursday, November 7, 2024 5:48
On 31/10/2024 13:48, Li, Yunxiang (Teddy) wrote:
[Public]
From: Christian König
Sent: Thursday, October 31, 2024 8:54 Am 25.10.24 um 19:41 schrieb
Yunxiang Li:
Before, ev
On Sun, Nov 03 2024, Thomas Weißschuh wrote:
> The is_bin_visible() callbacks should not modify the struct
> bin_attribute passed as argument.
> Enforce this by marking the argument as const.
>
> As there are not many callback implementers perform this change
> throughout the tree at once.
>
> Sig
* Yu Kuai [241106 19:57]:
> Hi,
>
> 在 2024/11/06 23:19, Chuck Lever III 写道:
> >
> >
> > > On Nov 6, 2024, at 1:16 AM, Greg KH wrote:
> > >
> > > On Thu, Oct 24, 2024 at 09:19:41PM +0800, Yu Kuai wrote:
> > > > From: Yu Kuai
> > > >
> > > > Fix patch is patch 27, relied patches are from:
> >
Hi Laurent,
Thanks for the feedback.
> -Original Message-
> From: Laurent Pinchart
> Sent: 06 November 2024 19:31
> Subject: Re: [PATCH v3 2/3] dt-bindings: display: adi,adv7533: Drop single
> lane support
>
> Hi Biju,
>
> Thank you for the patch.
>
> On Wed, Nov 06, 2024 at 06:49:29
On 11/7/2024 8:01 PM, neil.armstr...@linaro.org wrote:
> On 07/11/2024 13:46, Akhil P Oommen wrote:
>> On 11/7/2024 2:25 PM, neil.armstr...@linaro.org wrote:
>>> On 06/11/2024 02:44, Akhil P Oommen wrote:
On 11/4/2024 9:14 PM, neil.armstr...@linaro.org wrote:
> On 11/10/2024 22:29, Akhil P
On 28/10/2024 10:34, Christian König wrote:
Am 25.10.24 um 11:05 schrieb Tvrtko Ursulin:
On 25/10/2024 09:59, Tvrtko Ursulin wrote:
On 24/10/2024 13:41, Christian König wrote:
Reports indicates that some userspace applications try to merge more
than
80k of fences into a single dma_fence_a
On 07/11/2024 12:48, Christian König wrote:
Am 07.11.24 um 12:29 schrieb Tvrtko Ursulin:
On 28/10/2024 10:34, Christian König wrote:
Am 25.10.24 um 11:05 schrieb Tvrtko Ursulin:
On 25/10/2024 09:59, Tvrtko Ursulin wrote:
On 24/10/2024 13:41, Christian König wrote:
Reports indicates that
On 04/11/2024 23:17, Jann Horn wrote:
> The current panthor_device_mmap_io() implementation has two issues:
>
> 1. For mapping DRM_PANTHOR_USER_FLUSH_ID_MMIO_OFFSET,
>panthor_device_mmap_io() bails if VM_WRITE is set, but does not clear
>VM_MAYWRITE. That means userspace can use mprotect()
[AMD Official Use Only - AMD Internal Distribution Only]
> From: Tvrtko Ursulin
> Sent: Thursday, November 7, 2024 5:41
> On 25/10/2024 18:41, Yunxiang Li wrote:
> > Add a helper to check if the memory stats is zero, this will be used
> > to check for memory accounting errors.
> >
> > Signed-off-
On 11/7/2024 2:25 PM, neil.armstr...@linaro.org wrote:
> On 06/11/2024 02:44, Akhil P Oommen wrote:
>> On 11/4/2024 9:14 PM, neil.armstr...@linaro.org wrote:
>>> On 11/10/2024 22:29, Akhil P Oommen wrote:
ACD a.k.a Adaptive Clock Distribution is a feature which helps to
reduce
the po
On Sun, Nov 03, 2024 at 05:03:32PM +, Thomas Weißschuh wrote:
> Stop abusing the is_bin_visible() callback to calculate the attribute
> size. Instead use the new, dedicated bin_size() one.
>
> Signed-off-by: Thomas Weißschuh
Acked-by: Bjorn Helgaas
Thanks for doing this!
> ---
> drivers/
ping
Am 29.10.24 um 15:34 schrieb Thomas Zimmermann:
The cirrus driver is only for qemu's emulation of that hardware. The
two patches in this series update cirrus to reflect this.
(The driver is still obsolete. Use something else if possible.)
Thomas Zimmermann (2):
drm/cirrus: Use virtual
On Wed, Nov 06, 2024 at 03:04:29PM +0530, Manikandan Muralidharan wrote:
> Enable the Microchip's DSI controller wrapper driver that uses
> the Synopsys DesignWare MIPI DSI host controller bridge.
... It used on the board ABC DEF.
>
> Signed-off-by: Manikandan Muralidharan
> ---
> arch/arm/con
Am 07.11.24 um 15:43 schrieb Tvrtko Ursulin:
On 07/11/2024 14:17, Li, Yunxiang (Teddy) wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
From: Tvrtko Ursulin
Sent: Thursday, November 7, 2024 5:41
On 25/10/2024 18:41, Yunxiang Li wrote:
Add a helper to check if the memory stats
On 06/11/2024 18:58, Liviu Dudau wrote:
> Similar to cac075706f29 ("drm/panthor: Fix race when converting
> group handle to group object") we need to use the XArray's internal
> locking when retrieving a vm pointer from there.
>
> v2: Removed part of the patch that was trying to protect fetching
>
On 24/10/2024 13:41, Christian König wrote:
The merge function initially handled only individual fences and
arrays which in turn were created by the merge function. This allowed
to create the new array by a simple merge sort based on the fence
context number.
The problem is now that since the
Am 07.11.24 um 12:29 schrieb Tvrtko Ursulin:
On 28/10/2024 10:34, Christian König wrote:
Am 25.10.24 um 11:05 schrieb Tvrtko Ursulin:
On 25/10/2024 09:59, Tvrtko Ursulin wrote:
On 24/10/2024 13:41, Christian König wrote:
Reports indicates that some userspace applications try to merge
more
Hello,
[...]
> > There exist the sysfs_update_groups(), but the BAR resource sysfs objects
> > are currently, at least not yet, added to any attribute group.
>
> then maybe they should be added to one :)
Yeah. There is work in progress that will take care of some of this.
Krzysztof
On 07/11/2024 13:46, Akhil P Oommen wrote:
On 11/7/2024 2:25 PM, neil.armstr...@linaro.org wrote:
On 06/11/2024 02:44, Akhil P Oommen wrote:
On 11/4/2024 9:14 PM, neil.armstr...@linaro.org wrote:
On 11/10/2024 22:29, Akhil P Oommen wrote:
ACD a.k.a Adaptive Clock Distribution is a feature whi
On 07/11/2024 14:17, Li, Yunxiang (Teddy) wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
From: Tvrtko Ursulin
Sent: Thursday, November 7, 2024 5:41
On 25/10/2024 18:41, Yunxiang Li wrote:
Add a helper to check if the memory stats is zero, this will be used
to check for memo
On Thu, Nov 07, 2024 at 08:57:23AM +0800, Yu Kuai wrote:
> Hi,
>
> 在 2024/11/06 23:19, Chuck Lever III 写道:
> >
> >
> > > On Nov 6, 2024, at 1:16 AM, Greg KH wrote:
> > >
> > > On Thu, Oct 24, 2024 at 09:19:41PM +0800, Yu Kuai wrote:
> > > > From: Yu Kuai
> > > >
> > > > Fix patch is patch 27
[Public]
> From: Tvrtko Ursulin
> Sent: Thursday, November 7, 2024 5:48
> On 31/10/2024 13:48, Li, Yunxiang (Teddy) wrote:
> > [Public]
> >
> >> From: Christian König
> >> Sent: Thursday, October 31, 2024 8:54 Am 25.10.24 um 19:41 schrieb
> >> Yunxiang Li:
> >>> Before, every time fdinfo is quer
Currently, virtio uses its own dumb_map_offset implementation,
virtio_gpu_mode_dumb_mmap. It works similarly to generic implementation,
drm_gem_dumb_map_offset, and using the generic implementation is
preferable (and making drivers to do so is a task stated on the DRM
subsystem's TODO list).
Thus,
Add driver for access to Intel discrete graphics card
internal NVM device.
Expose device on auxiliary bus by i915 and Xe drivers and
provide mtd driver to register this device with MTD framework.
This is a rewrite of "drm/i915/spi: spi access for discrete graphics"
and "spi: add driver for Intel d
On Tue, Nov 05, 2024 at 02:05:51PM +, Sandor Yu wrote:
> >
> > On Tue, Oct 29, 2024 at 02:02:14PM +0800, Sandor Yu wrote:
> > > Add Cadence HDP-TX DisplayPort and HDMI PHY driver for i.MX8MQ.
> > >
> > > Cadence HDP-TX PHY could be put in either DP mode or
> > > HDMI mode base on the configura
On 06/11/2024 12:49, Ryosuke Yasuoka wrote:
From: Jocelyn Falempe
Virtio gpu supports the drm_panic module, which displays a message to
the screen when a kernel panic occurs.
Thanks for the changes in v2.
I've one more comment below, otherwise it looks good to me.
Best regards,
--
Jocelyn
Check NVM access mode from GSC FW status registers
and overwrite access status read from SPI descriptor, if needed.
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4
drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +
drivers/gpu/drm/xe/xe_nvm.c | 32 +
Check NVM access mode from GSC FW status registers
and overwrite access status read from SPI descriptor, if needed.
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/intel_nvm.c | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/
Enable access to internal non-volatile memory on DGFX
with GSC/CSC devices via a child device.
The nvm child device is exposed via auxiliary bus.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_device.c |
Enable access to internal non-volatile memory on
DGFX devices via a child device.
The nvm child device is exposed via auxiliary bus.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Co-developed-by: Tomas Winkler
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/Make
Enable runtime PM in mtd driver to notify graphics driver that
whole card should be kept awake while nvm operations are
performed through this driver.
CC: Lucas De Marchi
Signed-off-by: Alexander Usyskin
---
drivers/mtd/devices/mtd-intel-dg.c | 73 +-
1 file changed,
GSC NVM controller HW errors on quad access overlapping 1K border.
Align 64bit read and write to avoid readq/writeq over 1K border.
Signed-off-by: Alexander Usyskin
---
drivers/mtd/devices/mtd-intel-dg.c | 35 ++
1 file changed, 35 insertions(+)
diff --git a/drivers/
Register the on-die nvm device with the mtd subsystem.
Refcount nvm object on _get and _put mtd callbacks.
For erase operation address and size should be 4K aligned.
For write operation address and size has to be 4bytes aligned.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Co-developed-by: Tomas Winkler
Implement read(), erase() and write() functions.
CC: Lucas De Marchi
CC: Rodrigo Vivi
Co-developed-by: Tomas Winkler
Signed-off-by: Tomas Winkler
Co-developed-by: Vitaly Lubart
Signed-off-by: Vitaly Lubart
Signed-off-by: Alexander Usyskin
---
drivers/mtd/devices/mtd-intel-dg.c | 197 ++
In intel-dg, there is no access to the spi controller,
the information is extracted from the descriptor region.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Co-developed-by: Tomas Winkler
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/mtd/devices/mtd-intel-dg.c | 199 +
Add auxiliary driver for intel discrete graphics
non-volatile memory device.
CC: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
Co-developed-by: Tomas Winkler
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
MAINTAINERS| 7 ++
drivers/mtd/devices/Kconfig
https://bugzilla.kernel.org/show_bug.cgi?id=206225
Artem S. Tashkinov (a...@gmx.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
Reso
On 31/10/2024 13:48, Li, Yunxiang (Teddy) wrote:
[Public]
From: Christian König
Sent: Thursday, October 31, 2024 8:54
Am 25.10.24 um 19:41 schrieb Yunxiang Li:
Before, every time fdinfo is queried we try to lock all the BOs in the
VM and calculate memory usage from scratch. This works okay
On 06/11/2024 18:58, Liviu Dudau wrote:
> Similar to cac075706f29 ("drm/panthor: Fix race when converting
> group handle to group object") we need to use the XArray's internal
> locking when retrieving a vm pointer from there.
>
> v2: Removed part of the patch that was trying to protect fetching
>
On 25/10/2024 18:41, Yunxiang Li wrote:
Add a helper to check if the memory stats is zero, this will be used to
check for memory accounting errors.
Signed-off-by: Yunxiang Li
---
drivers/gpu/drm/drm_file.c | 9 +
include/drm/drm_file.h | 1 +
2 files changed, 10 insertions(+)
://anongit.freedesktop.org/drm/drm drm-next
patch link:
https://lore.kernel.org/r/20241106150444.424579-2-Jerry.Zuo%40amd.com
patch subject: [PATCH v3 1/2] drm/display/dsc: Refactor DRM MST DSC
Determination Policy
config: i386-randconfig-141-20241107
(https://download.01.org/0day-ci/archive/20241107
On Wed, Nov 06, 2024 at 06:49:29PM +, Biju Das wrote:
> As per [1], ADV7535/7533 support only 2-, 3-, or 4-lane. Drop
> unsupported 1-lane from bindings.
>
> [1]
> https://www.analog.com/media/en/technical-documentation/data-sheets/ADV7535.pdf
>
> Fixes: 1e4d58cd7f88 ("drm/bridge: adv7533: Cr
Am 06.11.24 um 18:00 schrieb Matthew Brost:
[SNIP]
This is not a generic interface that anyone can freely access. The same
permissions used by ptrace are checked when opening such an interface.
See [1] [2].
[1]https://patchwork.freedesktop.org/patch/617470/?series=136572&rev=2
[2]https://patchwo
On Tue, 2024-11-05 at 15:31 +0100, Philipp Stanner wrote:
> If jobs are still enqueued in struct drm_gpu_scheduler.pending_list
> when drm_sched_fini() gets called, those jobs will be leaked since
> that
> function stops both job-submission and (automatic) job-cleanup. It
> is,
> thus, up to the dr
On 06/11/2024 02:44, Akhil P Oommen wrote:
On 11/4/2024 9:14 PM, neil.armstr...@linaro.org wrote:
On 11/10/2024 22:29, Akhil P Oommen wrote:
ACD a.k.a Adaptive Clock Distribution is a feature which helps to reduce
the power consumption. In some chipsets, it is also a requirement to
support high
Hello Jani,
On Wed, 06 Nov 2024 14:03:08 +0200
Jani Nikula wrote:
> On Wed, 06 Nov 2024, Luca Ceresoli wrote:
> > Add a wrapper to kref_read() just like the ones already in place for
> > kref_get() and kref_put(). This will be used for sanity checks on object
> > lifetime.
> >
> > Signed-off-by
When the new register addresses were introduced for V3D 7.x, we added
new masks for performance counter sources on V3D 7.x. Nevertheless,
we never apply these new masks when setting the sources.
Fix the performance counter source settings on V3D 7.x by introducing
a new macro, `V3D_SET_FIELD_
Hello,
On Mon, 4 Nov 2024 at 23:28, Rodrigo Vivi wrote:
>
> On Mon, Nov 04, 2024 at 02:09:46PM +0200, Giedrius Statkevičius wrote:
> > Hello,
> >
> > Kind ping.
>
> There was a pipe underun in CI... I honestly don't believe this patch is
> causing it, but anyway I decided to trigger a retest ther
On 2024/10/29 16:34, Chen Ridong wrote:
> From: Chen Ridong
>
> The 'vmw_user_object_buffer' function may return NULL with incorrect
> inputs. To avoid possible null pointer dereference, add a check whether
> the 'bo' is NULL in the vmw_framebuffer_surface_create_handle.
>
> Fixes: d6667f0ddf
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