.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Hironori-KIKUCHI/dt-bindings-display-panel-Rename-rg35xx-plus-panel-back-to-WL-355608-A8/20241
On Thu, Oct 24, 2024 at 09:19:41PM +0800, Yu Kuai wrote:
> From: Yu Kuai
>
> Fix patch is patch 27, relied patches are from:
>
> - patches from set [1] to add helpers to maple_tree, the last patch to
> improve fork() performance is not backported;
So things slowed down?
> - patches from set
On Tue Nov 5, 2024 at 2:51 AM PST, Dmitry Baryshkov wrote:
> On Tue, 5 Nov 2024 at 10:15, Christopher Snowhill wrote:
> >
> > On Mon Nov 4, 2024 at 12:52 PM PST, André Almeida wrote:
> > > Hi Christopher,
> > >
> > > Em 03/11/2024 03:36, Christopher Snowhill escreveu:
> > > > On Fri Nov 1, 2024 at
Ok, Thank you guys.
Could you help me how to name the new panel YLM-LBV0345001H-V2 for the
recent RG35XX Plus please?
- Use `anbernic,rg35xx-plus-panel-v2`
- Use `anbernic,rg35xx-plus-panel-new`
- Use `anbernic,ylm-lbv0345001h-v2`
- Share `anbernic,rg35xx-plus-panel`
For the last option, I need t
The patch below does not apply to the v4.19-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to .
Thanks,
Sasha
-- original commit in Linus's tree --
>From
The patch below does not apply to the v5.4-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to .
Thanks,
Sasha
-- original commit in Linus's tree --
>From
The patch below does not apply to the v5.10-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to .
Thanks,
Sasha
-- original commit in Linus's tree --
>From
The patch below does not apply to the v5.15-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to .
Thanks,
Sasha
-- original commit in Linus's tree --
>From
The patch below does not apply to the v6.1-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to .
Thanks,
Sasha
-- original commit in Linus's tree --
>From
The patch below does not apply to the v6.6-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to .
Thanks,
Sasha
-- original commit in Linus's tree --
>From
The patch below does not apply to the v6.6-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to .
Thanks,
Sasha
-- original commit in Linus's tree --
>From
Video Format Data Blocks (VFDBs) contain the necessary information that
needs to be fed to the Optimized Video Timings (OVT) Algorithm.
Also, we require OVT support to cover modes that aren't supported by
earlier standards (e.g. CVT). So, parse all of the relevant VFDB data
and feed it to the OVT A
On 11/4/2024 9:14 PM, neil.armstr...@linaro.org wrote:
> On 11/10/2024 22:29, Akhil P Oommen wrote:
>> ACD a.k.a Adaptive Clock Distribution is a feature which helps to reduce
>> the power consumption. In some chipsets, it is also a requirement to
>> support higher GPU frequencies. This patch adds
reg_val[6] = pll->out_sel | ((pll->kint << 4) & 0xf);
> + reg_val[6] = pll->out_sel | ((pll->kint >> 4) & 0xf);
> reg_val[7] = 1 << 4;
> reg_val[8] = pll->det_delay;
>
>
> ---
> base-commit: 81983758430957d9a5cbfe324fd70cf63e7e
> change-id: 20241105-coverity1511468wrongoperator-20130bcd4240
>
> Best regards,
> --
> Karan Sanghavi
>
In kfd_procfs_show(), the sdma_activity_work_handler is a local variable
and the sdma_activity_work_handler.sdma_activity_work should initialize
with INIT_WORK_ONSTACK() instead of INIT_WORK().
Fixes: 32cb59f31362 ("drm/amdkfd: Track SDMA utilization per process")
Signed-off-by: Yuan Can
---
dri
On Sun, Oct 20, 2024 at 3:49 PM Dmitry Osipenko
wrote:
>
> From: Pierre-Eric Pelloux-Prayer
>
> Xorg context creation fails for native contexts that use
> VIRTGPU_CONTEXT_INIT because context is already initialized implicitly
> when dumb buffer is created. Fix it by not creating default vrend con
Hi Jocelyn,
kernel test robot noticed the following build errors:
[auto build test ERROR on d78f0ee0406803cda8801fd5201746ccf89e5e4a]
url:
https://github.com/intel-lab-lkp/linux/commits/Jocelyn-Falempe/drm-panic-Move-drawing-functions-to-drm_draw/20241105-205432
base
On Sun, Oct 20, 2024 at 4:08 PM Dmitry Osipenko
wrote:
>
> From: Dongwon Kim
>
> Use drm_gem_plane_helper_prepare_fb() helper for explicit framebuffer
> synchronization. We need to wait for explicit fences in a case of
> Venus and native contexts when guest user space uses explicit fencing.
>
> S
Hi Dave and Daniel,
Just add a dt-binding patch for supporting Exynos7870 SoC Decon device.
In the previous pull request, I included patches to support the decon device
for the Exynos7870 SoC but did not include corresponding binding patch,
which resulted in warnings on the linux-next
Hi Jocelyn,
kernel test robot noticed the following build errors:
[auto build test ERROR on d78f0ee0406803cda8801fd5201746ccf89e5e4a]
url:
https://github.com/intel-lab-lkp/linux/commits/Jocelyn-Falempe/drm-panic-Move-drawing-functions-to-drm_draw/20241105-205432
base
to next-20241105]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits
Hi Rob Herring,
> -Original Message-
> From: Rob Herring
> Sent: Wednesday, November 6, 2024 5:11 AM
> To: 대인기/Tizen Platform Lab(SR)/삼성전자
> Cc: Kaustabh Chakraborty ; Seung-Woo Kim
> ; Kyungmin Park ; David
> Airlie ; Simona Vetter ; Krzysztof
> Kozlowski ; Alim Akhtar ;
> Maarten Lankh
Hi DRM Maintainers
> From DT point of view, in general, drivers should be asking for a
> specific port number because their function is fixed in the binding.
>
> of_graph_get_next_endpoint() doesn't match to this concept.
>
> Simply replace
>
> - of_graph_get_next_endpoint(xxx, NULL);
>
to next-20241105]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits
On 9/10/24 08:05, Jani Nikula wrote:
On Mon, 09 Sep 2024, Hamza Mahfooz wrote:
Video Format Data Blocks (VFDBs) contain the necessary information that
needs to be fed to the Optimized Video Timings (OVT) Algorithm.
Also, we require OVT support to cover modes that aren't supported by
earlier sta
On 11/1/24 10:13, Ian Forbes wrote:
We'd like to use the OVT modes for vmwgfx. Can you export the main OVT
function so it matches the CVT one? Something like this:
struct drm_display_mode *drm_ovt_mode(struct drm_device *dev, int rid,
int vrefresh);
Sure.
On Mon, Sep 9, 2024 at 12:17 PM Ham
From: Alexei Starovoitov
bpf arena is moving towards non-sleepable allocations in tracing
context while maple_tree does kmalloc/kfree deep inside. Hence switch
bpf arena to drm_mm algorithm that works with externally provided
drm_mm_node-s. This patch kmalloc/kfree-s drm_mm_node-s, but the next
p
From: Alexei Starovoitov
Hi DRM folks,
we'd like to start using drm_mm in bpf arena.
The drm_mm logic fits particularly well to bpf use case.
See individual patches.
objdump -h lib/drm_mm.o
.text 12c7
So no vmlinux size concerns.
v1->v2:
- Fix build issues and add Acks.
Alexei Sta
From: Alexei Starovoitov
Move drm_mm.c to lib:
- The next commit will use drm_mm to manage memory regions
in bpf arena.
- Move drm_mm_print to drivers/gpu/drm/drm_print.c, since
it's not a core functionality of drm_mm and it depeneds
on drm_printer while drm_mm is generic and usuable as-is
Rearrange lookup of recommended OPP for the Mali GPU device and its refcnt
decremental to make sure no OPP object leaks happen in the error path.
Signed-off-by: Adrián Larumbe
Fixes: fac9b22df4b1 ("drm/panthor: Add the devfreq logical block")
Reviewed-by: Steven Price
Reviewed-by: Liviu Dudau
-
Commit f11b0417eec2 ("drm/panfrost: Add fdinfo support GPU load metrics")
retrieves the OPP for the maximum device clock frequency, but forgets to
keep the reference count balanced by putting the returned OPP object. This
eventually leads to an OPP core warning when removing the device.
Fix it by
On Fri, Nov 1, 2024 at 12:08 AM 대인기/Tizen Platform Lab(SR)/삼성전자
wrote:
>
> Hi Kaustabh Chakraborty,
>
> Sorry for late.
>
> > -Original Message-
> > From: Kaustabh Chakraborty
> > Sent: Friday, September 20, 2024 12:11 AM
> > To: Inki Dae ; Seung-Woo Kim
> > ; Kyungmin Park ; David
> > Ai
For some reason, threaded IRQs do not play nice with the RISC-V firmware
processor in BXS on our test platform (TI AM68).
Until we can resolve this issue, revert to a more traditional workqueue-
based IRQ implementation so the platform is at least functional.
Signed-off-by: Matt Coster
---
driv
Hi Louis,
On 05/11/24 10:59, Louis Chauvet wrote:
On 29/07/23 - 19:49, Maíra Canal wrote:
After we flush the workqueue at the commit tale, we need to make sure
that no work is queued until we destroy the state. Currently, new work
can be queued in the workqueue, even after the commit tale, as t
On 11/5/24 7:02 AM, Zicheng Qu wrote:
Hi all,
I am submitting two patches to correct power gating configurations in
the AMD display driver.
1. Patch 1/2 (Fixes: 46825fcfbe16): Corrects DOMAIN10_PG_CONFIG to use
DOMAIN10_POWER_FORCEON.
2. Patch 2/2 (Fixes: 46825fcfbe16): Corrects DOMAIN11_PG_
On Tue, Nov 05, 2024 at 08:41:07AM +0100, Christian König wrote:
> Am 04.11.24 um 22:49 schrieb Matthew Brost:
> > On Mon, Nov 04, 2024 at 08:28:34PM +0100, Christian König wrote:
> > > Am 04.11.24 um 18:34 schrieb Rodrigo Vivi:
> > > > On Thu, Oct 31, 2024 at 04:43:19PM -0700, Matthew Brost wrote:
On Tue, Nov 05, 2024 at 08:19:00AM -0600, Rob Herring wrote:
> On Tue, Nov 05, 2024 at 02:52:29PM +0900, Hironori KIKUCHI wrote:
> > A panel assembly is changed in the recent revision of Anbernic RG35XX
> > Plus, so the `anbernic,rg35xx-plus-panel` identifier is neither suitable
> > nor unique for
On Tue, Nov 05, 2024 at 03:58:08PM +, Matt Coster wrote:
> All Imagination GPUs use three clocks: core, mem and sys. All reasonably
> modern Imagination GPUs also support a single-clock mode where the SoC
> only hooks up core and the other two are derived internally. On GPUs which
> support thi
A minority of page table implementations (arm_lpae, armv7) are unique in
how they handle partial unmap of large IOPTEs.
Other implementations will unmap the large IOPTE and return it's
length. For example if a 2M IOPTE is present and the first 4K is requested
to be unmapped then unmap will remove
This is the result of the discussion on removing split. We agreed that
split is not required, and no application should ask for anything that
would not unmap a full large IOPTE.
Instead of split the two ARM drivers will now WARN_ON and return 0. This
is in contrast to what several other drivers do
A minority of page table implementations (arm_lpae, armv7) are unique in
how they handle partial unmap of large IOPTEs.
Other implementations will unmap the large IOPTE and return it's
length. For example if a 2M IOPTE is present and the first 4K is requested
to be unmapped then unmap will remove
Describe the most conservative version of the driver implementations.
All drivers should support this.
Many drivers support extending the range if a large page is hit, but
let's not make that officially approved API. The main point is to
document explicitly that split is not supported.
Reviewed-b
On Tue, Nov 05, 2024 at 06:05:54PM +, Conor Dooley wrote:
> On Tue, Nov 05, 2024 at 03:58:09PM +, Matt Coster wrote:
> > The single existing GPU (AXE-1-16M) only requires a single power domain.
> > Subsequent patches will add support for BXS-4-64 MC1, which has two power
> > domains. Add in
On Tue, Nov 05, 2024 at 03:58:09PM +, Matt Coster wrote:
> The single existing GPU (AXE-1-16M) only requires a single power domain.
> Subsequent patches will add support for BXS-4-64 MC1, which has two power
> domains. Add infrastructure now to allow for this.
>
> Signed-off-by: Matt Coster
>
On Tue, Nov 05, 2024 at 03:58:07PM +, Matt Coster wrote:
> The current compatible strings are not specific enough to constrain the
> hardware in devicetree. For example, the current "img,img-axe" string
> refers to the entire family of Series AXE GPUs. The more specific
> "img,img-axe-1-16m" st
On Tue, Nov 05, 2024 at 03:58:10PM +, Matt Coster wrote:
> This attribute will be required for the BXS-4-64 MC1 and will be enabled in
> the DTS for the TI k3-j721s2 in a subsequent patch; add it now so
> dtbs_check doesn't complain later.
Sounds like the property should be made required for t
On Tue, Nov 05, 2024 at 03:58:14PM +, Matt Coster wrote:
> +/ {
> +#address-cells = <2>;
> +#size-cells = <2>;
> +interrupt-controller;
> +#interrupt-cells = <3>;
> +
> +gpu@4e2000 {
> +compatible = "ti,j721s2-gpu", "img,img-bxs-4-64",
On Mon, Nov 4, 2024 at 11:32 PM Christian König
wrote:
>
> Am 04.11.24 um 22:32 schrieb Chia-I Wu:
>
> On Tue, Oct 22, 2024 at 10:24 AM Chia-I Wu wrote:
>
> On Tue, Oct 22, 2024 at 9:53 AM Christian König
> wrote:
>
> Am 22.10.24 um 18:18 schrieb Chia-I Wu:
>
> Userspace might poll a syncobj wit
On 5 November 2024 16:13:26 GMT, Maxime Ripard wrote:
>On Tue, Nov 05, 2024 at 01:28:48PM +0200, Dmitry Baryshkov wrote:
>> On Mon, 04 Nov 2024 11:27:53 +0800, Liu Ying wrote:
>> > This patch series aims to add ITE IT6263 LVDS to HDMI converter on
>> > i.MX8MP EVK. Combined with LVDS receiver and
On Tue, Nov 05, 2024 at 05:33:21PM +, Dmitry Baryshkov wrote:
> On 5 November 2024 16:13:26 GMT, Maxime Ripard wrote:
> >On Tue, Nov 05, 2024 at 01:28:48PM +0200, Dmitry Baryshkov wrote:
> >> On Mon, 04 Nov 2024 11:27:53 +0800, Liu Ying wrote:
> >> > This patch series aims to add ITE IT6263 LV
On Tue, Nov 05, 2024 at 05:33:21PM +, Dmitry Baryshkov wrote:
> On 5 November 2024 16:13:26 GMT, Maxime Ripard wrote:
> > On Tue, Nov 05, 2024 at 01:28:48PM +0200, Dmitry Baryshkov wrote:
> >> On Mon, 04 Nov 2024 11:27:53 +0800, Liu Ying wrote:
> >> > This patch series aims to add ITE IT6263 L
On Tue, Nov 05, 2024 at 04:59:43PM +, Will Deacon wrote:
> > /* Full unmap */
> > iova = 0;
> > for_each_set_bit(i, &cfg.pgsize_bitmap, BITS_PER_LONG) {
>
> Yup, and you can do the same for the other selftest in io-pgtable-arm.c
Ugh, yes, I ran it and thought the log it printed wa
On Mon, Nov 04, 2024 at 04:09:51PM -0400, Jason Gunthorpe wrote:
> Runs OK now:
>
> arm-v7s io-pgtable: self test ok
> arm-lpae io-pgtable: selftest: pgsize_bitmap 0x40201000, IAS 32
>
> Jason
>
> --- a/drivers/iommu/io-pgtable-arm-v7s.c
> +++ b/drivers/iommu/io-pgtable-arm-v7s.c
> @@ -819,7 +81
Hi Laurent,
Thanks for the feedback.
> -Original Message-
> From: Laurent Pinchart
> Sent: 05 November 2024 16:02
> Subject: Re: [PATCH v2 1/2] drm: adv7511: Fix use-after-free in
> adv7533_attach_dsi()
>
> Hi Biju,
>
> Thank you for the patch.
>
> On Tue, Nov 05, 2024 at 11:12:18AM
Add definitions for a register required for a subsequent patch adding
support for RISC-V firmware. ROGUE_CR_FWCORE_DMI_DMCONTROL is used to
control the debug module in the firmware processor.
Signed-off-by: Matt Coster
---
drivers/gpu/drm/imagination/pvr_rogue_cr_defs.h | 17 -
1
On Tue, Nov 05, 2024 at 03:48:24PM +0100, Thomas Hellström wrote:
> On Tue, 2024-10-15 at 20:24 -0700, Matthew Brost wrote:
>
>
> Continued review:
>
> > +/**
> > + * drm_gpusvm_migrate_unmap_pages() - Unmap pages previously mapped
> > for GPU SVM migration
> > + * @dev: The device for which the
On Tue, 2024-11-05 at 08:12 -0800, Matthew Brost wrote:
> On Tue, Nov 05, 2024 at 11:22:12AM +0100, Thomas Hellström wrote:
> > On Mon, 2024-11-04 at 15:07 -0800, Matthew Brost wrote:
> > > > We
> > > > have
> > > > https://elixir.bootlin.com/linux/v6.12-rc6/source/include/linux/int
> > > > erval_t
/linux/kernel/git/bpf/bpf-next.git master
patch link:
https://lore.kernel.org/r/20241101235453.63380-3-alexei.starovoitov%40gmail.com
patch subject: [PATCH bpf-next 2/2] bpf: Switch bpf arena to use drm_mm instead
of maple_tree
config: sparc-randconfig-r061-20241105
(https://download.01.org/0day-ci
Like the existing AXE-1-16M integration, BXS-4-64 uses the single clock
integration in the TI k3-j721s2.
Signed-off-by: Matt Coster
---
.../devicetree/bindings/gpu/img,powervr-rogue.yaml | 45 ++
1 file changed, 45 insertions(+)
diff --git a/Documentation/devicetree/bindings
Now that enable_reg isn't used, rename the previously shared event_mask to
status_mask since it's only used with status_reg.
Signed-off-by: Matt Coster
---
drivers/gpu/drm/imagination/pvr_fw.h | 6 +++---
drivers/gpu/drm/imagination/pvr_fw_meta.c | 2 +-
drivers/gpu/drm/imagination/pvr_fw_m
The current compatible strings are not specific enough to constrain the
hardware in devicetree. For example, the current "img,img-axe" string
refers to the entire family of Series AXE GPUs. The more specific
"img,img-axe-1-16m" string refers to the AXE-1-16M GPU which, unlike the
rest of its family
On Sun, Nov 03, 2024 at 05:03:29PM +, Thomas Weißschuh wrote:
> struct bin_attribute contains a bunch of pointer members, which when
> overwritten by accident or malice can lead to system instability and
> security problems.
> Moving the definitions of struct bin_attribute to read-only memory
>
On Tue, Nov 05, 2024 at 01:28:48PM +0200, Dmitry Baryshkov wrote:
> On Mon, 04 Nov 2024 11:27:53 +0800, Liu Ying wrote:
> > This patch series aims to add ITE IT6263 LVDS to HDMI converter on
> > i.MX8MP EVK. Combined with LVDS receiver and HDMI 1.4a transmitter,
> > the IT6263 supports LVDS input
On Sun, Nov 03, 2024 at 05:03:31PM +, Thomas Weißschuh wrote:
> Several drivers need to dynamically calculate the size of an binary
> attribute. Currently this is done by assigning attr->size from the
> is_bin_visible() callback.
s/an binary/a binary/
> This has drawbacks:
> * It is not docum
On Tue, Nov 05, 2024 at 11:22:12AM +0100, Thomas Hellström wrote:
> On Mon, 2024-11-04 at 15:07 -0800, Matthew Brost wrote:
> > > We
> > > have
> > > https://elixir.bootlin.com/linux/v6.12-rc6/source/include/linux/int
> > > erval_tree_generic.h#L24
> > >
> > > to relate to. Now GPUVM can't use the
Currently only MIPS firmware processors use ELF-formatted firmware. When
adding support for RISC-V firmware processors, it will be useful to have
ELF handling functions ready to go.
Signed-off-by: Matt Coster
---
drivers/gpu/drm/imagination/Makefile | 1 +
drivers/gpu/drm/imagination/pvr_f
Hi Biju,
Thank you for the patch.
On Tue, Nov 05, 2024 at 11:12:19AM +, Biju Das wrote:
> Fix out-of-bounds array in adv7511_dsi_config_timing_gen(),
> when dsi lanes = 1.
Does the hardware support using the internal timing generator with a
single lane ? If so adv7511_dsi_config_timing_gen()
From: Sarah Walker
Newer PowerVR GPUs (such as the BXS-4-64 MC1) use a RISC-V firmware
processor instead of the previous MIPS or META.
Signed-off-by: Sarah Walker
Signed-off-by: Matt Coster
---
drivers/gpu/drm/imagination/Makefile | 1 +
drivers/gpu/drm/imagination/pvr_fw.c
This is currently a callback function which takes no parameters; there's
no reason for this so let's make it a straightforward value in pvr_fw_defs.
Signed-off-by: Matt Coster
---
drivers/gpu/drm/imagination/pvr_fw.c | 2 +-
drivers/gpu/drm/imagination/pvr_fw.h | 23 --
Hi Biju,
Thank you for the patch.
On Tue, Nov 05, 2024 at 11:12:18AM +, Biju Das wrote:
> The host_node pointer assigned and freed in adv7533_parse_dt()
> and later adv7533_attach_dsi() uses the same. Fix this issue
> by freeing the host_node in adv7533_attach_dsi() instead of
> adv7533_parse
This GPU is found in the TI AM68 family of SoCs, with initial support
added to the k3-j721s2 devicetree and tested on a TI SK-AM68 board.
A suitable firmware binary can currently be found in the IMG
linux-firmware repository[1] as powervr/rogue_36.53.104.796_v1.fw. A
merge request will be sent out
Use the new compatible string introduced earlier (in "dt-bindings: gpu:
img: More explicit compatible strings") and add a name to the single power
domain for this GPU (introduced in "dt-bindings: gpu: img: Power domain
details").
Signed-off-by: Matt Coster
---
arch/arm64/boot/dts/ti/k3-am62-main
The single existing GPU (AXE-1-16M) only requires a single power domain.
Subsequent patches will add support for BXS-4-64 MC1, which has two power
domains. Add infrastructure now to allow for this.
Signed-off-by: Matt Coster
---
.../devicetree/bindings/gpu/img,powervr-rogue.yaml | 29 +++
The first supported GPU only used a single power domain so this was
automatically handled by the device runtime.
In order to support multiple power domains, they must be enumerated from
devicetree and linked to both the GPU device and each other to ensure
correct power sequencing at start time.
F
All Imagination GPUs use three clocks: core, mem and sys. All reasonably
modern Imagination GPUs also support a single-clock mode where the SoC
only hooks up core and the other two are derived internally. On GPUs which
support this mode, it is the default and most commonly used integration.
Codify
This allows for more versatility in checking and clearing firmware
registers used for interrupt handling.
Signed-off-by: Matt Coster
---
drivers/gpu/drm/imagination/pvr_device.h | 18 +
drivers/gpu/drm/imagination/pvr_fw.h | 45 +--
drivers/gpu/drm/i
This attribute will be required for the BXS-4-64 MC1 and will be enabled in
the DTS for the TI k3-j721s2 in a subsequent patch; add it now so
dtbs_check doesn't complain later.
Signed-off-by: Matt Coster
---
Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml | 2 ++
1 file changed, 2 i
With more than two firmware processor types, the if/else chain in
pvr_fw_init() gets a bit ridiculous. Use a static array indexed on
pvr_fw_processor_type (which is now a proper enum instead of #defines)
instead.
Signed-off-by: Matt Coster
---
drivers/gpu/drm/imagination/pvr_device.h | 4
This infrastructure will be used in cases where a specific GPU integration
or implementation requires some special handling in the driver. The first
use case is the device cached memory override added in the next patch.
The infrastructure is built out in this separate commit to make it
clear which
Add the new compatible string recently introduced in the dt bindings
("img,img-bxs-4-64") to the dt_match table and link the appropriate
firmware.
Signed-off-by: Matt Coster
---
drivers/gpu/drm/imagination/pvr_drv.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/imag
The J721S2 binding is based on the TI downstream binding in 54b0f2a00d92
("arm64: dts: ti: k3-j721s2-main: add gpu node") from [1] but with updated
compatible strings.
The clock[2] and power[3] indices were verified from docs, but the
source of the interrupt index remains elusive.
References for
The TI k3-j721s2 platform has a bug relating to cache snooping on the AXI
ACE-Lite interface. Disabling cache snooping altogether would also resolve
the issue, but is considered more of a performance hit.
Given the platform is dma-coherent, forcing all device-accessible memory
allocations through
Follow-on from the companion dt-bindings change ("dt-bindings: gpu: img:
More explicit compatible strings"), deprecating "img,img-axe" in favour of
the more specific "img,img-axe-1-16m".
Keep the previous compatible string around for backwards compatibility.
Signed-off-by: Matt Coster
---
drive
After the previous commit ("drm/imagination: Revert to non-threaded IRQs"),
this register is now only used to enable firmware interrupts at
start-of-day. This is, however, unnecessary since they are enabled by
default.
In addition, the soon-to-be-added RISC-V firmware processors do not have
an equ
On 2024-11-04 6:20 p.m., Daniele Ceraolo Spurio wrote:
On 10/30/2024 3:38 PM, Zhanjun Dong wrote:
GuC to host communication is interrupt driven, the handling has 3
parts: interrupt context, tasklet and request queue worker.
During GuC reset prepare, interrupt is disabled before destroy
con
On Sun, Nov 03, 2024 at 05:03:34PM +, Thomas Weißschuh wrote:
> The is_bin_visible() callbacks should not modify the struct
> bin_attribute passed as argument.
> Enforce this by marking the argument as const.
>
> As there are not many callback implementers perform this change
> throughout the
On Tue 2024-11-05 13:42:25, Jocelyn Falempe wrote:
> Normally the console is already suspended when the graphic driver
> suspend callback is called, but if the parameter no_console_suspend
> is set, it might still be active.
> So call console_stop()/console_start() in the suspend/resume
> callbacks
On Tue, 2024-10-15 at 20:24 -0700, Matthew Brost wrote:
Continued review:
> +/**
> + * drm_gpusvm_migrate_unmap_pages() - Unmap pages previously mapped
> for GPU SVM migration
> + * @dev: The device for which the pages were mapped
> + * @dma_addr: Array of DMA addresses corresponding to mapped p
On Tue, Nov 5, 2024 at 10:56 AM Liviu Dudau wrote:
> On Tue, Nov 05, 2024 at 12:17:13AM +0100, Jann Horn wrote:
> > The current panthor_device_mmap_io() implementation has two issues:
> >
> > 1. For mapping DRM_PANTHOR_USER_FLUSH_ID_MMIO_OFFSET,
> >panthor_device_mmap_io() bails if VM_WRITE is
If jobs are still enqueued in struct drm_gpu_scheduler.pending_list
when drm_sched_fini() gets called, those jobs will be leaked since that
function stops both job-submission and (automatic) job-cleanup. It is,
thus, up to the driver to take care of preventing leaks.
The related function drm_sched
On Tue, 05 Nov 2024 17:00:28 +0800, Fei Shao wrote:
> The MediaTek DP hardware supports audio and exposes a DAI, so the
> '#sound-dai-cells' property is needed for describing the DAI links.
>
> Reference the dai-common.yaml schema to allow '#sound-dai-cells' to be
> used, and filter out non-DP c
On 2024-11-05, Petr Mladek wrote:
> Observation:
>
> + CON_ENABLED is not needed for the original purpose. Only enabled
> consoles are added into @console_list.
>
> + CON_ENABLED is still used to explicitely block the console driver
> during suspend by console_stop()/console_start() in
https://bugzilla.kernel.org/show_bug.cgi?id=219468
Artem S. Tashkinov (a...@gmx.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
Reso
On Tue, Nov 05, 2024 at 02:52:29PM +0900, Hironori KIKUCHI wrote:
> A panel assembly is changed in the recent revision of Anbernic RG35XX
> Plus, so the `anbernic,rg35xx-plus-panel` identifier is neither suitable
> nor unique for the panel anymore.
>
> Fortunately, the panel can be distinguished b
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