On Tue, Nov 05, 2024 at 03:58:14PM +0000, Matt Coster wrote:
> + / {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <3>;
> +
> + gpu@4e20000000 {
> + compatible = "ti,j721s2-gpu", "img,img-bxs-4-64",
> "img,img-rogue";
> + reg = /bits/ 64 <0x4e20000000 0x80000>;Can you format this normally please? Drop the #address/size-cells down to 1 if you're against having 0x0s. Otherwise, Reviewed-by: Conor Dooley <conor.doo...@microchip.com> > + clocks = <&k3_clks 130 1>; > + clock-names = "core"; > + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; > + power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>, > + <&k3_pds 373 TI_SCI_PD_EXCLUSIVE>; > + power-domain-names = "a", "b"; > + dma-coherent; > + }; > + }; > > -- > 2.47.0 >
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