When using type-c to type-c to connect to the monitor,
the sound plays normally. If you unplug the type-c and
connect the type-c to hdmi dongle to the monitor, there will be noise.
By capturing the audio data, it is found that
the data position is messy, and there is no error in the data.
Through
The parameter dev_priv is actually not used in macro PORT_ALPM_CTL
and PORT_ALPM_LFPS_CTL,so remove it to simplify the code.
Reviewed-by: Jani Nikula
Signed-off-by: He Lugang
---
drivers/gpu/drm/i915/display/intel_alpm.c | 4 ++--
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
driver
Use devm_add_action_or_reset() to release resources in case of failure,
because the cleanup function will be automatically called.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: He Lugang
---
drivers/gpu/drm/i2c/tda9950.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --
On 9/25/24 00:02, Conor Dooley wrote:
On Tue, Sep 24, 2024 at 06:31:52PM +0800, Macpaul Lin wrote:
The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due
to an excessively long 'interrupts' property. The error message was:
infra-iommu@10315000: interrupts: [[0, 795, 4, 0
> -Original Message-
> From: Intel-gfx On Behalf Of
> Kandpal, Suraj
> Sent: Wednesday, September 25, 2024 11:02 AM
> To: Murthy, Arun R ; intel-
> x...@lists.freedesktop.org; intel-...@lists.freedesktop.org; dri-
> de...@lists.freedesktop.org
> Cc: Murthy, Arun R
> Subject: RE: [PATCHv
> > +struct intel_histogram {
> > + struct intel_crtc *crtc;
> > + struct delayed_work histogram_int_work;
>
> I think I mentioned this in my previous comment but naming this just work
> should be fine since I don’t see any other work for histogram So itll be
> called as
> histogram->work whi
> -Original Message-
> From: Intel-gfx On Behalf Of Arun
> R Murthy
> Sent: Thursday, September 19, 2024 7:02 PM
> To: intel...@lists.freedesktop.org; intel-...@lists.freedesktop.org; dri-
> de...@lists.freedesktop.org
> Cc: Murthy, Arun R
> Subject: [PATCHv3 5/6] drm/i915/histogram: h
> -Original Message-
> From: Intel-gfx On Behalf Of Arun
> R Murthy
> Sent: Thursday, September 19, 2024 7:02 PM
> To: intel...@lists.freedesktop.org; intel-...@lists.freedesktop.org; dri-
> de...@lists.freedesktop.org
> Cc: Murthy, Arun R
> Subject: [PATCHv3 2/6] drm/xe: Add histogram
> -Original Message-
> From: Intel-gfx On Behalf Of Arun
> R Murthy
> Sent: Thursday, September 19, 2024 7:02 PM
> To: intel...@lists.freedesktop.org; intel-...@lists.freedesktop.org; dri-
> de...@lists.freedesktop.org
> Cc: Murthy, Arun R
> Subject: [PATCHv3 1/6] drm/i915/histogram: Ad
syzbot has found a NULL pointer dereference bug in fbcon.
Here is the simplified C reproducer:
struct param {
uint8_t type;
struct tiocl_selection ts;
};
int main()
{
struct fb_con2fbmap con2fb;
struct param param;
int fd = open("/dev/fb1", 0, 0);
On 9/25/24 1:25 AM, Doug Anderson wrote:
> Hi,
>
> On Mon, Sep 23, 2024 at 5:33 AM Tejas Vipin wrote:
>>
>> -static int kd35t133_init_sequence(struct kd35t133 *ctx)
>> +static void kd35t133_init_sequence(struct mipi_dsi_multi_context *dsi_ctx)
>> {
>> - struct mipi_dsi_device *dsi = to_
Hi,
On Wed, Sep 25, 2024 at 1:48 AM Doug Anderson wrote:
>
> Hi,
>
> On Mon, Sep 23, 2024 at 8:53 PM Pin-yen Lin wrote:
> >
> > The bridge might miss the display change events when it's powered off.
> > This happens when a user changes the external monitor when the system
> > is suspended and th
On 9/24/24 19:48, AngeloGioacchino Del Regno wrote:
Il 24/09/24 12:31, Macpaul Lin ha scritto:
Add power domain binding to the mediatek DPI controller for MT8185.
The dpi node in mt8195.dtsi was triggering a dtbs_check error:
dp-intf@1c113000: power-domains: False schema does not allow [
Hi,
On Wed, Sep 25, 2024 at 12:43 AM Doug Anderson wrote:
>
> Hi,
>
> On Mon, Sep 23, 2024 at 8:53 PM Pin-yen Lin wrote:
> >
> > The bridge might miss the display change events when it's powered off.
> > This happens when a user changes the external monitor when the system
> > is suspended and t
On Tue, Sep 24, 2024 at 01:23:13PM +0200, Simona Vetter wrote:
> On Mon, Sep 23, 2024 at 09:28:23AM +0530, Raag Jadav wrote:
> > Introduce device wedged event, which will notify userspace of wedged
> > (hanged/unusable) state of the DRM device through a uevent. This is
> > useful especially in case
On Tue, 24 Sep 2024 15:36:45 +0800, Sandor Yu wrote:
> The patch set initial support Cadence MHDP8501(HDMI/DP) DRM bridge
> driver and Cadence HDP-TX PHY(HDMI/DP) driver for Freescale i.MX8MQ.
>
> The patch set compose of DRM bridge drivers and PHY driver.
>
> Both of them need by patch #1 and
On Wed, Sep 25, 2024 at 12:11 AM Jessica Zhang
wrote:
>
>
>
> On 9/23/2024 7:13 PM, zhaoxiong lv wrote:
> > On Tue, Sep 24, 2024 at 5:14 AM Jessica Zhang
> > wrote:
> >>
> >>
> >>
> >> On 9/23/2024 6:42 AM, Zhaoxiong Lv wrote:
> >>> In MTK chips, if the system starts suspending before the DRM ru
On 9/24/2024 4:16 PM, Dmitry Baryshkov wrote:
On Tue, Sep 24, 2024 at 03:59:22PM GMT, Jessica Zhang wrote:
From: Dmitry Baryshkov
Stop poking into CRTC state from dpu_encoder.c, fill CRTC HW resources
from dpu_crtc_assign_resources().
Signed-off-by: Dmitry Baryshkov
[quic_abhin...@quicinc
After rebuilding current Linus git head with:
dma-mapping: report unlimited DMA addressing in IOMMU DMA path
b348b6d17fd1d5d89b86db602f02bea54a754bd8
applied, the radeon module load gets further before hitting another
NULL pointer dereference:
[ 17.777472] [drm] radeon kernel modesetting enabl
On 9/24/2024 4:41 PM, Dmitry Baryshkov wrote:
On Tue, Sep 24, 2024 at 03:59:32PM GMT, Jessica Zhang wrote:
Cache the CWB block mask in the DPU virtual encoder and configure CWB
according to the CWB block mask within the writeback phys encoder
Signed-off-by: Jessica Zhang
---
drivers/gpu/d
On 9/24/2024 4:25 PM, Dmitry Baryshkov wrote:
On Tue, Sep 24, 2024 at 03:59:30PM GMT, Jessica Zhang wrote:
If the clone mode enabled status is changing, a modeset needs to happen
so that the resources can be reassigned
Sima's comment regarding crtc_state->mode_changed seems to be ignored...
Hi Louis,
On 9/6/24 13:15, Louis Chauvet wrote:
CRTC initialization call drm_mode_crtc_set_gamma_size without the proper
checks, introduce this check to avoid issues.
Signed-off-by: Louis Chauvet
Applied to misc/kernel.git (drm-misc-next).
Best Regards,
- Maíra
---
drivers/gpu/drm/vkms/
Hi Louis,
On 9/12/24 12:25, Louis Chauvet wrote:
The functions `vkms_crtc_atomic_begin` and `vkms_crtc_atomic_flush` are
responsible for locking and unlocking a mutex, respectively. Add the
`__acquires` and `__releases` annotations to these functions to prevent
the associated sparse warning abou
Hi Siqueira,
On 9/11/24 10:50, Rodrigo Siqueira wrote:
I haven't been able to follow or review the work on the driver for a
long time and I don't see the situation improving anytime soon. Hence,
this commit removes me from the maintainers list.
Signed-off-by: Rodrigo Siqueira
Applied to misc
Hi Louis,
On 9/10/24 12:10, Louis Chauvet wrote:
I've been actively working on VKMS to provide new features and
participated in reviews and testing. To help Maìra with her work, add
myself as co-maintainer of VKMS.
Signed-off-by: Louis Chauvet
I see that you're now a developer in the drm/mis
If the video card driver could not find the connector assigned to the
current video controller, or if the hardware status has changed so that
a pre-existing connector is no longer active, none of the state
connectors will meet the assignment criteria for the current crtc video
controller.
In the d
Hi Louis,
On 9/5/24 10:27, Louis Chauvet wrote:
Add documentation around vkms_output and its initialization.
Add some documentation on pixel conversion functions.
Update of outdated comments for pixel_write functions.
Reviewed-by: José Expósito
Signed-off-by: Louis Chauvet
Applied to misc/ker
On Tue, Sep 24, 2024 at 03:59:38PM GMT, Jessica Zhang wrote:
> Set writeback encoders as possible clones for non-writeback encoders and
> vice versa.
>
> Signed-off-by: Jessica Zhang
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 32
> +
> drivers/gpu/drm/msm/
On 9/25/24 12:57 AM, Rob Herring wrote:
On Mon, Sep 23, 2024 at 07:53:57PM +0200, Marek Vasut wrote:
On 9/23/24 3:57 PM, Lukasz Majewski wrote:
Up till now the fsl,lcdif.yaml was requiring the "port" property as a
must have to specify the display interface on iMX devices.
However, it shall als
On Tue, Sep 24, 2024 at 03:59:36PM GMT, Jessica Zhang wrote:
> For concurrent writeback, the real time encoder is responsible for
> trigger flush and trigger start. Return early for trigger start and
> trigger flush for the concurrent writeback encoders.
>
> Signed-off-by: Jessica Zhang
> ---
>
On Tue, Sep 24, 2024 at 03:59:32PM GMT, Jessica Zhang wrote:
> Cache the CWB block mask in the DPU virtual encoder and configure CWB
> according to the CWB block mask within the writeback phys encoder
>
> Signed-off-by: Jessica Zhang
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 8
On Tue, Sep 24, 2024 at 03:59:31PM GMT, Jessica Zhang wrote:
> Add support for RM to reserve dedicated CWB pingpongs and CWB muxes
>
> For concurrent writeback, even-indexed CWB muxes must be assigned to
> even-indexed LMs and odd-indexed CWB muxes for odd-indexed LMs. The same
> even/odd rule app
On 9/23/24 21:18, Dmitry Osipenko wrote:
> On 9/23/24 21:09, Dmitry Osipenko wrote:
>>> Sure, I can do that if others prefer this way too.
>> Note that in the other email I suggested to use strndup_user(), that
>> will remove the name-length limitation, but then the name var will
>> remain to be a
Hi Christian,
On 9/23/24 12:19, Christian Gmeiner wrote:
From: Christian Gmeiner
Replace the open coded v3d_perfmon_find(..) with the real
thing.
Signed-off-by: Christian Gmeiner
Thanks for your patch!
Reviewed-by: Maíra Canal
Applied to misc/kernel.git (drm-misc-next).
Best Regards,
-
On Tue, Sep 24, 2024 at 03:59:30PM GMT, Jessica Zhang wrote:
> If the clone mode enabled status is changing, a modeset needs to happen
> so that the resources can be reassigned
Sima's comment regarding crtc_state->mode_changed seems to be ignored...
>
> Signed-off-by: Jessica Zhang
> ---
> dri
On Tue, Sep 24, 2024 at 03:59:29PM GMT, Jessica Zhang wrote:
> Add the cwb_enabled flag to msm_display topology and adjust the toplogy
> to account for concurrent writeback
>
> Signed-off-by: Jessica Zhang
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 6 --
> drivers/gpu/drm/msm/disp/d
On Tue, Sep 24, 2024 at 03:59:28PM GMT, Jessica Zhang wrote:
> Add support for allocating the concurrent writeback mux as part of the
> WB allocation
>
> Signed-off-by: Jessica Zhang
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 17 +++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h |
On Tue, Sep 24, 2024 at 03:59:27PM GMT, Jessica Zhang wrote:
> From: Esha Bharadwaj
>
> Adjust the WB_MUX configuration to account for using dedicated CWB
> pingpong blocks.
>
> Signed-off-by: Esha Bharadwaj
> Signed-off-by: Jessica Zhang
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 4
On Tue, Sep 24, 2024 at 03:59:26PM GMT, Jessica Zhang wrote:
> The CWB mux has its own registers and set of operations. Add dpu_hw_cwb
> abstraction to allow driver to configure the CWB mux.
>
> Signed-off-by: Jessica Zhang
> ---
> drivers/gpu/drm/msm/Makefile| 1 +
> drivers/gp
On Tue, Sep 24, 2024 at 03:59:24PM GMT, Jessica Zhang wrote:
> Change pingpong index and names to distinguish between general use
> pingpong blocks and pingpong blocks dedicated for concurrent writeback
>
> Signed-off-by: Jessica Zhang
> ---
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm865
On Tue, Sep 24, 2024 at 03:59:23PM GMT, Jessica Zhang wrote:
> From: Esha Bharadwaj
>
> Add a new block for concurrent writeback mux to the SM8650 HW catalog
>
> Signed-off-by: Esha Bharadwaj
> Signed-off-by: Jessica Zhang
> ---
> .../gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h | 21
> ++
On Tue, Sep 24, 2024 at 03:59:22PM GMT, Jessica Zhang wrote:
> From: Dmitry Baryshkov
>
> Stop poking into CRTC state from dpu_encoder.c, fill CRTC HW resources
> from dpu_crtc_assign_resources().
>
> Signed-off-by: Dmitry Baryshkov
> [quic_abhin...@quicinc.com: cleaned up formatting]
> Signed-
On Tue, Sep 24, 2024 at 03:59:21PM GMT, Jessica Zhang wrote:
> From: Dmitry Baryshkov
>
> All resource allocation is centered around the LMs. Then other blocks
> (except DSCs) are allocated basing on the LMs that was selected, and LM
> powers up the CRTC rather than the encoder.
>
> Moreover if
On Tue, Sep 24, 2024 at 03:59:17PM GMT, Jessica Zhang wrote:
> Add helper to check if the given CRTC state is in clone mode
>
> Signed-off-by: Jessica Zhang
> ---
> include/drm/drm_crtc.h | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_cr
On Tue, Sep 24, 2024 at 01:13:18PM GMT, Andrew Davis wrote:
> On 9/23/24 1:33 AM, Dmitry Baryshkov wrote:
> > Hi,
> >
> > On Fri, Aug 30, 2024 at 09:03:47AM GMT, Jens Wiklander wrote:
> > > Hi,
> > >
> > > This patch set is based on top of Yong Wu's restricted heap patch set [1].
> > > It's also
On Mon, Sep 23, 2024 at 03:57:44PM +0200, Lukasz Majewski wrote:
> Up till now the fsl,lcdif.yaml was requiring the "port" property as a
> must have to specify the display interface on iMX devices.
>
> However, it shall also be possible to specify the display only with
> passing its timing paramet
Add the cwb_enabled flag to msm_display topology and adjust the toplogy
to account for concurrent writeback
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 6 --
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 10 --
drivers/gpu/drm/msm/msm_drv.h|
From: Dmitry Baryshkov
All resource allocation is centered around the LMs. Then other blocks
(except DSCs) are allocated basing on the LMs that was selected, and LM
powers up the CRTC rather than the encoder.
Moreover if at some point the driver supports encoder cloning,
allocating resources fro
The CWB mux has a pending flush bit and *_active register.
Add support for configuring them within the dpu_hw_ctl layer.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 13 ++
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys
Add a helper that will handle the correct order of the encoder kickoffs
for concurrent writeback.
For concurrent writeback, the realtime encoder must always kickoff last
as it will call the trigger flush and start.
This avoids the following scenario where the writeback encoder
increments the pend
Add support for RM to reserve dedicated CWB pingpongs and CWB muxes
For concurrent writeback, even-indexed CWB muxes must be assigned to
even-indexed LMs and odd-indexed CWB muxes for odd-indexed LMs. The same
even/odd rule applies for dedicated CWB pingpongs.
Track the CWB muxes in the global st
Change pingpong index and names to distinguish between general use
pingpong blocks and pingpong blocks dedicated for concurrent writeback
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h | 8
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
For concurrent writeback, the real time encoder is responsible for
trigger flush and trigger start. Return early for trigger start and
trigger flush for the concurrent writeback encoders.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 18 ++
1 file
From: Dmitry Baryshkov
Up to now the driver has been using encoder to allocate hardware
resources. Switch it to use CRTC id in preparation for the next step.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 18 +--
drivers/gpu/drm
DPU supports a single writeback session running concurrently with primary
display when the CWB mux is configured properly. This series enables
clone mode for DPU driver and adds support for programming the CWB mux
in cases where the hardware has dedicated CWB pingpong blocks. Currently,
the CWB har
Set writeback encoders as possible clones for non-writeback encoders and
vice versa.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 32 +
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c |
Cache the CWB block mask in the DPU virtual encoder and configure CWB
according to the CWB block mask within the writeback phys encoder
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 83 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.
From: Esha Bharadwaj
Adjust the WB_MUX configuration to account for using dedicated CWB
pingpong blocks.
Signed-off-by: Esha Bharadwaj
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/
From: Dmitry Baryshkov
Stop poking into CRTC state from dpu_encoder.c, fill CRTC HW resources
from dpu_crtc_assign_resources().
Signed-off-by: Dmitry Baryshkov
[quic_abhin...@quicinc.com: cleaned up formatting]
Signed-off-by: Abhinav Kumar
[quic_jessz...@quicinc.com: dropped clearing num_mixer
Add support for allocating the concurrent writeback mux as part of the
WB allocation
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 17 +++--
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 ++
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/dri
The CWB mux has its own registers and set of operations. Add dpu_hw_cwb
abstraction to allow driver to configure the CWB mux.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/Makefile| 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cwb.c | 73 +
drive
Adjust QoS remapper, OT limit, and CDP parameters to account for
concurrent writeback
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/dr
From: Esha Bharadwaj
Implement instance of snapshot function to dump new registers used
for cwb
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Esha Bharadwaj
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/driver
If the clone mode enabled status is changing, a modeset needs to happen
so that the resources can be reassigned
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/driver
From: Dmitry Baryshkov
The struct dpu_rm_requirements was used to wrap display topology and
hw resources, which meant INTF indices. As of commit ef58e0ad3436
("drm/msm/dpu: get INTF blocks directly rather than through RM") the hw
resources struct was removed, leaving struct dpu_rm_requirements
co
Starting the frame done timer before the encoder is finished kicking off
can lead to unnecessary frame done timeouts when the device is
experiencing heavy load (ex. when debug logs are enabled).
Thus, create a separate API for starting the encoder frame done timer and
call it after the encoder kic
From: Esha Bharadwaj
Add a new block for concurrent writeback mux to the SM8650 HW catalog
Signed-off-by: Esha Bharadwaj
Signed-off-by: Jessica Zhang
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h | 21 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 13 ++
Check that all encoders attached to a given CRTC are valid
possible_clones of each other.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic_helper.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_a
Add helper to check if the given CRTC state is in clone mode
Signed-off-by: Jessica Zhang
---
include/drm/drm_crtc.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 8b48a1974da3..ecb93e2c4afc 100644
--- a/include/drm/drm_crtc.h
+++
On Mon, Sep 23, 2024 at 07:53:57PM +0200, Marek Vasut wrote:
> On 9/23/24 3:57 PM, Lukasz Majewski wrote:
> > Up till now the fsl,lcdif.yaml was requiring the "port" property as a
> > must have to specify the display interface on iMX devices.
> >
> > However, it shall also be possible to specify t
Hi Jens,
On Fri, 30 Aug 2024 at 08:04, Jens Wiklander wrote:
> This patch set is based on top of Yong Wu's restricted heap patch set [1].
> It's also a continuation on Olivier's Add dma-buf secure-heap patch set [2].
>
> The Linaro restricted heap uses genalloc in the kernel to manage the heap
>
https://bugzilla.kernel.org/show_bug.cgi?id=204241
Artem S. Tashkinov (a...@gmx.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
Reso
On 9/23/24 1:33 AM, Dmitry Baryshkov wrote:
Hi,
On Fri, Aug 30, 2024 at 09:03:47AM GMT, Jens Wiklander wrote:
Hi,
This patch set is based on top of Yong Wu's restricted heap patch set [1].
It's also a continuation on Olivier's Add dma-buf secure-heap patch set [2].
The Linaro restricted heap
Hi,
On Mon, Sep 23, 2024 at 5:33 AM Tejas Vipin wrote:
>
> -static int kd35t133_init_sequence(struct kd35t133 *ctx)
> +static void kd35t133_init_sequence(struct mipi_dsi_multi_context *dsi_ctx)
> {
> - struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
> - struct device *dev
On Tue, Sep 24, 2024 at 11:16:01AM +0200, Simona Vetter wrote:
> On Tue, Aug 27, 2024 at 07:48:33PM -0700, Matthew Brost wrote:
> > Continuation of SVM work by Oak Zeng [1][2] based on community feedback.
> > Introduces GPU SVM layer and new Xe uAPI. Supports GPU page faults for
> > system allocati
I think we are seeing a similar problem w/qla2xxx panicing at boot:
commit 1868f9d0260e9afaf7c6436d14923ae12eaea465 (HEAD -> master,
origin/master, origin/HEAD)
Merge: 056f8c437dc3 96319dacaf15
Author: Linus Torvalds
Date: Fri Sep 20 19:34:00 2024 -0700
Merge tag 'for-linux-6.12-ofs1' of
g
On 2024-09-24 12:42, Matthew Brost wrote:
> On Tue, Sep 24, 2024 at 01:48:29PM +0200, Simona Vetter wrote:
>> On Fri, Sep 20, 2024 at 09:59:51PM +, Matthew Brost wrote:
>>> On Fri, Sep 20, 2024 at 05:50:10PM -0400, Felix Kuehling wrote:
On 2024-09-20 17:23, Matthew Brost wrote:
Hi Steffen,
Thank you for the patch.
On Mon, Sep 23, 2024 at 09:48:03AM +0200, li...@steffen.cc wrote:
> From: Steffen Dirkwinkel
>
> With hpd going through the bridge as of commit eb2d64bfcc17
> ("drm: xlnx: zynqmp_dpsub: Report HPD through the bridge")
> we don't get hotplug events in userspa
On 24/09/2024 19:33, Jon Hunter wrote:
On 06/09/2024 09:38, Jon Hunter wrote:
Hi Mikko,
On 31/05/2024 08:07, Mikko Perttunen wrote:
From: Mikko Perttunen
Syncpoint IRQs are currently requested in a code path that runs
during resume. Due to this, we get multiple overlapping registered
inte
On 06/09/2024 09:38, Jon Hunter wrote:
Hi Mikko,
On 31/05/2024 08:07, Mikko Perttunen wrote:
From: Mikko Perttunen
Syncpoint IRQs are currently requested in a code path that runs
during resume. Due to this, we get multiple overlapping registered
interrupt handlers as host1x is suspended and
* Alex Deucher (alexdeuc...@gmail.com) wrote:
> On Sun, Sep 22, 2024 at 9:43 PM wrote:
> >
> > From: "Dr. David Alan Gilbert"
> >
> > Hi,
> > This is a bunch of deadcode removal in amdgpu;
> > some of the functions are ones which were previously
> > used but haven't been for a while, others are
On Tue, 24 Sep 2024 15:36:48 +0800, Sandor Yu wrote:
> Add bindings for Cadence MHDP8501 DisplayPort/HDMI bridge.
>
> Signed-off-by: Sandor Yu
> Reviewed-by: Krzysztof Kozlowski
> ---
> v16->v17:
> - Add lane-mapping property
>
> v9->v16:
> *No change
>
> .../display/bridge/cdns,mhdp8501.ya
Hi,
On Mon, Sep 23, 2024 at 8:53 PM Pin-yen Lin wrote:
>
> The bridge might miss the display change events when it's powered off.
> This happens when a user changes the external monitor when the system
> is suspended and the embedded controller doesn't not wake AP up.
>
> It's also observed that
On 9/24/24 5:22 PM, Akhil P Oommen wrote:
On Tue, Sep 24, 2024 at 07:47:12AM -0700, Rob Clark wrote:
On Tue, Sep 24, 2024 at 4:54 AM Antonino Maniscalco
wrote:
On 9/20/24 7:09 PM, Akhil P Oommen wrote:
On Wed, Sep 18, 2024 at 09:46:33AM +0200, Neil Armstrong wrote:
Hi,
On 17/09/2024 13:14,
On 9/24/24 4:47 PM, Rob Clark wrote:
On Tue, Sep 24, 2024 at 4:54 AM Antonino Maniscalco
wrote:
On 9/20/24 7:09 PM, Akhil P Oommen wrote:
On Wed, Sep 18, 2024 at 09:46:33AM +0200, Neil Armstrong wrote:
Hi,
On 17/09/2024 13:14, Antonino Maniscalco wrote:
This series implements preemption fo
On 9/24/24 09:57, Maxime Ripard wrote:
On Tue, Sep 24, 2024 at 06:56:26PM GMT, Jani Nikula wrote:
On Tue, 24 Sep 2024, Guenter Roeck wrote:
On Tue, Sep 24, 2024 at 12:06:28PM GMT, Simona Vetter wrote:
Yeah I think long-term we might want a kunit framework so that we can
catch dmesg warnings w
On Sun, Sep 22, 2024 at 9:43 PM wrote:
>
> From: "Dr. David Alan Gilbert"
>
> Hi,
> This is a bunch of deadcode removal in amdgpu;
> some of the functions are ones which were previously
> used but haven't been for a while, others are functions
> that were added a few years ago and haven't ever
Applied the series. Thanks!
Alex
On Sun, Sep 22, 2024 at 9:43 PM wrote:
>
> From: "Dr. David Alan Gilbert"
>
> amdgpu_i2c_add and amdgpu_i2c_init were added in 2015's commit
> d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)")
> but never used.
>
> Remove them.
>
> Signed-off-by: Dr. David Alan
Hi Qianqiang,
On 9/24/24 18:13, Qianqiang Liu wrote:
syzbot has found a NULL pointer dereference bug in fbcon.
This issue is caused by ops->putcs being a NULL pointer.
We need to ensure it is initialized properly.
Reported-by: syzbot+3d613ae53c0315026...@syzkaller.appspotmail.com
Closes: https
On Tue, Sep 24, 2024 at 06:56:26PM GMT, Jani Nikula wrote:
> On Tue, 24 Sep 2024, Guenter Roeck wrote:
> On Tue, Sep 24, 2024 at 12:06:28PM GMT, Simona Vetter wrote:
> > Yeah I think long-term we might want a kunit framework so that we can
> > catch dmesg warnings we expect and test f
On 9/6/24 11:01 AM, Philipp Zabel wrote:
Hi,
diff --git a/drivers/staging/media/imx/imx-media-dev.c
b/drivers/staging/media/imx/imx-media-dev.c
index be54dca11465d..a841fdb4c2394 100644
--- a/drivers/staging/media/imx/imx-media-dev.c
+++ b/drivers/staging/media/imx/imx-media-dev.c
@@ -57,7 +57
On 7/30/24 6:05 PM, Nicolas Dufresne wrote:
Hi,
sorry for the abysmal delay.
Le mercredi 24 juillet 2024 à 02:19 +0200, Marek Vasut a écrit :
Introduce dedicated memory-to-memory IPUv3 VDI deinterlacer driver.
Currently the IPUv3 can operate VDI in DIRECT mode, from sensor to
memory. This onl
On Tue, Sep 24, 2024 at 01:48:29PM +0200, Simona Vetter wrote:
> On Fri, Sep 20, 2024 at 09:59:51PM +, Matthew Brost wrote:
> > On Fri, Sep 20, 2024 at 05:50:10PM -0400, Felix Kuehling wrote:
> > >
> > > On 2024-09-20 17:23, Matthew Brost wrote:
> > > > On Fri, Sep 20, 2024 at 04:26:50PM -0400
Hi,
On Mon, Sep 23, 2024 at 8:53 PM Pin-yen Lin wrote:
>
> The bridge might miss the display change events when it's powered off.
> This happens when a user changes the external monitor when the system
> is suspended and the embedded controller doesn't not wake AP up.
>
> It's also observed that
On 9/24/24 08:56, Jani Nikula wrote:
On Tue, 24 Sep 2024, Guenter Roeck wrote:
On Tue, Sep 24, 2024 at 12:06:28PM GMT, Simona Vetter wrote:
Yeah I think long-term we might want a kunit framework so that we can
catch dmesg warnings we expect and test for those, without those warnings
actually g
On Tue, Sep 24, 2024 at 12:42:56PM +0200, Thomas Hellström wrote:
> Hi, Matt,
>
> Some random review comments on this patch I came across while looking
> at multi-device.
>
> Thanks,
> Thomas
>
>
> On Tue, 2024-08-27 at 19:48 -0700, Matthew Brost wrote:
> > This patch introduces support for GPU
nit, lowercase "a6xx" in subject prefix
(no need to resend just for this, I can fix it up when applying
patches if needed.. but if you do resend pls fix that)
BR
-R
On Tue, Sep 24, 2024 at 4:30 AM Antonino Maniscalco
wrote:
>
> Initialize with 4 rings to enable preemption.
>
> For now only on A
Applied. Thanks!
On Sat, Sep 21, 2024 at 3:48 AM Vitaliy Shevtsov wrote:
>
> Fix several copypaste mistakes in *_disable_link_output() functions where
> an improper function pointer is checked before dereference.
>
> Found by Linux Verification Center (linuxtesting.org) with Svace.
>
> Signed-of
syzbot has found a NULL pointer dereference bug in fbcon.
This issue is caused by ops->putcs being a NULL pointer.
We need to ensure it is initialized properly.
Reported-by: syzbot+3d613ae53c0315026...@syzkaller.appspotmail.com
Closes: https://syzkaller.appspot.com/bug?extid=3d613ae53c031502687a
On 9/23/2024 7:13 PM, zhaoxiong lv wrote:
On Tue, Sep 24, 2024 at 5:14 AM Jessica Zhang wrote:
On 9/23/2024 6:42 AM, Zhaoxiong Lv wrote:
In MTK chips, if the system starts suspending before the DRM runtime
resume has not completed, there is a possibility of a black screen
after waking th
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