On 2024/9/17 21:21, Alex Deucher wrote:
On Mon, Aug 12, 2024 at 2:10 AM Lu Yao wrote:
Add support for the drm_panic module, which displays a pretty user
friendly message on the screen when a Linux kernel panic occurs.
Signed-off-by: Lu Yao
Patch looks good to me. Any chance you want to co
Hi Krzysztof,
On 17/09/24 4:07 pm, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> On 17/09/2024 11:53, Manikandan Muralidharan wrote:
>> Add Microchip AC69T88A 5" LVDS interface (800x480) TFT LCD panel
>> compatible s
On 17/09/24 6:08 pm, Conor Dooley wrote:
> On Tue, Sep 17, 2024 at 03:16:53AM +,manikanda...@microchip.com wrote:
>> Hi Conor,
>>
>> On 14/08/24 7:29 pm, Conor Dooley wrote:
>>> On Wed, Aug 14, 2024 at 04:22:53PM +0530, Manikandan Muralidharan wrote:
Add the 'sam9x75-mipi-dsi' compatible
When invoke memfd_pin_folios, we need offer an array to save each folio
which we pinned.
The current way is dynamic alloc an array(use kvmalloc), get folios,
save into udmabuf and then free.
Depend on the size, kvmalloc can do something different:
Below PAGE_SIZE, slab allocator will be used, wh
This patchset attempts to fix some errors in udmabuf and remove the
upin_list structure, also try clean up code.
By this patchset, udmabuf remove page struct relay, only use
pfn and folios.
Some of this fix just gather the patches which I upload before.
Any patch has passed the udmabuf self-test
After udmabuf is allocated, its resources need to be initialized,
including various array structures. The current array structure has
already been greatly expanded.
Also, before udmabuf needs to be kfree, the occupied resources need to
be released.
This part is repetitive and maybe overlooked.
T
Currently, udmabuf handles folio by create an unpin list to record
each folio obtained from the list and unpinning them when released. To
maintain this, many struct have been established.
However, maintain this requires a significant amount of memory and
iter the list is a substantial overhead, wh
This patch aim to simplify the memfd folio pin during the udmabuf
create. No functional changes.
This patch create a udmabuf_pin_folios function, in this, do the memfd
pin folio and then record each pinned folio, offset.
This patch simplify the pinned folio record, iter by each pinned folio,
and
Currently vmap_udmabuf set page's array by each folio.
But, ubuf->folios is only contain's the folio's head page.
That mean we repeatedly mapped the folio head page to the vmalloc area.
Due to udmabuf can use hugetlb, if HVO enabled, tail page may not exist,
so, we can't use page array to map, in
The current udmabuf mmap only fills the physical memory to the
corresponding virtual address when the user actually accesses the
virtual address.
However, the current udmabuf has already obtained and pinned the folio
upon completion of the creation.This means that the physical memory has
already b
When PAGE_SIZE 4096, MAX_PAGE_ORDER 10, 64bit machine,
page_alloc only support 4MB.
If above this, trigger this warn and return NULL.
udmabuf can change size limit, if change it to 3072(3GB), and then alloc
3GB udmabuf, will fail create.
[ 4080.876581] [ cut here ]
[ 4080.
./drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c:282:2-3: Unneeded semicolon
This patch removes an unneeded semicolon after a switch statement in the
pll_get_post_div function. Adding a semicolon after a switch statement is
unnecessary and can lead to confusion in the code structure.
Reported-by: Aba
On Tue, Sep 17, 2024 at 4:37 PM Konrad Dybcio wrote:
>
> On 17.09.2024 5:30 PM, Rob Clark wrote:
> > On Tue, Sep 17, 2024 at 6:47 AM Konrad Dybcio
> > wrote:
> >>
> >> On 13.09.2024 9:51 PM, Rob Clark wrote:
> >>> From: Rob Clark
> >>>
> >>> The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle
On 17.09.2024 5:30 PM, Rob Clark wrote:
> On Tue, Sep 17, 2024 at 6:47 AM Konrad Dybcio wrote:
>>
>> On 13.09.2024 9:51 PM, Rob Clark wrote:
>>> From: Rob Clark
>>>
>>> The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle, but on some
>>> devices (x1-85, possibly others), it seems to pass that b
On 9/11/24 11:04, Jocelyn Falempe wrote:
...
>>> --- a/drivers/gpu/drm/virtio/virtgpu_gem.c
>>> +++ b/drivers/gpu/drm/virtio/virtgpu_gem.c
>>> @@ -75,7 +75,6 @@ int virtio_gpu_mode_dumb_create(struct drm_file
>>> *file_priv,
>>> args->size = pitch * args->height;
>>> args->size = ALIGN(
This patch addresses warnings produced by the checkpatch script
related to unnecessary casts that could potentially hide bugs.
The specific warnings are as follows:
- Warning at drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c:16
- Warning at drivers/gpu/drm/amd/display/dc/dml2/dml21/dml2
On Sun, Sep 15, 2024 at 5:28 PM Sitsofe Wheeler wrote:
>
> Hello,
>
> (Apologies if I have CC'd the wrong people/places - I just went by
> what get_maintainer.pl -f drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> said)
>
> I recently upgraded from Ubuntu 20.04 (5.15.0-119.129~20.04.1-generic
> kernel) t
m/msm/adreno/a6xx_gpu.c | 8 ++-
> drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 33 ++
> drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 ++
> 7 files changed, 148 insertions(+), 1 deletion(-)
> ---
> base-commit: 15302579373ed2c8ada629e9e7bcf9569393a48d
> change-id: 20240917-a663-gpu-support-b1475c828606
>
> Best regards,
> --
> Akhil P Oommen
>
--
With best wishes
Dmitry
On Wed, Sep 18, 2024 at 02:08:41AM GMT, Akhil P Oommen wrote:
> From: Puranam V G Tejaswi
>
> Add support for Adreno 663 found on sa8775p based platforms.
>
> Signed-off-by: Puranam V G Tejaswi
> Signed-off-by: Akhil P Oommen
> ---
> drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 19
On Wed, Sep 18, 2024 at 02:08:43AM GMT, Akhil P Oommen wrote:
> From: Puranam V G Tejaswi
>
> Add gpu and gmu nodes for sa8775p based platforms.
Which platforms? The commit adds nodes to the SoC and the single RIDE
platform.
>
> Signed-off-by: Puranam V G Tejaswi
> Signed-off-by: Akhil P Oomm
From: Puranam V G Tejaswi
Add gpu and gmu nodes for sa8775p based platforms.
Signed-off-by: Puranam V G Tejaswi
Signed-off-by: Akhil P Oommen
---
arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 8
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 75 ++
2 files chang
From: Puranam V G Tejaswi
Document Adreno 663 GMU in the dt-binding specification.
Signed-off-by: Puranam V G Tejaswi
Signed-off-by: Akhil P Oommen
---
Documentation/devicetree/bindings/display/msm/gmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/
From: Puranam V G Tejaswi
Add support for Adreno 663 found on sa8775p based platforms.
Signed-off-by: Puranam V G Tejaswi
Signed-off-by: Akhil P Oommen
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 19 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++-
drivers/gpu/d
/drm/msm/adreno/a6xx_hfi.c | 33 ++
drivers/gpu/drm/msm/adreno/adreno_gpu.h| 5 ++
7 files changed, 148 insertions(+), 1 deletion(-)
---
base-commit: 15302579373ed2c8ada629e9e7bcf9569393a48d
change-id: 20240917-a663-gpu-support-b1475c828606
Best regards,
--
Akh
+ Harry
On Mon, Sep 16, 2024 at 8:58 AM Tobias Jakobi
wrote:
>
> On 9/16/24 06:15, Stephen Rothwell wrote:
>
> > Hi all,
> >
> > Today's linux-next merge of the drm tree got a conflict in:
> >
> >drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
> >
> > between commit:
> >
> >e835d5
Quoting Vamsi Krishna Brahmajosyula (2024-09-17 09:44:49-03:00)
>In DP alt mode, when pin assignment is D, only one PHY lane is owned
>by the display. intel_cx0pll_enable currently performs a power state
>ready on both the lanes in all cases.
>
>Address the todo to perfom power state ready on owned
This reverts commit 2735d5e4060960c7bd06698b0a1990c7d42c762e.
This test hits a WARN_ON_ONCE(), because fb.format isn't set.
Fixes: 2735d5e40609 ("drm/tests: Add test for drm_framebuffer_init()")
Cc: Carlos Eduardo Gallo Filho
Cc: Maxime Ripard
Cc: Maarten Lankhorst
Cc: Thomas Zimmermann
Cc: J
This reverts commit d2194256049910d286cd6c308c2689df521d8842.
Intel CI consistently hits a WARN in drm_framebuffer_free() with this
test, because the fb->filp_head list is uninitialized.
Link: https://lore.kernel.org/r/87plp7ex27@intel.com
Fixes: d21942560499 ("drm/tests: Add test for drm_fra
The tests consistently trigger WARNs in drm_framebuffer code. I'm not
sure what the point is with type of belts and suspenders tests. The
warnings *are* the way to flag erroneous API usage.
Warnings in turn trigger failures in CI. Filtering the warnings are
error prone, and, crucially, would also
From: Markus Elfring
Date: Tue, 17 Sep 2024 19:06:23 +0200
Add a jump target so that a bit of exception handling can be better reused
at the end of this function implementation.
Signed-off-by: Markus Elfring
---
drivers/gpu/drm/mediatek/mtk_gem.c | 10 ++
1 file changed, 6 insertions(+
From: Markus Elfring
Date: Tue, 17 Sep 2024 18:50:37 +0200
A sg_free_table(sgt) call was immediately used after a null pointer check
for the data structure member “kvaddr” in this function implementation.
Thus use such a function call only once instead directly before the check.
This issue was t
From: Markus Elfring
Date: Tue, 17 Sep 2024 19:16:45 +0200
A few update suggestions were taken into account
from static source code analysis.
Markus Elfring (2):
Avoid duplicate sg_free_table(sgt) call
Use common error handling code
drivers/gpu/drm/mediatek/mtk_gem.c | 14 --
1
OVL_CON_CLRFMT_MAN is a configuration for extending color format
settings of DISP_REG_OVL_CON(n).
It will change some of the original color format settings.
Take the settings of (3 << 12) for example.
- If OVL_CON_CLRFMT_MAN = 0 means OVL_CON_CLRFMT_RGBA.
- If OVL_CON_CLRFMT_MAN = 1 means OVL_
Hi Louis,
> VKMS currently supports only one CRTC, so it make no sense to have this
> index configurable. To avoid issues, replace this hardcoded index by
> drm_crtc_mask when applicable.
>
> There is no need to manually set a crtc mask on primary and cursor plane
> as it is automatically set by
Hey Louis,
> Currently drm_writeback_connector are created by
> drm_writeback_connector_init or drm_writeback_connector_init_with_encoder.
> Both of the function uses drm_connector_init and drm_encoder_init, but
> there is no way to properly clean those structure from outside. By using
> drm manag
Hi Louis,
Thanks for this series!
The first 2 patches look good to me. It could make sense to move the
alloc + init pair of calls to a function (vkms_connector_init() and
vkms_encoder_init() for example), but we can always move it in the
furure:
This one looks good, but I added couple of comment
Hi Louis,
Thanks for making this change even more atomic.
> To simplify the memory managment this series replace all manual drm
> object managment by drm-managed one. This way the VKMS code don't have to
> manage it directly and the DRM core will handle the object destruction.
>
> No functiona
Hi Louis,
> CRTC initialization call drm_mode_crtc_set_gamma_size without the proper
> checks, introduce this check to avoid issues.
>
> Signed-off-by: Louis Chauvet
Reviewed-by: José Expósito
> ---
> drivers/gpu/drm/vkms/vkms_crtc.c | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion
Hi Louis,
> The functions `vkms_crtc_atomic_begin` and `vkms_crtc_atomic_flush` are
> responsible for locking and unlocking a mutex, respectively. Add the
> `__acquires` and `__releases` annotations to these functions to prevent
> the associated sparse warning about context imbalance.
>
> Signed-
Hi Linus,
please pull some updates and cleanups for the fbdev drivers for kernel 6.12-rc1.
This patchset includes a crashfix for xen and a possible use-after-free fix in
pxafb.
Thanks!
Helge
The following changes since commit 8400
On Tue, Sep 17, 2024 at 6:47 AM Konrad Dybcio wrote:
>
> On 13.09.2024 9:51 PM, Rob Clark wrote:
> > From: Rob Clark
> >
> > The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle, but on some
> > devices (x1-85, possibly others), it seems to pass that barrier while
> > there are still things in t
Function drm_sched_entity_push_job() doesn't have a return value,
remove the return value description for it.
Correct several other typo errors.
v2 (Philipp):
- more correction with related comments.
Signed-off-by: Shuicheng Lin
Reviewed-by: Philipp Stanner
---
drivers/gpu/drm/scheduler/sched_
From: Markus Elfring
Date: Tue, 17 Sep 2024 16:40:18 +0200
A of_node_put(remote) call was immediately used after a null pointer check
for the data structure member “next_bridge” in this
function implementation.
Thus use such a function call only once instead directly before the check.
This issue
Hi,
On Tue, 17 Sep 2024 05:29:51 -0500
"Rob Herring (Arm)" wrote:
> dtschema/dtc warnings/errors:
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/connector/ge,sunh-addon-connector.example.dtb:
> addon-connector: Unevaluated properties are not allowed ('powergood-gpios'
On Tue, Sep 17, 2024 at 03:47:09PM +0200, Konrad Dybcio wrote:
> On 13.09.2024 9:51 PM, Rob Clark wrote:
> > From: Rob Clark
> >
> > The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle, but on some
> > devices (x1-85, possibly others), it seems to pass that barrier while
> > there are still thi
On 13.09.2024 9:51 PM, Rob Clark wrote:
> From: Rob Clark
>
> The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle, but on some
> devices (x1-85, possibly others), it seems to pass that barrier while
> there are still things in the event completion FIFO waiting to be
> written back to memory.
C
On 17.09.2024 10:12 AM, Soutrik Mukhopadhyay wrote:
>
> On 9/14/2024 2:54 AM, Bjorn Andersson wrote:
>> On Thu, Sep 12, 2024 at 03:34:05PM +0530, Soutrik Mukhopadhyay wrote:
>>> On 9/12/2024 1:32 AM, Bjorn Andersson wrote:
On Wed, Sep 11, 2024 at 03:38:13PM +0530, Soutrik Mukhopadhyay wrote:
On Mon, Aug 12, 2024 at 2:10 AM Lu Yao wrote:
>
> Add support for the drm_panic module, which displays a pretty user
> friendly message on the screen when a Linux kernel panic occurs.
>
> Signed-off-by: Lu Yao
Patch looks good to me. Any chance you want to convert the other
non-DC dce files (dc
In DP alt mode, when pin assignment is D, only one PHY lane is owned
by the display. intel_cx0pll_enable currently performs a power state
ready on both the lanes in all cases.
Address the todo to perfom power state ready on owned lanes.
Tested on Meteor Lake-P [Intel Arc Graphics] with DP alt mod
On Tue, Sep 17, 2024 at 03:16:53AM +, manikanda...@microchip.com wrote:
> Hi Conor,
>
> On 14/08/24 7:29 pm, Conor Dooley wrote:
> > On Wed, Aug 14, 2024 at 04:22:53PM +0530, Manikandan Muralidharan wrote:
> >> Add the 'sam9x75-mipi-dsi' compatible binding, which describes the
> >> Microchip's
On 12/08/2024 08:09, Lu Yao wrote:
Add support for the drm_panic module, which displays a pretty user
friendly message on the screen when a Linux kernel panic occurs.
From a drm_panic point of view, it looks good to me.
I don't have the required hardware, so unfortunately I wasn't able to
test
The mutex field has two following semicolons, replace this with just
one semicolon.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h
b/drivers
Add documentation about the preemption feature supported by the msm
driver.
Signed-off-by: Antonino Maniscalco
---
Documentation/gpu/msm-preemption.rst | 98
1 file changed, 98 insertions(+)
diff --git a/Documentation/gpu/msm-preemption.rst
b/Documentation/
Some userspace changes are necessary so add a flag for userspace to
advertise support for preemption when creating the submitqueue.
When this flag is not set preemption will not be allowed in the middle
of the submitted IBs therefore mantaining compatibility with older
userspace.
The flag is reje
In mesa CP_SET_CTXSWITCH_IB is renamed to CP_SET_AMBLE and some other
names are changed to match KGSL. Import those changes.
The changes have not been merged yet in mesa but are necessary for this
series.
Signed-off-by: Antonino Maniscalco
---
.../gpu/drm/msm/registers/adreno/adreno_pm4.xml
Add missing bitfields to CONTEXT_SWITCH_CNTL in a6xx.xml.
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/registers/adreno/a6xx.xml
b/drivers/gpu/drm/msm/registers/
Initialize with 4 rings to enable preemption.
For now only on A750 as other targets require testing.
Add the "preemption_enabled" module parameter to override this for other
A7xx targets.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adre
This patch implements preemption feature for A6xx targets, this allows
the GPU to switch to a higher priority ringbuffer if one is ready. A6XX
hardware as such supports multiple levels of preemption granularities,
ranging from coarse grained(ringbuffer level) to a more fine grained
such as draw-cal
Add trace points corresponding to preemption being triggered and being
completed for latency measurement purposes.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 6 ++
drivers/gpu/drm/msm/msm_gpu_trace.h |
Use the postamble to reset perf counters when switching between rings,
except when sysprof is enabled, analogously to how they are reset
between submissions when switching pagetables.
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 +++
drivers/gpu/drm/m
With preemption it is not enough to track the current_ctx_seqno globally
as execution might switch between rings.
This is especially problematic when current_ctx_seqno is used to
determine whether a page table switch is necessary as it might lead to
security bugs.
Track current context per ring.
Adds a field to `adreno_info` to store the GPU specific preempt record
size.
Signed-off-by: Antonino Maniscalco
Reviewed-by: Akhil P Oommen
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 4
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 +
2 files
The bv_fence field of rbmemptrs was being used incorrectly as the BV
rptr shadow pointer in some places.
Add a bv_rptr field and change the code to use that instead.
Signed-off-by: Antonino Maniscalco
Reviewed-by: Akhil P Oommen
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/ms
This series implements preemption for A7XX targets, which allows the GPU to
switch to an higher priority ring when work is pushed to it, reducing latency
for high priority submissions.
This series enables L1 preemption with skip_save_restore which requires
the following userspace patches to functi
On 17/09/2024 11:53, Manikandan Muralidharan wrote:
> Add Microchip AC69T88A 5" LVDS interface (800x480) TFT LCD panel
> compatible string
>
> Signed-off-by: Manikandan Muralidharan
> ---
> .../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
> 1 file changed, 2 insertions(+)
On Mon, 2024-09-16 at 21:05 +, Shuicheng Lin wrote:
> Function drm_sched_entity_push_job() doesn't have return value,
Doesn't have *a* return value
> remove the return value description for it.
> Correct several other typo errors.
>
> v2 (Philipp):
> - more correction with related comments.
ch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/connector/ge,sunh-addon-connector.example.dtb:
addon-connector: Unevaluated properties are not allowed ('powergood-gpios' was
unexpected)
f
Hi Jiri
Do I have to send the drm patches again to get their Acked-by/Reviewed-by?
Although I have already cced the DRM maintainers in this patchset.
> On 11 Sep 2024, at 5:51 PM, Jiri Kosina wrote:
>
> On Sat, 31 Aug 2024, Aditya Garg wrote:
>
>> Hi Maintainers
>>
>> It has been 2 weeks but
Add support for Microchip AC69T88A 5 inch TFT LCD 800x480
Display module with LVDS interface.The panel uses the Sitronix
ST7262 800x480 Display driver
Signed-off-by: Manikandan Muralidharan
Signed-off-by: Dharma Balasubiramani
---
drivers/gpu/drm/panel/panel-simple.c | 28 ++
Add Microchip AC69T88A 5" LVDS interface (800x480) TFT LCD panel
compatible string
Signed-off-by: Manikandan Muralidharan
---
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/pane
On Tue, 17 Sept 2024 at 10:40, Soutrik Mukhopadhyay
wrote:
>
>
> On 9/13/2024 5:12 PM, Dmitry Baryshkov wrote:
> > On Fri, 13 Sept 2024 at 13:38, Soutrik Mukhopadhyay
> > wrote:
> >> In order to support different HW versions, introduce aux_cfg array
> >> to move v4 specific aux configuration sett
Add new registers and related bits. Compute the strength
value and tap value based on display mode.
v2: Replace i915/dev_priv with display[Jani]
Signed-off-by: Nemesa Garg
---
drivers/gpu/drm/i915/display/intel_display.c | 7 +-
.../drm/i915/display/intel_sharpness_filter.c | 112 +++
Load the lut values during pipe enable.
v2: Add the display version check
Signed-off-by: Nemesa Garg
---
drivers/gpu/drm/i915/display/intel_crtc.c| 3 +++
drivers/gpu/drm/i915/display/intel_display.c | 6 ++
drivers/gpu/drm/i915/display/skl_scaler.c| 13 -
3 files chan
As only second scaler can be used for sharpness check if it
is available and also check if panel fitting is also not enabled,
then set the sharpness. Panel fitting will have the preference
over sharpness property.
v2: Add the panel fitting check before enabling sharpness
v3: Reframe commit message
The sharpness property requires the use of one of the scaler
so need to set the sharpness scaler coefficient values.
These values are based on experiments and vary for different
tap value/win size. These values are normalized by taking the
sum of all values and then dividing each value with a sum.
Introduces the new crtc property "SHARPNESS_STRENGTH" that allows
the user to set the intensity so as to get the sharpness effect.
The value of this property can be set from 0-255.
It is useful in scenario when the output is blurry and user
want to sharpen the pixels. User can increase/decrease the
Many a times images are blurred or upscaled content is also not as
crisp as original rendered image. Traditional sharpening techniques often
apply a uniform level of enhancement across entire image, which sometimes
result in over-sharpening of some areas and potential loss of natural details.
In
> I think this patch just hides the real problem.
> How could putcs have become NULL ?
>
> Helge
Oh, you are right!
I will figure it out.
Best,
Qianqiang Liu
Add a driver to support the runtime hot-pluggable add-on connector on the
GE SUNH device. This connector allows connecting and disconnecting an
add-on to/from the main device to augment its features. Connection and
disconnection can happen at runtime at any moment without notice.
Different add-on
Quick summary:
I have investigated a problem for a long time, I have a pretty good
understanding, I tried various fixes but none except this is working. The
goal of this patch is to discuss the problem to converge to the best
solution.
-
Symptoms
--
led-backlight is a consumer of one or multiple LED class devices, but no
devlink is created for such supplier-producer relationship. One consequence
is that removal ordered is not correctly enforced.
Issues happen for example with the following sections in a device tree
overlay:
// An LED dri
When device tree nodes are added, the I2C core tries to probe client
devices based on the classic DT structure:
i2c@abcd {
some-client@42 { compatible = "xyz,blah"; ... };
};
However for hotplug connectors described via device tree overlays there is
additional level of indirection,
This driver implements the point of a DRM pipeline where a connector allows
removal of all the following bridges up to the panel.
The DRM subsystem currently allows hotplug of the monitor but not preceding
components. However there are embedded devices where the "tail" of the DRM
pipeline, includi
Supporting hardware whose final part of the DRM pipeline can be physically
removed requires the ability to detach all bridges from a given point to
the end of the pipeline.
Introduce a variant of drm_encoder_cleanup() for this.
Signed-off-by: Luca Ceresoli
---
Changes in v3: none
Changed in v
In preparation for allowing bridges to be added to and removed from a DRM
card without destroying the whole card, add a new DRM bridge function
called on addition and removal of bridges.
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/drm_bridge.c | 12
include/drm/drm_bridge.h
Add bindings for the GE SUNH add-on connector. This is a physical,
hot-pluggable connector that allows to attach and detach at runtime an
add-on adding peripherals on non-discoverable busses.
Signed-off-by: Luca Ceresoli
---
Changed in v4:
- rename 'nobus-devices' to 'devices'
- use 'addition
Hello,
this series aims at supporting a Linux device with a connector to
physically add and remove an add-on to/from the main device to augment its
features at runtime, adding devices on non-discoverable busses, using
device tree overlays.
Changes since v4 are limited, but I'm sending this to hav
On 9/13/2024 5:12 PM, Dmitry Baryshkov wrote:
On Fri, 13 Sept 2024 at 13:38, Soutrik Mukhopadhyay
wrote:
In order to support different HW versions, introduce aux_cfg array
to move v4 specific aux configuration settings.
Signed-off-by: Soutrik Mukhopadhyay
---
v2: Fixed review comments from
On 17/09/24 13:33, Ghimiray, Himal Prasad wrote:
>
>
> On 17-09-2024 12:08, Raag Jadav wrote:
>> On Tue, Sep 17, 2024 at 10:11:05AM +0530, Ghimiray, Himal Prasad wrote:
>>> On 17-09-2024 09:32, Raag Jadav wrote:
This was previously attempted as xe specific reset uevent but dropped
in co
On 9/14/2024 2:54 AM, Bjorn Andersson wrote:
On Thu, Sep 12, 2024 at 03:34:05PM +0530, Soutrik Mukhopadhyay wrote:
On 9/12/2024 1:32 AM, Bjorn Andersson wrote:
On Wed, Sep 11, 2024 at 03:38:13PM +0530, Soutrik Mukhopadhyay wrote:
The Qualcomm SA8775P platform comes with a DisplayPort control
On Mon, 16 Sep 2024, Derek Foreman wrote:
> Gentle ping - is there anything more I need to do before this can land?
I don't think so. FWIW, I bounced this to intel-gfx and got passing CI
results too.
Cc: drm-misc maintainers. Just wondering where to merge this. It's a fix
to commits in v6.11. Ar
On 17-09-2024 12:08, Raag Jadav wrote:
On Tue, Sep 17, 2024 at 10:11:05AM +0530, Ghimiray, Himal Prasad wrote:
On 17-09-2024 09:32, Raag Jadav wrote:
This was previously attempted as xe specific reset uevent but dropped
in commit 77a0d4d1cea2 ("drm/xe/uapi: Remove reset uevent for now")
as p
On Mon, 16 Sep 2024, Vamsi Krishna Brahmajosyula
wrote:
> In DP alt mode, when pin assignment is D, only one PHY lane is owned
> by the display. intel_cx0pll_enable currently performs a power cycle
> ready on both the lanes in all cases.
>
> Address the todo to perfom power state ready on owned l
On Tue, 17 Sep 2024, Raag Jadav wrote:
> Now that we have device wedged event in place, add wedge_recovery sysfs
> attribute which will expose recovery methods supported by the DRM device.
> This is useful for userspace consumers in cases where the device supports
> multiple recovery methods which
On 17/09/2024 01:00, Lyude Paul wrote:
It turns out that if you happen to have a kernel config where
CONFIG_DRM_PANIC is disabled and spinlock debugging is enabled, along with
KMS being enabled - we'll end up trying to acquire an uninitialized
spin_lock with drm_panic_lock() when we try to do a c
Changes the elida-kd35t133 panel to use multi style functions for
improved error handling.
Signed-off-by: Tejas Vipin
---
drivers/gpu/drm/panel/panel-elida-kd35t133.c | 107 ---
1 file changed, 45 insertions(+), 62 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-elida-kd35
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