Modify rules for both MT8195 and MT8188.
Hardware capabilities include color formats and AFBC are
changed since MT8195, stop using the settings of MT8183.
Signed-off-by: Hsiao Chien Sung
---
.../bindings/display/mediatek/mediatek,ovl.yaml | 12 +---
1 file changed, 5 insertions(+),
Register CRC related function pointers to support
CRC retrieval.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 261 +++-
drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 39 +++
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 35 +++
3 files chang
Add register definitions for GCE so users can use them
as a buffer to store data.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
include/linux/soc/mediatek/mtk-cmdq.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/linux/soc/mediatek/mtk-cmd
ETHDR 9-bit alpha should be disabled by default,
otherwise alpha blending will not work.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/soc/mediatek/mtk-mmsys.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/s
This series is based on mediatek-drm-next.
This series adds support for running IGT (Intel GPU Tool) tests
with MediaTek display driver. The following changes will be
applied:
1. Add a new API for creating GCE thread loop to retrieve CRCs
from the hardware component
2. Support hardware CRC cal
Support premultiply and coverage alpha blending modes.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 202 +---
1 file changed, 178 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
b/drivers/gpu/drm/mediatek/
Support premultiply and coverage alpha blending modes.
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 2 +-
drivers/gpu/drm/mediatek/mtk_ethdr.c | 48 +++
2 files changed, 39 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/d
Add OVL compatible name for MT8195.
Without this commit, DRM won't work after modifying
the device tree.
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
b
We choose Mixer as CRC generator in VDOSYS1 since
its frame done event will trigger vblanks, we can know
when is safe to retrieve CRC of the frame.
In VDOSYS1, there's no image procession after Mixer,
unlike OVL in VDOSYS0, Mixer's CRC will include all the
effects that are applied to the frame.
S
Set DRM mode configs limitation accroding to the
hardware capabilities.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 28 ++
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 17
2 files changed, 37 insertions(+), 8 deletions(-)
dif
We choose OVL as CRC generator from other hardware
components that are also capable of calculating CRCs,
since its frame done event triggers vblanks, it can be
used as a signal to know when is safe to retrieve CRC of
the frame.
Please note that position of the hardware component
that is chosen as
Support alpha blending by adding correct blend mode and
alpha property in plane initialization.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 10 ++
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 ++
drivers/gpu/drm/mediatek/mtk_drm_plane.c | 11 ++
On Tue, Oct 17, 2023, at 00:10, Andi Shyti wrote:
> Hi Arnd,
>
>> static void rc6_res_reg_init(struct intel_rc6 *rc6)
>> {
>> -memset(rc6->res_reg, INVALID_MMIO_REG.reg, sizeof(rc6->res_reg));
>
> This is a complex initialization, indeed... how about just
>
>memset(rc6->res_reg, 0, sizeof
Eliminate DRM_SCHED_PRIORITY_UNSET, value of -2, whose only user was
amdgpu. Furthermore, eliminate an index bug, in that when amdgpu boots, it
calls drm_sched_entity_init() with DRM_SCHED_PRIORITY_UNSET, which uses it to
index sched->sched_rq[].
Cc: Alex Deucher
Cc: Christian König
Signed-off-b
A context priority value of AMD_CTX_PRIORITY_UNSET is now invalid--instead of
carrying it around and passing it to the Direct Rendering Manager--and it
becomes AMD_CTX_PRIORITY_NORMAL in amdgpu_ctx_ioctl(), the gateway to context
creation.
Cc: Alex Deucher
Cc: Christian König
Signed-off-by: Lube
>
> On 13/10/2023 05:24, Sandor Yu wrote:
> > Add a new DRM DisplayPort and HDMI bridge driver for Candence
> MHDP8501
> > used in i.MX8MQ SOC. MHDP8501 could support HDMI or DisplayPort
> > standards according embedded Firmware running in the uCPU.
>
> ...
>
> > +
> > +static struct platform_d
The Snapdragon 670 uses similar clocks (with one frequency added) to the
Snapdragon 845 but reports DPU revision 4.1. Add support for this DPU
with configuration from the Pixel 3a downstream kernel.
Since revision 4.0 is SDM845, reuse some configuration from its catalog
entry.
Link:
https://andr
The Snapdragon 670 has a display subsystem for controlling and
outputting to the display. Add support for it in the device tree.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Richard Acayan
---
arch/arm64/boot/dts/qcom/sdm670.dtsi | 292 +++
1 file changed, 292 insertions
The SDM670 display controller has the same requirements as the SDM845
display controller, despite having distinct properties as described in
the catalog. Add the compatible for SDM670 to the SDM845 controller.
Acked-by: Rob Herring
Signed-off-by: Richard Acayan
---
.../devicetree/bindings/displ
Add support for the MDSS block on the SDM670 platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Richard Acayan
---
drivers/gpu/drm/msm/msm_mdss.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 2e87dd6cb17b..2a
Add documentation for the SDM670 display subsystem, adapted from the
SDM845 and SM6125 documentation.
Reviewed-by: Rob Herring
Signed-off-by: Richard Acayan
---
.../display/msm/qcom,sdm670-mdss.yaml | 292 ++
1 file changed, 292 insertions(+)
create mode 100644
Documen
The SDM670 has DSI ports. Add the compatible for the controller.
Acked-by: Rob Herring
Signed-off-by: Richard Acayan
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-contro
Changes since v3 (2023100927.485054-8-mailingrad...@gmail.com):
- move status properties down (review tag retained) (6/6)
- accumulate review tag (3/6)
Changes since v2 (20231003012119.857198-9-mailingrad...@gmail.com):
- rebase on series and reference generic sblk definitions (5/6)
- add
On 9/24/2023 3:23 AM, Dmitry Baryshkov wrote:
On 22/09/2023 20:49, Jessica Zhang wrote:
On 8/29/2023 1:22 AM, Pekka Paalanen wrote:
On Mon, 28 Aug 2023 17:05:13 -0700
Jessica Zhang wrote:
Loosen the requirements for atomic and legacy commit so that, in cases
where pixel_source != FB, th
On 10/16/2023 4:24 PM, John Harrison wrote:
On 10/16/2023 15:55, Vinay Belgaumkar wrote:
This bit does not cause an explicit L3 flush. We already use
At all? Or only on newer hardware? And as a genuine spec change or as
a bug / workaround?
If the hardware has re-purposed the bit then it is
Hi, Dave & Daniel:
This includes:
1. Correctly free sg_table in gem prime vmap
Regards,
Chun-Kuang.
The following changes since commit 58720809f52779dc0f08e53e54b014209d13eebb:
Linux 6.6-rc6 (2023-10-15 13:34:39 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/sc
On 10/16/2023 15:55, Vinay Belgaumkar wrote:
This bit does not cause an explicit L3 flush. We already use
At all? Or only on newer hardware? And as a genuine spec change or as a
bug / workaround?
If the hardware has re-purposed the bit then it is probably worth at
least adding a comment to th
This bit does not cause an explicit L3 flush. We already use
PIPE_CONTROL_DC_FLUSH_ENABLE for that purpose.
Cc: Nirmoy Das
Cc: Mikka Kuoppala
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a
`strncpy` is deprecated for use on NUL-terminated destination strings
[1] and as such we should prefer more robust and less ambiguous string
interfaces.
We should NUL-pad as there are full struct copies happening in places:
| struct drm_mode_modeinfo umode;
|
| ...
| stru
Hi Arnd,
> static void rc6_res_reg_init(struct intel_rc6 *rc6)
> {
> - memset(rc6->res_reg, INVALID_MMIO_REG.reg, sizeof(rc6->res_reg));
This is a complex initialization, indeed... how about just
memset(rc6->res_reg, 0, sizeof(rc6->res_reg));
> + i915_reg_t res_reg[INTEL_RC6_RES_MA
On Monday, October 16th, 2023 at 17:10, Ville Syrjälä
wrote:
> On Mon, Oct 16, 2023 at 05:52:22PM +0300, Pekka Paalanen wrote:
>
> > On Mon, 16 Oct 2023 15:42:16 +0200
> > André Almeida andrealm...@igalia.com wrote:
> >
> > > Hi Pekka,
> > >
> > > On 10/16/23 14:18, Pekka Paalanen wrote:
> >
On 10/13/23 22:50, Sergey Shtylyov wrote:
In cfb_copyarea(), the local variable bits_per_line is needlessly typed as
*unsigned long* -- which is a 32-bit type on the 32-bit arches and a 64-bit
type on the 64-bit arches; that variable's value is derived from the __u32
typed fb_fix_screeninfo::line
On 10/6/23 22:43, Jorge Maidana wrote:
uvesafb_exec() is a static function defined and called only in
drivers/video/fbdev/uvesafb.c, remove the prototype from
include/video/uvesafb.h.
Fixes the warning:
./include/video/uvesafb.h:112:12: warning: 'uvesafb_exec' declared 'static' but
never define
On 10/14/23 14:14, Zhang Shurong wrote:
We can easily use FBIOPUT_VSCREENINFO set fb_var_screeninfo, so
it's possible for a divide by zero error to occur.
Fix this by making sure the divisor is non-zero before the computation.
Signed-off-by: Zhang Shurong
---
drivers/video/fbdev/core/fbmon.c
On 10/16/23 13:19, Dan Carpenter wrote:
Return negative -ENXIO instead of positive ENXIO.
Signed-off-by: Dan Carpenter
applied.
Thanks!
Helge
---
No fixes tag because the caller doesn't check for errors.
drivers/video/fbdev/omap/omapfb_main.c | 4 ++--
1 file changed, 2 insertions(+),
On 10/16/23 22:04, Arnd Bergmann wrote:
From: Arnd Bergmann
This is a global function that is only referenced as an initcall. This causes
a warning:
drivers/video/fbdev/sa1100fb.c:1218:12: error: no previous prototype for
'sa1100fb_init' [-Werror=missing-prototypes]
Make it static instead.
On Fri, 13 Oct 2023 13:39:13 -0500, Chris Morgan wrote:
> From: Chris Morgan
>
> Add support for the Powkiddy RGB30 handheld gaming console.
>
> Chris Morgan (5):
> dt-bindings: vendor-prefixes: document Powkiddy
> dt-bindings: panel: Add Powkiddy RGB30 panel compatible
> drm/panel: st7703
On Fri, 13 Oct 2023 13:39:13 -0500, Chris Morgan wrote:
> From: Chris Morgan
>
> Add support for the Powkiddy RGB30 handheld gaming console.
>
> Chris Morgan (5):
> dt-bindings: vendor-prefixes: document Powkiddy
> dt-bindings: panel: Add Powkiddy RGB30 panel compatible
> drm/panel: st7703
On 10/16/23 21:41, Gurchetan Singh wrote:
> drm_virtgpu_context_set_param defines both param and
> value to be u64s.
>
> Signed-off-by: Gurchetan Singh
> ---
> drivers/gpu/drm/virtio/virtgpu_ioctl.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/vir
On 10/16/23 21:41, Gurchetan Singh wrote:
> There are two problems with the current method of determining the
> virtio-gpu debug name.
>
> 1) TASK_COMM_LEN is defined to be 16 bytes only, and this is a
>Linux kernel idiom (see PR_SET_NAME + PR_GET_NAME). Though,
>Android/FreeBSD get around
On 10/16/23 21:42, Gurchetan Singh wrote:
> This allows setting the debug name during CONTEXT_INIT.
>
> Signed-off-by: Gurchetan Singh
> ---
> drivers/gpu/drm/virtio/virtgpu_drv.h | 4 +++
> drivers/gpu/drm/virtio/virtgpu_ioctl.c | 38 ++
> 2 files changed, 36 insertio
On Tue, Sep 26, 2023 at 08:24:41PM +0200, Konrad Dybcio wrote:
>
> The SMMUs on sc7280 are cache-coherent. APPS_SMMU is marked as such,
> mark the GPU one as well.
>
> Signed-off-by: Konrad Dybcio
Reviewed-by: Akhil P Oommen
-Akhil
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 1 +
> 1 fil
On Tue, Sep 26, 2023 at 08:24:40PM +0200, Konrad Dybcio wrote:
>
> GPU_SMMU SID 1 is meant for Adreno LPAC (Low Priority Async Compute).
> On platforms that support it (in firmware), it is necessary to
> describe that link, or Adreno register access will hang the board.
>
> Add that and fix up th
Reviewed-by: Josh Simonot
On Mon, 16 Oct 2023 at 14:42, Gurchetan Singh
wrote:
> This allows setting the debug name during CONTEXT_INIT.
>
> Signed-off-by: Gurchetan Singh
> ---
> drivers/gpu/drm/virtio/virtgpu_drv.h | 4 +++
> drivers/gpu/drm/virtio/virtgpu_ioctl.c | 38 +
On Tue, Sep 26, 2023 at 08:24:37PM +0200, Konrad Dybcio wrote:
>
> Some (many?) devices with A635 expect a ZAP shader to be loaded.
>
> Set the file name to allow for that.
>
> Signed-off-by: Konrad Dybcio
> ---
> drivers/gpu/drm/msm/adreno/adreno_device.c | 1 +
> 1 file changed, 1 insertion(
Reviewed-by: Josh Simonot
On Mon, 16 Oct 2023 at 14:42, Gurchetan Singh
wrote:
> There are two problems with the current method of determining the
> virtio-gpu debug name.
>
> 1) TASK_COMM_LEN is defined to be 16 bytes only, and this is a
>Linux kernel idiom (see PR_SET_NAME + PR_GET_NAME)
Reviewed-by: Josh Simonot
On Mon, 16 Oct 2023 at 14:42, Gurchetan Singh
wrote:
> drm_virtgpu_context_set_param defines both param and
> value to be u64s.
>
> Signed-off-by: Gurchetan Singh
> ---
> drivers/gpu/drm/virtio/virtgpu_ioctl.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions
From: Arnd Bergmann
The newly added memset() causes a warning for some reason I could not figure
out:
In file included from arch/x86/include/asm/string.h:3,
from drivers/gpu/drm/i915/gt/intel_rc6.c:6:
In function 'rc6_res_reg_init',
inlined from 'intel_rc6_init' at drivers/
From: Arnd Bergmann
This is a global function that is only referenced as an initcall. This causes
a warning:
drivers/video/fbdev/sa1100fb.c:1218:12: error: no previous prototype for
'sa1100fb_init' [-Werror=missing-prototypes]
Make it static instead.
Signed-off-by: Arnd Bergmann
---
drivers
From: Arnd Bergmann
When QMP is in a loadable module, the A6xx GPU driver fails to link
as built-in:
x86_64-linux-ld: drivers/gpu/drm/msm/adreno/a6xx_gmu.o: in function
`a6xx_gmu_resume':
a6xx_gmu.c:(.text+0xd62): undefined reference to `qmp_send'
Add the usual dependency that still allows com
On Tue, Sep 26, 2023 at 08:24:36PM +0200, Konrad Dybcio wrote:
>
> When opp-supported-hw is present under an OPP node, but no form of
> opp_set_supported_hw() has been called, that OPP is ignored by the API
> and marked as unsupported.
>
> Before Commit c928a05e4415 ("drm/msm/adreno: Move speedbi
On 16/10/2023 17:05, Flavio Suligoi wrote:
> Both files pwm-backlight.yaml and led-backlight.yaml contain properties
> in common with each other, regarding the brightness levels:
>
> - brightness-levels
> - default-brightness-level
>
> These properties can then be moved to backlight/common.yaml.
This allows setting the debug name during CONTEXT_INIT.
Signed-off-by: Gurchetan Singh
---
drivers/gpu/drm/virtio/virtgpu_drv.h | 4 +++
drivers/gpu/drm/virtio/virtgpu_ioctl.c | 38 ++
2 files changed, 36 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/virt
There are two problems with the current method of determining the
virtio-gpu debug name.
1) TASK_COMM_LEN is defined to be 16 bytes only, and this is a
Linux kernel idiom (see PR_SET_NAME + PR_GET_NAME). Though,
Android/FreeBSD get around this via setprogname(..)/getprogname(..)
in libc.
drm_virtgpu_context_set_param defines both param and
value to be u64s.
Signed-off-by: Gurchetan Singh
---
drivers/gpu/drm/virtio/virtgpu_ioctl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/virtio/virtgpu_ioctl.c
b/drivers/gpu/drm/virtio/virtgpu_ioctl.
On Mon, Oct 16, 2023 at 08:18:25PM +0200, Heiko Stübner wrote:
> Hi,
>
> Am Montag, 16. Oktober 2023, 18:07:52 CEST schrieb Dragan Simic:
> > On 2023-10-16 17:52, Chris Morgan wrote:
> > > Confirmed that those pending patches DO fix the panel suspend issues.
> > > Thank you.
> >
> > Awesome, tha
Hi,
Am Montag, 16. Oktober 2023, 18:07:52 CEST schrieb Dragan Simic:
> On 2023-10-16 17:52, Chris Morgan wrote:
> > Confirmed that those pending patches DO fix the panel suspend issues.
> > Thank you.
>
> Awesome, that's great to hear! Perhaps a "Tested-by" in the original
> LKML thread [1] co
Hi,
Am Montag, 17. Juli 2023, 08:18:27 CEST schrieb Liu Ying:
> To get better accuration, use pixel clock rate to calculate lbcc instead of
> lane_mbps since the pixel clock rate is in KHz while lane_mbps is in MHz.
> Without this, distorted image can be seen on a HDMI monitor connected with
> i.M
On Mon, Oct 16, 2023 at 09:02:38AM +0100, Tvrtko Ursulin wrote:
>
> On 13/10/2023 21:51, Rodrigo Vivi wrote:
> > On Thu, Sep 28, 2023 at 01:48:34PM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 27/09/2023 20:34, Belgaumkar, Vinay wrote:
> > > >
> > > > On 9/21/2023 3:41 AM, Tvrtko Ursulin wrote:
>
From: Pranjal Ramajor Asha Kanojiya
Use QAIC_TIMESYNC MHI channel to send UTC time to device in SBL
environment. Remove support for QAIC_TIMESYNC MHI channel in AMSS
environment as it is not used in that environment.
Signed-off-by: Pranjal Ramajor Asha Kanojiya
Reviewed-by: Jeffrey Hugo
Review
From: Ajit Pal Singh
Device and Host have a time synchronization mechanism that happens once
during boot when device is in SBL mode. After that, in mission-mode there
is no timesync. In an experiment after continuous operation, device time
drifted w.r.t. host by approximately 3 seconds per day. T
AIC100 supports a timesync mechanism that allows AIC100 to timestamp
device logs with a host based time. This becomes useful for putting host
logs in a unified timeline with device logs for debugging and performance
profiling. The mechanism consists of a boot-time initialization and a
runtime perod
From: Carl Vanderlip
Several virtualization use-cases either don't support 32 MultiMSIs
(Xen/VMware) or have significant drawbacks to their use (KVM's vIOMMU,
which is required to support 32 MSI, needs to allocate an alternate
system memory space for each device using vIOMMU (e.g. 8GB VM mem and
The Lontium LT9611UXC driver doesn't need to control DSI power
lines manually. Mark it for automatic power control.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/lontium-lt9611uxc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/lontium-lt
The Lontium LT9611 driver doesn't need to control DSI power
lines manually. Mark it for automatic power control.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/lontium-lt9611.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/lontium-lt9611.c
Now as the Parade PS8640 driver sets the MIPI_DSI_MANUAL_POWERUP flag,
drop the workaround enforcing the late DSI link powerup in the case the
next bridge is ps8640.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi_manager.c | 20
1 file changed, 20 deletions(
The Parade PS8640 bridge will fail to start if the DSI link is enabled
when the bridge is being reset / powered up (even to the LP-11 state).
To ensure that the DSI link is powered down, require manual control over
the DSI link state.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/pa
Simplify dsi_mgr_bridge_post_disable() by using
dsi_mgr_bridge_power_off() instead of hand-coding the same call
sequence.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi_manager.c | 24 +---
1 file changed, 5 insertions(+), 19 deletions(-)
diff --git a/driver
Start migrating tc358762 bridge to new manual DSI power control API. If
the tight power control is not available, default to the existing
pre_enable_prev_first flag.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/tc358762.c | 15 ++-
1 file changed, 14 insertions(+), 1 de
Document the known limititations of the DSI hosts vs commands transfers
in LP mode. For the details see sun6i_dsi_encoder_enable().
Signed-off-by: Dmitry Baryshkov
---
include/drm/drm_mipi_dsi.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_
Implement new API for tight control over the DSI link's power state.
This allows bridge and panel drivers to send DSI commands at a proper
time.
Note, this also brings back the ps8640 workaround (to be removed later,
once ps8640 driver sets up the MIPI_DSI_MANUAL_POWERUP flag).. We have
to make su
The MIPI DSI links do not fully fall into the DRM callbacks model. The
drm_bridge_funcs abstraction. Instead of having just two states (off and
on) the DSI hosts have separate LP-11 state. In this state the host is
on, but the video stream is not yet enabled.
Introduce API that allows DSI bridges
It has been pointed out (e.g. in [1]) that enable is not the best place
for sending the DSI commands. There are hosts (sunxi) that can not
support sending DSI commands once video stream has enabled.
Also most panel drivers send DSI commands in the prepare() callback
(which maps to drm_bridg_funcs:
It is well known that DSI dosn't fully fit into the DRM enable/disable
model thanks to the intermediate LP-11 state: (roughly) the link is already
up, but the video stream is not yet enabled.
Previously we have handled this by forcing DSI link powerup in the
mode_set callback. This worked, but it
On 2023-10-16 17:52, Chris Morgan wrote:
Confirmed that those pending patches DO fix the panel suspend issues.
Thank you.
Awesome, that's great to hear! Perhaps a "Tested-by" in the original
LKML thread [1] could help with having the patch pulled sooner.
Links:
[1]
https://lore.kernel.org/
On 16/10/2023 12:47, Thomas Zimmermann wrote:
Hi
Am 03.10.23 um 16:22 schrieb Jocelyn Falempe:
drm_panic will need the low-level drm_fb__line functions.
It seems like premature optimization to not use drm_fb_blit();
especially since drm_panic is not performance critical.
Also add drm_
On 12/10/2023 10:40, Moudy Ho wrote:
> Add compatible string and GCE property for MT8195 SPLIT, of
> which is operated by MDP3.
>
> Signed-off-by: Moudy Ho
> ---
After feedback from Angelo:
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 16/10/2023 10:01, AngeloGioacchino Del Regno wrote:
> Il 13/10/23 08:52, Krzysztof Kozlowski ha scritto:
>> On 12/10/2023 10:40, Moudy Ho wrote:
>>> Add compatible string and GCE property for MT8195 SPLIT, of
>>> which is operated by MDP3.
>>>
>>> Signed-off-by: Moudy Ho
>>
>>
>>> +allOf:
>>> +
Confirmed that those pending patches DO fix the panel suspend issues. Thank you.
On Mon, Oct 16, 2023 at 3:41 AM Guido Günther wrote:
>
> Hi Chris,
> On Fri, Oct 13, 2023 at 01:39:16PM -0500, Chris Morgan wrote:
> > From: Chris Morgan
> >
> > The Powkiddy RGB30 4 inch panel is a 4 inch 720x720 D
On 2023-10-16 11:29, Luben Tuikov wrote:
> On 2023-10-16 11:12, Matthew Brost wrote:
>> On Sat, Oct 14, 2023 at 08:09:31PM -0400, Luben Tuikov wrote:
>>> On 2023-10-13 22:49, Luben Tuikov wrote:
On 2023-10-11 19:58, Matthew Brost wrote:
> Rather than call free_job and run_job in same work
On 2023-10-16 11:12, Matthew Brost wrote:
> On Sat, Oct 14, 2023 at 08:09:31PM -0400, Luben Tuikov wrote:
>> On 2023-10-13 22:49, Luben Tuikov wrote:
>>> On 2023-10-11 19:58, Matthew Brost wrote:
Rather than call free_job and run_job in same work item have a dedicated
work item for each.
On 2023-10-16 11:08, Matthew Brost wrote:
> On Fri, Oct 13, 2023 at 01:45:08PM -0400, Luben Tuikov wrote:
>> On 2023-10-11 19:58, Matthew Brost wrote:
>>> Rather than a global modparam for scheduling policy, move the scheduling
>>> policy to scheduler so user can control each scheduler policy.
>>>
On 2023-10-16 10:57, Matthew Brost wrote:
> On Fri, Oct 13, 2023 at 10:52:22PM -0400, Luben Tuikov wrote:
>> On 2023-10-11 19:58, Matthew Brost wrote:
>>> Also add a lockdep assert to drm_sched_start_timeout.
>>>
>>> Signed-off-by: Matthew Brost
>>> Reviewed-by: Luben Tuikov
>>
>> I don't remembe
On Sat, Oct 14, 2023 at 08:09:31PM -0400, Luben Tuikov wrote:
> On 2023-10-13 22:49, Luben Tuikov wrote:
> > On 2023-10-11 19:58, Matthew Brost wrote:
> >> Rather than call free_job and run_job in same work item have a dedicated
> >> work item for each. This aligns with the design and intended use
czw., 12 paź 2023 o 20:48 napisał(a):
>
> > If you want the kernel to keep separate flight recorders I guess we could
> > add that, but I don't think it currently exists for the dyndbg stuff at
> > least. Maybe a flight recorder v2 feature, once the basics are in.
> >
>
> dyndbg has +pwrites
On Fri, Oct 13, 2023 at 01:45:08PM -0400, Luben Tuikov wrote:
> On 2023-10-11 19:58, Matthew Brost wrote:
> > Rather than a global modparam for scheduling policy, move the scheduling
> > policy to scheduler so user can control each scheduler policy.
> >
> > v2:
> > - s/DRM_SCHED_POLICY_MAX/DRM_S
On 2023-10-16 11:00, Matthew Brost wrote:
> On Fri, Oct 13, 2023 at 10:06:18PM -0400, Luben Tuikov wrote:
>> On 2023-10-11 19:58, Matthew Brost wrote:
>>> DRM_SCHED_POLICY_SINGLE_ENTITY creates a 1 to 1 relationship between
>>> scheduler and entity. No priorities or run queue used in this mode.
>>>
On Mon, Oct 16, 2023 at 05:52:22PM +0300, Pekka Paalanen wrote:
> On Mon, 16 Oct 2023 15:42:16 +0200
> André Almeida wrote:
>
> > Hi Pekka,
> >
> > On 10/16/23 14:18, Pekka Paalanen wrote:
> > > On Mon, 16 Oct 2023 12:52:32 +0200
> > > André Almeida wrote:
> > >
> > >> Hi Michel,
> > >>
> > >
Both files pwm-backlight.yaml and led-backlight.yaml contain properties
in common with each other, regarding the brightness levels:
- brightness-levels
- default-brightness-level
These properties can then be moved to backlight/common.yaml.
Signed-off-by: Flavio Suligoi
---
.../bindings/leds/ba
On Fri, Oct 13, 2023 at 11:04:47PM -0400, Luben Tuikov wrote:
> On 2023-10-11 19:58, Matthew Brost wrote:
> > Add helper to queue TDR immediately for current and future jobs. This is
> > used in Xe, a new Intel GPU driver, to trigger a TDR to cleanup a
> > drm_scheduler that encounter errors.
>
>
On Fri, Oct 13, 2023 at 10:06:18PM -0400, Luben Tuikov wrote:
> On 2023-10-11 19:58, Matthew Brost wrote:
> > DRM_SCHED_POLICY_SINGLE_ENTITY creates a 1 to 1 relationship between
> > scheduler and entity. No priorities or run queue used in this mode.
> > Intended for devices with firmware scheduler
On Thu, 12 Oct 2023 11:53:52 +0200
Daniel Vetter wrote:
> > You said that turning the kernel ring buffer contents into strings is a
> > very heavy operation, so it is not possible to push this scope
> > separation to userspace, right?
>
> I think it's the kernel that does the formatting, but h
On 10/16/23 16:52, Pekka Paalanen wrote:
On Mon, 16 Oct 2023 15:42:16 +0200
André Almeida wrote:
Hi Pekka,
On 10/16/23 14:18, Pekka Paalanen wrote:
On Mon, 16 Oct 2023 12:52:32 +0200
André Almeida wrote:
Hi Michel,
On 8/17/23 12:37, Michel Dänzer wrote:
On 8/15/23 20:57, André Almei
On Fri, Oct 13, 2023 at 10:52:22PM -0400, Luben Tuikov wrote:
> On 2023-10-11 19:58, Matthew Brost wrote:
> > Also add a lockdep assert to drm_sched_start_timeout.
> >
> > Signed-off-by: Matthew Brost
> > Reviewed-by: Luben Tuikov
>
> I don't remember sending a Reviewed-by email to this patch.
6.5-stable review patch. If anyone has any objections, please let me know.
--
From: Joey Gouly
commit c1165df2be2fffe3adeeaa68f4ee4325108c5e4e upstream.
The `res` variable is already a `struct resource *`, don't take the address of
it.
Fixes incorrect output:
simple
On Mon, 16 Oct 2023 15:42:16 +0200
André Almeida wrote:
> Hi Pekka,
>
> On 10/16/23 14:18, Pekka Paalanen wrote:
> > On Mon, 16 Oct 2023 12:52:32 +0200
> > André Almeida wrote:
> >
> >> Hi Michel,
> >>
> >> On 8/17/23 12:37, Michel Dänzer wrote:
> >>> On 8/15/23 20:57, André Almeida wrote:
This new IOCTL allows callers to close a framebuffer without
disabling planes or CRTCs. This takes inspiration from Rob Clark's
unref_fb IOCTL [1] and DRM_MODE_FB_PERSIST [2].
User-space patch for wlroots available at [3]. IGT test available
at [4].
[1]:
https://lore.kernel.org/dri-devel/2017050
drm_mode_rmfb performs two operations: drop the FB from the
file_priv->fbs list, and make sure the FB is no longer used on a
plane.
In the next commit an IOCTL which only does so former will be
introduced, so let's split it into a separate function.
No functional change, only refactoring.
Signed
On Wed, 11 Oct 2023 11:01:48 +0300, Dan Carpenter wrote:
> The "ret" variable is declared as ssize_t and it can hold negative error
> codes but the "rk_obj->base.size" variable is type size_t. This means
> that when we compare them, they are both type promoted to size_t and the
> negative error co
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