The init order and resulting error handling in dma_buf_export
was pretty messy.
Subordinate objects like the file and the sysfs kernel objects
were initializing and wiring itself up with the object in the
wrong order resulting not only in complicating and partially
incorrect error handling, but al
Sometimes kernel may resume back quickly after suspend,
and DRM not call .mode_set() to re-config
display timing before calling .atomic_enable(), bridge
driver with this patch to keep last configure timing.
Signed-off-by: Xin Ji
---
drivers/gpu/drm/bridge/analogix/anx7625.c | 1 -
1 file changed
On Wed, Dec 7, 2022 at 4:00 PM Bjorn Andersson
wrote:
>
> This introduces support for the SC8280XP platform in the MDSS, DPU and
> DP driver. It reworks the HDP handling in the DP driver to support
> external HPD sources - such as the dp-connector, or USB Type-C altmode.
>
> It then introduces the
The pull request you sent on Fri, 9 Dec 2022 10:51:00 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2022-12-09
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/0d1409e4ff08aa4a9a254d3f723410db32aa7552
Thank you!
--
Deet-doot-dot, I am a bot.
https://ko
Hi Linus,
Last set of fixes for final, scattered bunch of fixes, two amdgpu, one
vmwgfx, and some misc others.
Dave.
drm-fixes-2022-12-09:
drm fixes for 6.1-rc9
amdgpu:
- S0ix fix
- DCN 3.2 array out of bounds fix
shmem:
- Fixes to shmem-helper error paths.
bridge:
- Fix polarity bug in bridg
On 09/12/2022 02:22, Kuogee Hsieh wrote:
On 12/8/2022 4:11 PM, Dmitry Baryshkov wrote:
On 09/12/2022 01:38, Kuogee Hsieh wrote:
On 12/8/2022 3:33 PM, Dmitry Baryshkov wrote:
On 09/12/2022 00:36, Kuogee Hsieh wrote:
Add both data-lanes and link-frequencies property into endpoint
Changes in
On 12/8/2022 4:11 PM, Dmitry Baryshkov wrote:
On 09/12/2022 01:38, Kuogee Hsieh wrote:
On 12/8/2022 3:33 PM, Dmitry Baryshkov wrote:
On 09/12/2022 00:36, Kuogee Hsieh wrote:
Add both data-lanes and link-frequencies property into endpoint
Changes in v7:
-- split yaml out of dtsi patch
-- li
On 09/12/2022 01:38, Kuogee Hsieh wrote:
On 12/8/2022 3:33 PM, Dmitry Baryshkov wrote:
On 09/12/2022 00:36, Kuogee Hsieh wrote:
Add both data-lanes and link-frequencies property into endpoint
Changes in v7:
-- split yaml out of dtsi patch
-- link-frequencies from link rate to symbol rate
-- d
On Wed, 30 Nov 2022 at 15:58, Konrad Dybcio wrote:
>
> On some SoCs (hello SM6115) vcca-supply is not wired to any smd-rpm
> or rpmh regulator, but instead powered by the VDD_MX line, which is
> voted for in the DSI ctrl node.
>
> Signed-off-by: Konrad Dybcio
> ---
> Documentation/devicetree/bin
On 12/8/2022 3:33 PM, Dmitry Baryshkov wrote:
On 09/12/2022 00:36, Kuogee Hsieh wrote:
Add both data-lanes and link-frequencies property into endpoint
Changes in v7:
-- split yaml out of dtsi patch
-- link-frequencies from link rate to symbol rate
-- deprecation of old data-lanes property
Ch
On 09/12/2022 00:36, Kuogee Hsieh wrote:
Add both data-lanes and link-frequencies property into endpoint
Changes in v7:
-- split yaml out of dtsi patch
-- link-frequencies from link rate to symbol rate
-- deprecation of old data-lanes property
Changes in v8:
-- correct Bjorn mail address to ker
On 12/7/2022 2:00 PM, Bjorn Andersson wrote:
From: Bjorn Andersson
Add compatible for the SC8280XP Mobile Display Subsystem and
initialization for version 8.0.0.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Kuogee Hsieh
---
C
On 12/7/2022 2:00 PM, Bjorn Andersson wrote:
From: Bjorn Andersson
The Qualcomm SC8280XP platform contains DPU version 8.0.0, has 9
interfaces, 2 DSI controllers and 4 DisplayPort controllers. Extend the
necessary definitions and describe the DPU in the SC8280XP.
Signed-off-by: Bjorn Anderss
On 09/12/2022 00:36, Kuogee Hsieh wrote:
Add capability to parser and retrieve max DP link supported rate from
link-frequencies property of dp_out endpoint.
Changes in v6:
-- second patch after split parser patch into two patches
Changes in v7:
-- without checking cnt against DP_MAX_NUM_DP_LANE
On 12/7/2022 2:00 PM, Bjorn Andersson wrote:
From: Bjorn Andersson
The DisplayPort controller's hot-plug mechanism is based on pinmuxing a
physical signal on a GPIO pin into the controller. This is not always
possible, either because there aren't dedicated GPIOs available or
because the hot-p
On 08/12/2022 00:00, Bjorn Andersson wrote:
From: Bjorn Andersson
Add compatibles for the DisplayPort and Embedded DisplayPort blocks in
Qualcomm SDM845 and SC8280XP platforms.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
Acked-by: Krzysztof Kozlowski
---
Changes since v4:
On 12/7/2022 2:00 PM, Bjorn Andersson wrote:
From: Bjorn Andersson
The DisplayPort controller's internal HPD interrupt handling is used for
cases where the HPD signal is connected to a GPIO which is pinmuxed into
the DisplayPort controller. In other configurations the HPD notification
might b
On 12/7/2022 2:00 PM, Bjorn Andersson wrote:
From: Bjorn Andersson
The Qualcomm SDM845 platform has a single DisplayPort controller, with
the same design as SC7180, so add support for this by reusing the SC7180
definition.
Signed-off-by: Bjorn Andersson
Reviewed-by: Dmitry Baryshkov
Signed
On 12/7/2022 2:00 PM, Bjorn Andersson wrote:
From: Bjorn Andersson
The SC8280XP platform has four DisplayPort controllers, per MDSS
instance, all with widebus support.
The first two are defined to be DisplayPort only, while the latter pair
(of each instance) can be either DisplayPort or Embe
On 12/7/2022 2:00 PM, Bjorn Andersson wrote:
From: Bjorn Andersson
In the SC8280XP platform there are two identical MDSS instances, each
with the same set of DisplayPort instances, at different addresses.
By not relying on the index to define the instance id it's possible to
describe them bo
By default, HBR2 (5.4G) is the max link link be supported. This patch uses the
actual limit specified by DT and removes the artificial limitation to 5.4 Gbps.
Supporting HBR3 is a consequence of that.
Changes in v2:
-- add max link rate from dtsi
Changes in v3:
-- parser max_data_lanes and max_dp
Add both data-lanes and link-frequencies property into endpoint
Changes in v7:
-- split yaml out of dtsi patch
-- link-frequencies from link rate to symbol rate
-- deprecation of old data-lanes property
Changes in v8:
-- correct Bjorn mail address to kernel.org
Changes in v10:
-- add menu item t
Add capability to parser data-lanes as property of dp_out endpoint.
Also retain the original capability to parser data-lanes as property
of mdss_dp node to handle legacy case.
Changes in v6:
-- first patch after split parser patch into two
Changes in v7:
-- check "data-lanes" from endpoint first
Add capability to parser and retrieve max DP link supported rate from
link-frequencies property of dp_out endpoint.
Changes in v6:
-- second patch after split parser patch into two patches
Changes in v7:
-- without checking cnt against DP_MAX_NUM_DP_LANES to retrieve link rate
Changes in v9:
--
Move data-lanes property from mdss_dp node to dp_out endpoint. Also
add link-frequencies property into dp_out endpoint as well. The last
frequency specified at link-frequencies will be the max link rate
supported by DP.
Changes in v5:
-- revert changes at sc7180.dtsi and sc7280.dtsi
-- add &dp_out
Add DP both data-lanes and link-frequencies property to dp_out endpoint and
support
functions to DP driver.
Kuogee Hsieh (5):
arm64: dts: qcom: add data-lanes and link-freuencies into dp_out
endpoint
dt-bindings: msm/dp: add data-lanes and link-frequencies property
drm/msm/dp: parser da
On Thu, Dec 08, 2022 at 08:54:39PM +0530, Akhil P Oommen wrote:
> On 12/7/2022 9:16 PM, Ulf Hansson wrote:
> > On Wed, 5 Oct 2022 at 11:08, Akhil P Oommen
> > wrote:
> >> Allow a consumer driver to poll for cx gdsc collapse through Reset
> >> framework.
> > Would you mind extending this commit me
On Thu, Dec 08, 2022 at 02:40:55PM +0100, Ulf Hansson wrote:
> On Wed, 7 Dec 2022 at 17:55, Bjorn Andersson wrote:
> >
> > On Wed, Dec 07, 2022 at 05:00:51PM +0100, Ulf Hansson wrote:
> > > On Thu, 1 Dec 2022 at 23:57, Bjorn Andersson wrote:
> > > >
> > > > On Wed, Oct 05, 2022 at 02:36:58PM +053
On Mon, 28 Nov 2022 12:23:20 +0100, Francesco Dolcini wrote:
> From: Stefan Eichenberger
>
> Enable hot plug detection when it is available on the HDMI port.
> Without this connecting to a different monitor with incompatible timing
> before the 10 seconds poll period will lead to a broken display
On 12/8/2022 10:05 AM, Alan Previn wrote:
Starting with MTL, there will be two GT-tiles, a render and media
tile. PXP as a service for supporting workloads with protected
contexts and protected buffers can be subscribed by process
workloads on any tile. However, depending on the platform,
only
+ dri-devel
On Thu, Dec 8, 2022 at 2:25 PM Sung Joon Kim wrote:
>
> The missing DPCD defintions from DP2.0 spec is as follows:
>
> DOWNSPREAD_CTRL (107h):
> ADAPTIVE_SYNC_SDP_EN (bit 6)
> For sink devices that support Adaptive-Sync operation
> and Panel Rep
Hey Dave,
drm-misc-fixes for v6.1 final.
A bit late, hopefully just in time.
drm-misc-fixes-2022-12-08:
drm-misc-fixes for v6.1 final?:
- Fix polarity bug in bridge/ti-sn65dsi86.
- Prefer 8-bit RGB fallback before any YUV mode in dw-hdmi, since some
panels lie about YUV support.
- Fixes t
On Wed, Nov 23, 2022 at 12:05:51PM +0200, Stanislav Lisovskiy wrote:
> We might to use that function separately from intel_dp_dsc_compute_config
> for DP DSC over MST case, because allocating bandwidth in that
> case can be a bit more tricky. So in order to avoid code copy-pasta
> lets extract this
Starting with MTL, there will be two GT-tiles, a render and media
tile. PXP as a service for supporting workloads with protected
contexts and protected buffers can be subscribed by process
workloads on any tile. However, depending on the platform,
only one of the tiles is used for control events pe
On Wed, Dec 7, 2022 at 3:09 AM xurui wrote:
>
> HPD signals on DVI ports can be fired off before the pins required for
> DDC probing actually make contact, due to the pins for HPD making
> contact first. This results in a HPD signal being asserted but DDC
> probing failing, resulting in hotpluggin
On Thu, 2022-12-08 at 09:29 +, Tvrtko Ursulin wrote:
> Just some small comments and questions below.
>
> On 08/12/2022 05:01, Alan Previn wrote:
> > Starting with MTL, there will be two GT-tiles, a render and media
> >
Alan:[snip]
> IMO this looks great now - pretty self-documenting, all th
On Wed, 7 Dec 2022 at 15:15, Uwe Kleine-König
wrote:
>
> Hello dear drm/bridge maintainers,
>
> On Fri, Nov 18, 2022 at 11:35:53PM +0100, Uwe Kleine-König wrote:
> > From: Uwe Kleine-König
> >
> > The probe function doesn't make use of the i2c_device_id * parameter so it
> > can be trivially conv
On Sat, 3 Dec 2022 at 09:45, Cai Huoqing wrote:
>
> Commit 399516ab0fee ("MAINTAINERS: Add a bunch of legacy (UMS) DRM drivers")
> marked these drivers obsolete 7 years ago.
As the author of said patch - calling them obsolete was a bad decision
on my part.
They are effectively orphan with no main
On Thu, Dec 08, 2022 at 02:14:54PM +0100, Greg Kroah-Hartman wrote:
> On Thu, Dec 08, 2022 at 02:54:45PM +0200, Andy Shevchenko wrote:
> > On Wed, Nov 30, 2022 at 03:48:35PM +0200, Andy Shevchenko wrote:
> > > Some of the existing users, and definitely will be new ones, want to
> > > count existing
On 12/8/22 07:18, Colin Ian King wrote:
There is a spelling mistake in the struct field dram_clk_chanage. Fix it.
Signed-off-by: Colin Ian King
Applied. Thanks!
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c | 8
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_seque
On 12/7/2022 9:30 PM, Ulf Hansson wrote:
> On Thu, 1 Dec 2022 at 23:57, Bjorn Andersson wrote:
>> On Wed, Oct 05, 2022 at 02:36:58PM +0530, Akhil P Oommen wrote:
>> @Ulf, Akhil has a power-domain for a piece of hardware which may be
>> voted active by multiple different subsystems (co-processors/e
On 12/8/2022 8:32 PM, Akhil P Oommen wrote:
> On 12/7/2022 9:15 PM, Ulf Hansson wrote:
>> On Wed, 5 Oct 2022 at 11:08, Akhil P Oommen wrote:
>>> Add a reset op compatible function to poll for gdsc collapse. This is
>>> required because:
>>> 1. We don't wait for it to turn OFF at hardware for VOT
On 13.11.22 11:23, Thorsten Leemhuis wrote:
> [Note: this mail is primarily send for documentation purposes and/or for
> regzbot, my Linux kernel regression tracking bot. That's why I removed
> most or all folks from the list of recipients, but left any that looked
> like a mailing lists. These
On 12/7/2022 9:16 PM, Ulf Hansson wrote:
> On Wed, 5 Oct 2022 at 11:08, Akhil P Oommen wrote:
>> Allow a consumer driver to poll for cx gdsc collapse through Reset
>> framework.
> Would you mind extending this commit message, to allow us to better
> understand what part is really the consumer part
On 12/7/2022 9:15 PM, Ulf Hansson wrote:
> On Wed, 5 Oct 2022 at 11:08, Akhil P Oommen wrote:
>> Add a reset op compatible function to poll for gdsc collapse. This is
>> required because:
>> 1. We don't wait for it to turn OFF at hardware for VOTABLE GDSCs.
>> 2. There is no way for client dri
On 12/8/2022 7:10 PM, Ulf Hansson wrote:
> On Wed, 7 Dec 2022 at 17:55, Bjorn Andersson wrote:
>> On Wed, Dec 07, 2022 at 05:00:51PM +0100, Ulf Hansson wrote:
>>> On Thu, 1 Dec 2022 at 23:57, Bjorn Andersson wrote:
On Wed, Oct 05, 2022 at 02:36:58PM +0530, Akhil P Oommen wrote:
@Ulf, Ak
i.MX8MP uses 3 clocks, so soften the restrictions for clocks & clock-names.
This SoC requires a power-domain for this peripheral to use. Add it as
a required property.
Fixes: f5419cb0743f ("dt-bindings: lcdif: Add compatible for i.MX8MP")
Signed-off-by: Alexander Stein
---
Changes in v3:
* Remove
On Tue, Dec 06, 2022 at 05:40:54PM +, Matthew Auld wrote:
On 01/12/2022 18:43, Niranjana Vishwanathapura wrote:
On Thu, Dec 01, 2022 at 07:27:31AM -0800, Niranjana Vishwanathapura wrote:
On Thu, Dec 01, 2022 at 10:49:15AM +, Matthew Auld wrote:
On 29/11/2022 07:26, Niranjana Vishwanath
On Wed, 7 Dec 2022 at 17:55, Bjorn Andersson wrote:
>
> On Wed, Dec 07, 2022 at 05:00:51PM +0100, Ulf Hansson wrote:
> > On Thu, 1 Dec 2022 at 23:57, Bjorn Andersson wrote:
> > >
> > > On Wed, Oct 05, 2022 at 02:36:58PM +0530, Akhil P Oommen wrote:
> > > >
> > >
> > > @Ulf, Akhil has a power-doma
On 12/8/22 07:31, Alexander Stein wrote:
Hello Marek,
Am Mittwoch, 7. Dezember 2022, 16:59:50 CET schrieb Marek Vasut:
On 12/7/22 16:13, Alexander Stein wrote:
i.MX8MP uses 3 clocks, so soften the restrictions for clocks &
clock-names.
Fixes: f5419cb0743f ("dt-bindings: lcdif: Add compatible
On Thu, Dec 08, 2022 at 02:54:45PM +0200, Andy Shevchenko wrote:
> On Wed, Nov 30, 2022 at 03:48:35PM +0200, Andy Shevchenko wrote:
> > Some of the existing users, and definitely will be new ones, want to
> > count existing nodes in the list. Provide a generic API for that by
> > moving code from i
On Wed, Nov 30, 2022 at 03:48:35PM +0200, Andy Shevchenko wrote:
> Some of the existing users, and definitely will be new ones, want to
> count existing nodes in the list. Provide a generic API for that by
> moving code from i915 to list.h.
Greg, I believe this one is ready to be taken. Or please
On 03 12月 22 18:22:51, Cai Huoqing wrote:
> Commit 399516ab0fee ("MAINTAINERS: Add a bunch of legacy (UMS) DRM drivers")
> marked these drivers obsolete 7 years ago.
> And the mesa UMD of these drm drivers already in deprecated list
> in the link: https://docs.mesa3d.org/systems.html
>
> 3dfx Glid
On 08.12.2022 12:32, Jagan Teki wrote:
> On Tue, Dec 6, 2022 at 2:32 PM Frieder Schrempf
> wrote:
>> On 05.12.22 16:37, Frieder Schrempf wrote:
>>> Hi Dave,
>>>
>>> On 05.12.22 16:20, Dave Stevenson wrote:
Hi Frieder
On Mon, 5 Dec 2022 at 07:30, Frieder Schrempf
wrote:
> O
There is a spelling mistake in the struct field dram_clk_chanage. Fix it.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c | 8
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 2 +-
.../drm/amd/display/dc/dcn10/dcn10_hw_sequencer_de
On Wed, Dec 07, 2022 at 10:23:21AM -0300, Maíra Canal wrote:
> Replace the use of drm_debugfs_create_files() with the new
> drm_debugfs_add_files() function in all DRM core files, centering the
> debugfs files management on the drm_device instead of drm_minor.
>
> Signed-off-by: Maíra Canal
Revie
On Wed, Dec 07, 2022 at 10:23:20AM -0300, Maíra Canal wrote:
> Introduce the ability to track requests for the addition of DRM debugfs
> files at any time and have them added all at once during
> drm_dev_register().
>
> Drivers can add DRM debugfs files to a device-managed list and, during
> drm_d
On Wed, Dec 07, 2022 at 10:23:22AM -0300, Maíra Canal wrote:
> Currently, vc4 has its own debugfs infrastructure that adds the debugfs
> files on drm_dev_register(). With the introduction of the new debugfs,
> functions, replace the vc4 debugfs structure with the DRM debugfs
> device-centered funct
Hi Jiasheng,
I appreciate the effort you have put into this and I find nothing wrong with the
intention of the patch. However, I don't intend to move base from being the
first
member of the malidp_mw_connector_state struct as it has other benefits in the
code
and we can use container_of() in imp
Den 08.12.2022 09.15, skrev Thomas Zimmermann:
> Hi
>
> Am 07.12.22 um 20:51 schrieb Noralf Trønnes via B4 Submission Endpoint:
>> From: Noralf Trønnes
>>
>> Add missing vmalloc.h include.
>>
>> Fixes: c17d048609bf ("drm/gud: Use the shadow plane helper")
>> Reported-by: kernel test robot
>>
On Tue, Dec 6, 2022 at 2:32 PM Frieder Schrempf
wrote:
>
> On 05.12.22 16:37, Frieder Schrempf wrote:
> > Hi Dave,
> >
> > On 05.12.22 16:20, Dave Stevenson wrote:
> >> Hi Frieder
> >>
> >> On Mon, 5 Dec 2022 at 07:30, Frieder Schrempf
> >> wrote:
> >>>
> >>> On 02.12.22 15:55, Dave Stevenson wro
The IPC driver is used to send and receive messages to/from firmware
running on the VPU.
The only supported IPC message format is Job Submission Model (JSM)
defined in vpu_jsm_api.h header.
Co-developed-by: Andrzej Kacprowski
Signed-off-by: Andrzej Kacprowski
Co-developed-by: Krystian Pradzynsk
- Implement cold and warm firmware boot flows
- Add hang recovery support
- Add runtime power management support
Co-developed-by: Krystian Pradzynski
Signed-off-by: Krystian Pradzynski
Signed-off-by: Jacek Lawrynowicz
---
drivers/accel/ivpu/Makefile | 3 +-
drivers/accel/ivpu/ivpu
Read, parse and boot VPU firmware image.
Co-developed-by: Andrzej Kacprowski
Signed-off-by: Andrzej Kacprowski
Co-developed-by: Krystian Pradzynski
Signed-off-by: Krystian Pradzynski
Signed-off-by: Jacek Lawrynowicz
---
drivers/accel/ivpu/Makefile | 1 +
drivers/accel/ivpu/ivpu_drv.c
Adds four types of GEM-based BOs for the VPU:
- shmem
- userptr
- internal
- prime
All types are implemented as struct ivpu_bo, based on
struct drm_gem_object. VPU address is allocated when buffer is created
except for imported prime buffers that allocate it in BO_INFO IOCTL due
to missing
Each of the user contexts has two command queues, one for compute engine
and one for the copy engine. Command queues are allocated and registered
in the device when the first job (command buffer) is submitted from
the user space to the VPU device. The userspace provides a list of
GEM buffer object
DULE_LICENSE("GPL and additional rights");
+MODULE_VERSION(DRIVER_VERSION_STR);
diff --git a/drivers/accel/ivpu/ivpu_drv.h b/drivers/accel/ivpu/ivpu_drv.h
new file mode 100644
index ..4f859e7ac09e
--- /dev/null
+++ b/drivers/accel/ivpu/ivpu_drv.h
@@ -0,0 +1,162 @@
+/* S
xa_destroy(&vdev->context_xa);
diff --git a/drivers/accel/ivpu/ivpu_drv.h b/drivers/accel/ivpu/ivpu_drv.h
index 4f859e7ac09e..6e8b88068fc9 100644
--- a/drivers/accel/ivpu/ivpu_drv.h
+++ b/drivers/accel/ivpu/ivpu_drv.h
@@ -15,6 +15,8 @@
#include
#include
+#include "ivpu_m
Hi,
This patchset contains a new Linux* Kernel Driver for Intel® VPUs.
VPU stands for Versatile Processing Unit and it is an AI inference accelerator
integrated with Intel non-server CPUs starting from 14th generation.
VPU enables efficient execution of Deep Learning applications
like object dete
On 12/8/22 06:47, Maxime Ripard wrote:
> The command-line can be expressed using a code-block, and we were
> missing which architectures were available.
>
> Suggested-by: Maíra Canal
> Signed-off-by: Maxime Ripard
> ---
Reviewed-by: Maíra Canal
Best Regards,
- Maíra Canal
> Documentation/gp
On 08/12/2022 10:45, Alexander Stein wrote:
> i.MX8MP uses 3 clocks, so soften the restrictions for clocks & clock-names.
> This SoC requires a power-domain for this peripheral to use. Add it as
> a required property.
>
> Fixes: f5419cb0743f ("dt-bindings: lcdif: Add compatible for i.MX8MP")
> Sig
The command-line can be expressed using a code-block, and we were
missing which architectures were available.
Suggested-by: Maíra Canal
Signed-off-by: Maxime Ripard
---
Documentation/gpu/vc4.rst | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/gpu/vc4.rst
i.MX8MP uses 3 clocks, so soften the restrictions for clocks & clock-names.
This SoC requires a power-domain for this peripheral to use. Add it as
a required property.
Fixes: f5419cb0743f ("dt-bindings: lcdif: Add compatible for i.MX8MP")
Signed-off-by: Alexander Stein
---
Changes in v2:
* Squash
Just some small comments and questions below.
On 08/12/2022 05:01, Alan Previn wrote:
Starting with MTL, there will be two GT-tiles, a render and media
tile. PXP as a service for supporting workloads with protected
contexts and protected buffers can be subscribed by process
workloads on any ti
On Mon, 5 Dec 2022 17:33:22 +, Dave Stevenson wrote:
> Changes from v3
> - Add patch to remove use of drm_bridge_chain from the MTK DP driver, copying
> the
> same pattern as Sam used for ps8640.
> - Add comment for why we update the bridge pointer in
> drm_atomic_bridge_chain_post_disable
On Thu, 01 Dec 2022 16:11:31 +0100, Maxime Ripard wrote:
> This series introduce Kunit tests to the vc4 KMS driver, but unlike what we
> have been doing so far in KMS, it actually tests the atomic modesetting code.
>
> In order to do so, I've had to improve a fair bit on the Kunit helpers already
On 08/12/2022 09:50, Alexander Stein wrote:
> Hello Krzysztof,
>
> Am Donnerstag, 8. Dezember 2022, 09:25:31 CET schrieb Krzysztof Kozlowski:
>> On 08/12/2022 06:59, Alexander Stein wrote:
>>> Am Mittwoch, 7. Dezember 2022, 17:00:22 CET schrieb Marek Vasut:
On 12/7/22 16:14, Alexander Stein w
Hello Krzysztof,
Am Donnerstag, 8. Dezember 2022, 09:25:31 CET schrieb Krzysztof Kozlowski:
> On 08/12/2022 06:59, Alexander Stein wrote:
> > Am Mittwoch, 7. Dezember 2022, 17:00:22 CET schrieb Marek Vasut:
> >> On 12/7/22 16:14, Alexander Stein wrote:
> >>> i.MX8MP requires a power-domain for thi
Hi,
Here's this week drm-misc-next-fixes PR
All of those patches seems to have been applied to both drm-misc-next
and drm-misc-next-fixes and were part of the final drm-misc-next PR for
6.2.
So we shouldn't have any new patch per se, but it aligns all our
branches and fixes this odd situation.
On 08/12/2022 06:59, Alexander Stein wrote:
> Am Mittwoch, 7. Dezember 2022, 17:00:22 CET schrieb Marek Vasut:
>> On 12/7/22 16:14, Alexander Stein wrote:
>>> i.MX8MP requires a power-domain for this peripheral to use. Add it as
>>> an optional property.
>>>
>>> Signed-off-by: Alexander Stein
>>>
Hi
Am 07.12.22 um 20:51 schrieb Noralf Trønnes via B4 Submission Endpoint:
From: Noralf Trønnes
Add missing vmalloc.h include.
Fixes: c17d048609bf ("drm/gud: Use the shadow plane helper")
Reported-by: kernel test robot
Signed-off-by: Noralf Trønnes
Reviewed-by: Thomas Zimmermann
The mis
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