From: tangchunyou
of the low 8 bits.
Signed-off-by: tangchunyou
---
drivers/gpu/drm/panfrost/panfrost_gpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c
b/drivers/gpu/drm/panfrost/panfrost_gpu.c
index 1fffb6a0b24f..d2d287bbf4e7 10
Am 25.05.21 um 10:25 schrieb Baokun Li:
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/nouveau/nouveau_bo.c: In function 'nouveau_ttm_tt_populate':
drivers/gpu/drm/nouveau/nouveau_bo.c:1258:17: warning:
variable ‘dev’ set but not used [-Wunused-but-set-variable]
drivers/gpu/dr
There is a compiling error in disp.c while not selecting
CONFIG_DRM_NOUVEAU_BACKLIGHT:
drivers/gpu/drm/nouveau/dispnv50/disp.c: In function ‘nv50_sor_atomic_disable’:
drivers/gpu/drm/nouveau/dispnv50/disp.c:1665:52: error:
‘struct nouveau_connector’ has no member named ‘backlight’
1665 | struct
On 2021/6/9 15:46, Thomas Zimmermann wrote:
Hi
Am 09.06.21 um 04:49 schrieb Pu Lehui:
Fixes gcc '-Wunused-const-variable' warning:
drivers/gpu/drm/hyperv/hyperv_drm_modeset.c:152:23: warning:
'hyperv_modifiers' defined but not used [-Wunused-const-variable=]
Signed-off-by: Pu Lehui
There were still a race condition between hpd work and suspend, since
the workqueue work can still be run after anx7625 had powered off in
suspend.
Since we never want hpd work to run while suspending, and there's no
harm to delay them to be run after resume, mark the workqueue as
WQ_FREEZABLE so
On 6/14/2021 8:38 PM, Christoph Hellwig wrote:
really_probe tries to special case errors from ->probe, but due to all
other initialization added to the function over time now a lot of
internal errors hit that code path as well. Untangle that by adding
a new probe_err local variable and apply
The LS1028A SoC errata sheet mentions A-050121 "GPU hangs if clock
gating for Rasterizer, Setup Engine and Texture Engine are enabled".
The workaround is to disable the corresponding clock gatings.
Signed-off-by: Michael Walle
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 6 ++
1 file changed,
There is a gcc '-Wunused-const-variable' warning:
drivers/gpu/drm/hyperv/hyperv_drm_modeset.c:152:23: warning:
'hyperv_modifiers' defined but not used [-Wunused-const-variable=]
while the variable should be used in drm_simple_display_pipe_init()
as suggested by Thomas, let's fix it.
Fixes:
Jason,
I couldn't find patch 1,2,4 and 5 of these series. Can you please keep
k...@vger.kernel.org cc for all patches?
Also it will be helpful if you can add version prefix, eg. 'v3' for this
series, in subject line.
Thanks,
Kirti
On 6/8/2021 6:25 AM, Jason Gunthorpe wrote:
This is a "v3"
Hi,
We are observing some user-space crashes (sigabort, segfaults etc.)
under moderate memory pressure (pretty far from severe pressure) which
have one thing in common - restrictive GFP mask in setup_scratch_page().
For instance, (stable 4.19) drivers/gpu/drm/i915/i915_gem_gtt.c
(trimmed down ve
The GPU is found on the NXP LS1028A SoC. The feature bits are taken from
the NXP downstream kernel driver 6.4.3.p1.
Signed-off-by: Michael Walle
---
drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 31 ++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/etnaviv/etna
On 2021/6/14 22:01, Deepak Rawat wrote:
On Wed, 2021-06-09 at 09:46 +0200, Thomas Zimmermann wrote:
Hi
Am 09.06.21 um 04:49 schrieb Pu Lehui:
Fixes gcc '-Wunused-const-variable' warning:
drivers/gpu/drm/hyperv/hyperv_drm_modeset.c:152:23: warning:
'hyperv_modifiers' defined but no
This is the first step to bring GPU support to the NXP LS1028A SoC. It
features a Mali DP500, a Vivante GC7000 and has one DisplayPort output
which is driven by a Cadence MHDP controller and PHY.
This was briefly tested with glmark2, a patched mesa kmsro driver to
support the mali DP500/GC7000 duo
From: tangchunyou
of the low 8 bits.
Signed-off-by: tangchunyou
---
drivers/gpu/drm/panfrost/panfrost_gpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c
b/drivers/gpu/drm/panfrost/panfrost_gpu.c
index 1fffb6a0b24f..d2d287bbf4e7 10
On Mon, Jun 14, 2021 at 05:08:36PM +0200, Christoph Hellwig wrote:
> This is my alternative take on this series from Jason:
>
> https://lore.kernel.org/dri-devel/87czsszi9i@redhat.com/T/
>
> The mdev/vfio parts are exactly the same, but this solves the driver core
> changes for the direct pro
On Mon, Jun 14, 2021 at 05:08:41PM +0200, Christoph Hellwig wrote:
> From: Jason Gunthorpe
>
> This is intended as a replacement API for device_bind_driver(). It has at
> least the following benefits:
>
> - Internal locking. Few of the users of device_bind_driver() follow the
> locking rules
>
On Mon, Jun 14, 2021 at 05:08:39PM +0200, Christoph Hellwig wrote:
> Currently really_probe() returns 1 on success and 0 if the probe() call
> fails. This return code arrangement is designed to be useful for
> __device_attach_driver() which is walking the device list and trying every
> driver. 0 me
On Mon, Jun 14, 2021 at 05:08:38PM +0200, Christoph Hellwig wrote:
> really_probe tries to special case errors from ->probe, but due to all
> other initialization added to the function over time now a lot of
> internal errors hit that code path as well. Untangle that by adding
> a new probe_err lo
On Mon, Jun 14, 2021 at 05:08:37PM +0200, Christoph Hellwig wrote:
> From: Jason Gunthorpe
>
> Checking if the dev is dead or if the dev is already bound is a required
> precondition to invoking driver_probe_device(). All the call chains
> leading here duplicate these checks.
>
> Add it directly
[Public]
Thanks Lyude for the review!
For the 1st patch, it's trying to fix the patch
7617e9621bf2 ("drm/dp_mst: clear time slots for ports invalid").
As for the 2nd one, it's my first time to test on this hub and I not
yet know the exact regression point. I'm also not quite sure if this
regress
On Mon, Jun 14, 2021 at 2:16 PM Christoph Hellwig wrote:
>
> On Fri, Jun 11, 2021 at 11:26:46PM +0800, Claire Chang wrote:
> > + spin_lock_init(&mem->lock);
> > + for (i = 0; i < mem->nslabs; i++) {
> > + mem->slots[i].list = IO_TLB_SEGSIZE - io_tlb_offset(i);
> > +
This needs a fixes tag:
Fixes: 6eca310e8924 ("drm/nouveau/kms/nv50-: Add basic DPCD backlight
support for nouveau")
with that fixed:
Reviewed-by: Lyude Paul
On Tue, 2021-06-15 at 11:16 +0800, Chen Jiahao wrote:
> There is a compiling error in disp.c while not selecting
> CONFIG_DRM_NO
On Mon, Jun 14, 2021 at 06:05:19PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 6/8/2021 12:17 PM, Matthew Brost wrote:
> > The submission tasklet operates on i915_sched_engine, thus it is the
> > correct place for it.
> >
> > v3:
> > (Jason Ekstrand)
> >Change sched_engine->engine to a v
On Saturday, 12 June 2021 1:01:42 AM AEST Peter Xu wrote:
> On Fri, Jun 11, 2021 at 01:43:20PM +1000, Alistair Popple wrote:
> > On Friday, 11 June 2021 11:00:34 AM AEST Peter Xu wrote:
> > > On Fri, Jun 11, 2021 at 09:17:14AM +1000, Alistair Popple wrote:
> > > > On Friday, 11 June 2021 9:04:19 AM
This patch ensures that the device's master mutex is acquired before
accessing pointers to struct drm_master that are subsequently
dereferenced. Without the mutex, the struct drm_master may be freed
concurrently by another process calling drm_setmaster_ioctl(). This
could then lead to use-after-fre
While checking the master status of the DRM file in
drm_is_current_master(), the device's master mutex should be
held. Without the mutex, the pointer fpriv->master may be freed
concurrently by another process calling drm_setmaster_ioctl(). This
could lead to use-after-free errors when the pointer i
This patch series addresses potential use-after-free errors when dereferencing
pointers to struct drm_master. These were identified after one such bug was
caught by Syzbot in drm_getunique():
https://syzkaller.appspot.com/bug?id=148d2f1dfac64af52ffd27b661981a540724f803
The series is broken up in
On Mon, Jun 14, 2021 at 01:12:56PM +0300, Laurent Pinchart wrote:
> Hi Xin,
>
> Thank you for the patch.
>
> On Fri, Jun 11, 2021 at 05:13:33PM +0800, Xin Ji wrote:
> > Add MIPI rx DPI input feature support.
>
> Could you expand the commit message to explain what this feature is ?
Hi Laurent Pin
On 15/6/21 3:41 am, Emil Velikov wrote:
On Sat, 12 Jun 2021 at 13:55, Desmond Cheong Zhi Xi
wrote:
This patch ensures that the device's master mutex is acquired before
accessing pointers to struct drm_master that are subsequently
dereferenced. Without the mutex, the struct drm_master may be fr
ping
在 2021/5/15 17:01, Baokun Li 写道:
From: "libaok...@huawei.com"
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/nouveau/dispnv50/disp.c: In function 'nv50_mstm_cleanup':
drivers/gpu/drm/nouveau/dispnv50/disp.c:1389:6: warning:
variable ‘ret’ set but not used [-Wunused-but-
ping
在 2021/5/31 10:38, Baokun Li 写道:
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/nouveau/nouveau_svm.c: In function 'nouveau_pfns_map':
drivers/gpu/drm/nouveau/nouveau_svm.c:814:6: warning:
variable ‘ret’ set but not used [-Wunused-but-set-variable]
It never used since in
ping
在 2021/5/27 16:59, Baokun Li 写道:
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/video/fbdev/intelfb/intelfb_i2c.c: In function 'intelfb_gpio_setscl':
drivers/video/fbdev/intelfb/intelfb_i2c.c:58:6: warning:
variable ‘val’ set but not used [-Wunused-but-set-variable]
drivers/video
ping
在 2021/5/25 16:25, Baokun Li 写道:
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/nouveau/nouveau_bo.c: In function 'nouveau_ttm_tt_populate':
drivers/gpu/drm/nouveau/nouveau_bo.c:1258:17: warning:
variable ‘dev’ set but not used [-Wunused-but-set-variable]
drivers/gpu/drm
ping
在 2021/5/25 16:17, Baokun Li 写道:
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/nouveau/nouveau_display.c: In function
'nouveau_framebuffer_new':
drivers/gpu/drm/nouveau/nouveau_display.c:309:15: warning:
variable ‘width’ set but not used [-Wunused-but-set-variable]
It
drivers/video/backlight/rave-sp-backlight.c: linux/backlight.h is included more
than once.
drivers/video/backlight/lm3639_bl.c: linux/backlight.h is included more than
once.
drivers/video/backlight/kb3886_bl.c: linux/backlight.h is included more than
once.
drivers/video/backlight/da9052_bl.c: li
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git tmp.tmp2
head: adcceb5eb7aee38e4a9c15bdf599655f0e1b1324
commit: 3fb8658426ac271948eb757e1c5a5554afdc5cf8 [302/364] sched/headers, fb:
Simplify dependencies
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
If you fix the issue, kindly a
On 6/8/2021 12:17 PM, Matthew Brost wrote:
The submission tasklet operates on i915_sched_engine, thus it is the
correct place for it.
v3:
(Jason Ekstrand)
Change sched_engine->engine to a void* private data pointer
Add kernel doc
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i9
On 6/8/2021 12:17 PM, Matthew Brost wrote:
Rather than touching execlist specific structures in the generic
scheduling code, add a callback function in the backend.
I think this could do with a better wording to explain the reasoning
more, something like: "Not all back-ends require a kick a
On 6/8/2021 12:17 PM, Matthew Brost wrote:
The schedule function should be in the schedule object.
v3:
(Jason Ekstrand)
Add kernel doc
Signed-off-by: Matthew Brost
Reviewed-by: Daniele Ceraolo Spurio
Daniele
---
drivers/gpu/drm/i915/gem/i915_gem_wait.c | 4 ++--
drive
On 6/8/2021 12:17 PM, Matthew Brost wrote:
Move active request tracking and its lock to i915_sched_engine. This
lock is also the submission lock so having it in the i915_sched_engine
is the correct place.
v3:
(Jason Ekstrand)
Add kernel doc
Signed-off-by: Matthew Brost
Reviewed-by: D
On 6/8/2021 12:17 PM, Matthew Brost wrote:
Introduce i915_sched_engine object which is lower level data structure
that i915_scheduler / generic code can operate on without touching
execlist specific structures. This allows additional submission backends
to be added without breaking the layerin
On Mon, Jun 14, 2021 at 05:08:40PM +0200, Christoph Hellwig wrote:
> @@ -679,8 +666,6 @@ static int really_probe(struct device *dev, struct
> device_driver *drv)
> dev->pm_domain->dismiss(dev);
> pm_runtime_reinit(dev);
> dev_pm_set_driver_flags(dev, 0);
> - if (prob
Hi Noralf,
On Mon, Mar 29, 2021 at 8:01 PM Noralf Trønnes wrote:
> There'a limit to how big a kmalloc buffer can be, and as memory gets
> fragmented it becomes more difficult to get big buffers. The downside of
> smaller buffers is that the driver has to split the transfer up which
> hampers per
On Mon, Mar 29, 2021 at 8:01 PM Noralf Trønnes wrote:
> Free transfer and compression buffers on device removal instead of at
> DRM device removal time. This ensures that the usual 2x8MB buffers are
> released when the device is unplugged and not kept around should
> userspace keep the DRM device
On Sat, 12 Jun 2021 at 13:55, Desmond Cheong Zhi Xi
wrote:
>
> This patch ensures that the device's master mutex is acquired before
> accessing pointers to struct drm_master that are subsequently
> dereferenced. Without the mutex, the struct drm_master may be freed
> concurrently by another proces
As part of enabling GuC submission [1] we need to update to the latest
and greatest firmware. This series does that. All backwards
compatibility breaking changes squashed into a single patch #2. Same
series sent to trybot [2] forcing GuC to be enabled to ensure we haven't
broke something.
v2: Addr
From: Michal Wajdeczko
New GuC firmware will unify format of MMIO and CTB H2G messages.
Introduce their definitions now to allow gradual transition of
our code to match new changes.
Signed-off-by: Matthew Brost
Signed-off-by: Michal Wajdeczko
Cc: Michał Winiarski
Reviewed-by: Daniele Ceraolo
From: Michal Wajdeczko
Most of the changes to the 62.0.0 firmware revolved around CTB
communication channel. Conform to the new (stable) CTB protocol.
Signed-off-by: John Harrison
Signed-off-by: Michal Wajdeczko
Signed-off-by: Matthew Brost
---
.../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h |
From: Michal Wajdeczko
GuC ABI documentation is now ready to be included in i915.rst
Signed-off-by: Michal Wajdeczko
Signed-off-by: Matthew Brost
Cc: Piotr Piórkowski
Reviewed-by: Matthew Brost
---
Documentation/gpu/i915.rst | 8
1 file changed, 8 insertions(+)
diff --git a/Docume
On Sat, 12 Jun 2021 at 13:55, Desmond Cheong Zhi Xi
wrote:
>
> While checking the master status of the DRM file in
> drm_is_current_master(), the device's master mutex should be
> held. Without the mutex, the pointer fpriv->master may be freed
> concurrently by another process calling drm_setmaste
On 6/9/2021 9:36 PM, Matthew Brost wrote:
From: Michal Wajdeczko
Format of the CTB messages has changed:
- support for multiple formats
- message fence is now part of the header
- reuse of unified HXG message formats
v2:
(Daniele)
- Better comment in ct_write()
Signed-off-by: Mi
On 6/9/2021 9:36 PM, Matthew Brost wrote:
From: Michal Wajdeczko
Definition of the CTB registration action has changed.
Add some ABI documentation and implement required changes.
v2:
(Checkpoint)
- Fix warnings
(Daniele)
- Drop FIXME
(John H)
- Drop value in kernel doc, just
On 6/9/2021 9:36 PM, Matthew Brost wrote:
From: Michal Wajdeczko
Definition of the CTB descriptor has changed, leaving only
minimal shared fields like HEAD/TAIL/STATUS.
Both HEAD and TAIL are now in dwords.
Add some ABI documentation and implement required changes.
v2:
(Daniele)
- Dr
The SPI access to s6e63m0 is using the DBI protocol, so switch
to using the elaborate DBI protocol implementation in the DRM
DBI helper library.
Acked-by: Noralf Trønnes
Reviewed-by: Douglas Anderson
Signed-off-by: Linus Walleij
---
ChangeLog v1->v2:
- Drop two debug prints
- Drop development a
Implement SPI reads for typec1, for SPI controllers that
can support 9bpw in addition to 8bpw (such as GPIO bit-banged
SPI).
9bpw emulation is not supported but we have to start with
something.
This is used by s6e63m0 to read display MTP information
which is used by the driver for backlight contr
On 6/9/2021 9:36 PM, Matthew Brost wrote:
From: Michal Wajdeczko
The MMIO based Host-to-GuC communication protocol has been
updated to use unified HXG messages.
Update our intel_guc_send_mmio() function by correctly handle
BUSY, RETRY and FAILURE replies. Also update our documentation.
Sin
Hi Marek,
Thank you for the patch.
On Wed, Jun 02, 2021 at 10:37:30PM +0200, Marek Vasut wrote:
> Decoder input LVDS format is a property of the decoder chip or even
> its strapping. Add DT property data-mapping the same way lvds-panel
> does, to define the LVDS data mapping.
>
> Signed-off-by:
Hi Marek,
On Tue, May 25, 2021 at 12:38:47PM +0200, Marek Vasut wrote:
> On 5/18/21 1:03 AM, Laurent Pinchart wrote:
>
> Hi,
>
> [...]
>
> >> @@ -69,10 +70,33 @@ static void lvds_codec_disable(struct drm_bridge
> >> *bridge)
> >>"Failed to disable regulator \"vcc\": %d\n",
On 6/14/21 6:26 PM, Thomas Hellström wrote:
From: Ramalingam C
Invokes the pipelined page migration through blt, for
i915_ttm_move requests of eviction and also obj clear.
Signed-off-by: Ramalingam C
---
v2:
- subfunction for accel_move (Thomas)
- engine_pm_get/put around context_move/c
On Thu 10 Jun 16:44 CDT 2021, Rob Clark wrote:
> From: Rob Clark
>
> Add, via the adreno-smmu-priv interface, a way for the GPU to request
> the SMMU to stall translation on faults, and then later resume the
> translation, either retrying or terminating the current translation.
>
> This will be
On Thu 10 Jun 16:44 CDT 2021, Rob Clark wrote:
> From: Jordan Crouse
>
> Use the new adreno-smmu-priv fault info function to get more SMMU
> debug registers and print the current TTBR0 to debug per-instance
> pagetables and figure out which GPU block generated the request.
>
Acked-by: Bjorn An
Drop the workaround and instead implement a better solution.
Basically we are now chaining all submissions using a dma_fence_chain
container and adding them as exclusive fence to the dma_resv object.
This way other drivers can still sync to the single exclusive fence
while amdgpu only sync to fen
Unwrap the explicit fence if it is a dma_fence_chain and
sync to the first fence not matching the owner rules.
Signed-off-by: Christian König
Acked-by: Daniel Vetter
---
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 118 +--
1 file changed, 68 insertions(+), 50 deletions(-)
di
After a TTM move or object init we need to update the i915 gem flags and
caching settings to reflect the new placement. Currently caching settings
are not changed during the lifetime of an object, although that might
change moving forward if we run into performance issues or issues with
WC system p
The object ops i915_GEM_OBJECT_HAS_IOMEM and the object
I915_BO_ALLOC_STRUCT_PAGE flags are considered immutable by
much of our code. Introduce a new mem_flags member to hold these
and make sure checks for these flags being set are either done
under the object lock or with pages properly pinned. Th
For discrete, use TTM for both cached and WC system memory. That means
we currently rely on the TTM memory accounting / shrinker. For cached
system memory we should consider remaining shmem-backed, which can be
implemented from our ttm_tt_populate callback. We can then also reuse our
own very elabo
Instead of relying on a static placement, calculate at get_pages() time.
This should work for LMEM regions and system for now. For stolen we need
to take preallocated range into account. That will if needed be added
later.
Signed-off-by: Thomas Hellström
Reviewed-by: Matthew Auld
---
v2:
- Fixed
Early implementation of moving system memory for discrete cards over to
TTM. We first add the notion of objects being migratable under the object
lock to i915 gem, and add some asserts to verify that objects are either
locked or pinned when the placement is checked by the gem code.
Patch 2 and 3 d
On Thu 10 Jun 16:44 CDT 2021, Rob Clark wrote:
> From: Jordan Crouse
>
> Add a callback in adreno-smmu-priv to read interesting SMMU
> registers to provide an opportunity for a richer debug experience
> in the GPU driver.
>
> Signed-off-by: Jordan Crouse
> Signed-off-by: Rob Clark
I presume
On Thu 10 Jun 16:44 CDT 2021, Rob Clark wrote:
> From: Jordan Crouse
>
> Call report_iommu_fault() to allow upper-level drivers to register their
> own fault handlers.
>
> Signed-off-by: Jordan Crouse
> Signed-off-by: Rob Clark
> Acked-by: Will Deacon
Reviewed-by: Bjorn Andersson
Regards,
Am 11.06.21 um 16:55 schrieb Daniel Vetter:
On Fri, Jun 11, 2021 at 04:53:11PM +0200, Christian König wrote:
Am 11.06.21 um 16:47 schrieb Daniel Vetter:
On Fri, Jun 11, 2021 at 02:02:57PM +0200, Christian König wrote:
As the name implies if testing all fences is requested we
should indeed tes
As long as we can figure out who touched to a certain sync object last
that would indeed work, yes.
Christian.
Am 14.06.21 um 19:10 schrieb Marek Olšák:
The call to the hw scheduler has a limitation on the size of all
parameters combined. I think we can only pass a 32-bit sequence number
and
The call to the hw scheduler has a limitation on the size of all parameters
combined. I think we can only pass a 32-bit sequence number and a ~16-bit
global (per-GPU) syncobj handle in one call and not much else.
The syncobj handle can be an element index in a global (per-GPU) syncobj
table and it
On 6/9/2021 9:36 PM, Matthew Brost wrote:
From: Michal Wajdeczko
New GuC firmware will unify format of MMIO and CTB H2G messages.
Introduce their definitions now to allow gradual transition of
our code to match new changes.
Signed-off-by: Matthew Brost
Signed-off-by: Michal Wajdeczko
Cc:
Den 14.06.2021 17.49, skrev Doug Anderson:
> Hi,
>
> On Fri, Jun 11, 2021 at 2:29 PM Linus Walleij
> wrote:
>>
>> +static int mipi_dbi_typec1_command_read(struct mipi_dbi *dbi, u8 *cmd,
>> + u8 *data, size_t len)
>> +{
>> + struct spi_device *spi =
On 14/06/2021 17:26, Thomas Hellström wrote:
It's unused with the exception of selftest. Replace a call in the
memory_region live selftest with a call into a corresponding
function in the new migrate code.
I guess we do lose some coverage around blitting massively sized GEM
objects using the h
On 6/14/21 6:33 PM, Matthew Auld wrote:
On 14/06/2021 17:26, Thomas Hellström wrote:
It's not used anywhere.
Signed-off-by: Thomas Hellström
We do have to keep igt_client_tiled_blits subtest, it's not related to
the client blitting code and was added afterwards. Not completely sure
why i
On Monday 14 June 2021 13:05:17 Christian König wrote:
> AGP for example doesn't have a dma_address array.
>
> Signed-off-by: Christian König
Fixes NULL pointer dereference in nouveau_bo_sync_for_device on AGP cards.
Tested-by: Ondrej Zary
> ---
> drivers/gpu/drm/nouveau/nouveau_bo.c | 4 ++-
On Mon, Jun 14, 2021 at 04:24:13PM +0100, Liviu Dudau wrote:
> On Mon, Jun 14, 2021 at 05:49:12PM +0300, Pekka Paalanen wrote:
> > On Fri, 11 Jun 2021 13:03:09 +0100
> > Liviu Dudau wrote:
> >
> > > On Fri, Jun 11, 2021 at 08:14:59AM +, Simon Ser wrote:
> > > > On Thursday, June 10th, 2021 at
On 14/06/2021 17:26, Thomas Hellström wrote:
It's not used anywhere.
Signed-off-by: Thomas Hellström
We do have to keep igt_client_tiled_blits subtest, it's not related to
the client blitting code and was added afterwards. Not completely sure
why it's in this file.
With that added back,
R
On Mon, Jun 14, 2021 at 10:35:30AM +0200, Zbigniew Kempczyński wrote:
> On Fri, Jun 11, 2021 at 04:54:32AM -0400, Rodrigo Vivi wrote:
> > On Fri, Jun 11, 2021 at 08:09:00AM +0200, Zbigniew Kempczyński wrote:
> > > On Thu, Jun 10, 2021 at 10:36:12AM -0400, Rodrigo Vivi wrote:
> > > > On Thu, Jun 10,
From: Chris Wilson
Update the PTE and emit a clear within a single unpreemptible packet
such that we can schedule and pipeline clears.
Signed-off-by: Chris Wilson
Co-developed-by: Thomas Hellström
Signed-off-by: Thomas Hellström
---
v3:
- Handle engine instances correctly (Reported by Matthew
It's not used anywhere.
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/i915/Makefile | 1 -
.../gpu/drm/i915/gem/i915_gem_client_blt.c| 355 -
.../gpu/drm/i915/gem/i915_gem_client_blt.h| 21 -
.../i915/gem/selftests/i915_gem_client_blt.c | 704 ---
From: Ramalingam C
Invokes the pipelined page migration through blt, for
i915_ttm_move requests of eviction and also obj clear.
Signed-off-by: Ramalingam C
---
v2:
- subfunction for accel_move (Thomas)
- engine_pm_get/put around context_move/clear (Thomas)
- Invalidation at accel_clear (Thom
It's unused with the exception of selftest. Replace a call in the
memory_region live selftest with a call into a corresponding
function in the new migrate code.
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/i915/Makefile | 1 -
.../gpu/drm/i915/gem/i915_gem_object_blt.c
From: Chris Wilson
Set up a default migration context on the GT and use it from the
selftests.
Add a perf selftest and make sure we exercise LMEM if available.
Signed-off-by: Chris Wilson
Co-developed-by: Thomas Hellström
Signed-off-by: Thomas Hellström
Reviewed-by: Matthew Auld
---
v3:
- Sk
From: Chris Wilson
If we pipeline the PTE updates and then do the copy of those pages
within a single unpreemptible command packet, we can submit the copies
and leave them to be scheduled without having to synchronously wait
under a global lock. In order to manage migration, we need to
preallocat
From: Chris Wilson
In the next patch, we will want to write a PTE for an explicit
dma address, outside of the usual vma.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/driv
From: Chris Wilson
Allow internal clients to create and destroy a pinned context.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
---
v2:
- (Thomas) Export also the pinned context destructor
---
drivers/gpu/drm/i915/gt/intel_engine.h| 11 +
drivers/gpu/drm/i915/gt/intel_engi
From: Chris Wilson
In the next patch, we will want to look at the dma addresses of
individual page tables, so add a routine to iterate over them.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 49
drivers/gpu/drm/i
Since the ww transaction endpoint easily end up far out-of-scope of
the objects on the ww object list, particularly for contending lock
objects, make sure we reference objects on the list so they don't
disappear under us.
This comes with a performance penalty so it's been debated whether this
is r
As we're about to add more ww-related functionality,
break out the dma_resv ww locking utilities to their own files
Signed-off-by: Thomas Hellström
Reviewed-by: Matthew Auld
---
v2:
- Make sure filenames are sorted in include file lists and Makefile
(Reported by Matthew Auld)
---
drivers/gpu/
Introduce a for_i915_gem_ww(){} utility to help make the code
around a ww transaction more readable.
Signed-off-by: Thomas Hellström
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/i915_gem_ww.h | 31 +-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git
This patchset implements synchronous accelerated migration and clearing
for i915 on TTM. We plan to follow up with these operations made
asynchronous to the extent of TTM support for that:
A couple of patches from Chris which implement pipelined migration and
clears by atomically writing the PTEs
On Fri, Jun 11, 2021 at 02:34:18PM +0100, Liviu Dudau wrote:
> On Fri, Jun 11, 2021 at 08:56:04AM -0400, Alyssa Rosenzweig wrote:
> > > What I'm expected to see in the future is new functionality that gets
> > > implemented by
> > > one hardware vendor and the kernel developers trying to enable th
On 06/08, Juan A. Suarez Romero wrote:
> The V3D engine has several hardware performance counters that can of
> interest for userspace performance analysis tools.
>
> This exposes new ioctls to create and destroy performance monitor
> objects, as well as to query the counter values.
>
> Each crea
On Fri, Jun 11, 2021 at 07:54:07AM +0200, Maxime Ripard wrote:
> On Thu, Jun 10, 2021 at 11:00:05PM +0200, Daniel Vetter wrote:
> > On Thu, Jun 10, 2021 at 7:47 PM Maxime Ripard wrote:
> > >
> > > New KMS properties come with a bunch of requirements to avoid each
> > > driver from running their ow
On Thu, Jun 10, 2021 at 9:55 AM Pekka Paalanen wrote:
>
> On Tue, 8 Jun 2021 19:43:15 +0200
> Werner Sembach wrote:
>
> > Add a new general drm property "active bpc" which can be used by graphic
> > drivers
> > to report the applied bit depth per pixel back to userspace.
> >
Maybe "bit depth p
Hi,
On Fri, Jun 11, 2021 at 2:44 PM Linus Walleij wrote:
>
> static int s6e63m0_spi_probe(struct spi_device *spi)
> {
> struct device *dev = &spi->dev;
> + struct mipi_dbi *dbi;
> int ret;
>
> - spi->bits_per_word = 9;
> - /* Preserve e.g. SPI_3WIRE setting */
Hi,
On Fri, Jun 11, 2021 at 2:29 PM Linus Walleij wrote:
>
> +static int mipi_dbi_typec1_command_read(struct mipi_dbi *dbi, u8 *cmd,
> + u8 *data, size_t len)
> +{
> + struct spi_device *spi = dbi->spi;
> + u32 speed_hz = min_t(u32, MIPI_DBI_MAX_S
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