Hi, Yongqiang:
Chun-Kuang Hu 於 2020年8月9日 週日 上午8:56寫道:
>
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年8月8日 週六 上午11:04寫道:
> >
> > rdma fifo size may be different even in same SOC, add this
> > property to the corresponding rdma
> >
> > Change-Id: I67635ec7f3f59cf4cbc7737285e5e28ff0ab71c9
>
> Remove c
Hi, Yongqiang:
Yongqiang Niu 於 2020年8月8日 週六 上午11:04寫道:
>
> rdma fifo size may be different even in same SOC, add this
> property to the corresponding rdma
>
> Change-Id: I67635ec7f3f59cf4cbc7737285e5e28ff0ab71c9
Remove change-id.
> Signed-off-by: Yongqiang Niu
> ---
> .../devicetree/bindings/
Yongqiang Niu 於 2020年8月8日 週六 上午11:05寫道:
>
> mmsys is the driver which control the routing of these ddp component,
> so the definition of mtk_ddp_comp_id should be placed in mtk-mmsys.h
>
Reviewed-by: Chun-Kuang Hu
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp_com
Hi, Yongqiang:
This series is 'v8', not 'RESEND v7'
Yongqiang Niu 於 2020年8月8日 週六 上午10:56寫道:
>
> This series are based on 5.8-rc1 and provide 7 patch
> to support mediatek SOC MT8183
>
> Change since v6
> - move ddp component define into mtk_mmsys.h
> - add mmsys private data to support different
Hi, Yongqiang:
Yongqiang Niu 於 2020年8月8日 週六 上午11:05寫道:
>
> This patch add support for mediatek SOC MT8183
> 1. add ovl private data
> 2. add rdma private data
> 3. add mutes private data
> 4. add main and external path module for crtc create
>
> Signed-off-by: Yongqiang Niu
[snip]
> +
> stati
In order to successfully read ID of the MTP panel the
panel MTP control page must be unlocked. Previously
this wasn't encountered because in the setup with this
panel the power wasn't ever really dropped. When power
gets dropped from the panel, MTP needs to be unlocked.
Cc: newby...@protonmail.com
The MCDE DSI link hardware which is modeled like a bridge
in DRM, connected further to the panel bridge, creating
a pipeline.
We have been using the .pre_enable(), .enable(),
.disable() and .post_disable() callbacks from the bridge
to set this up in a chained manner: first the display
controller g
To make sure that the MCDE is in a reasonable state during
set-up, perform a reset by power cycling the block by dropping
the on-chip regulator reference after probe. The display
subsystem (DSS) has no dedicated reset line so dropping
the EPOD regulator is the only real way of resetting it.
We int
The pixel fetcher FIFO depth was just hardcoded to 48
which works fine as long as the framebuffer is 32BPP
and the DSI output is RGB888.
We will need more elaborate handling for some buffer
formats and displays, so start to improve this function
by setting reasonable defaults for 32, 24 and 16 BPP
It is possible to set a flag in the struct mipi_dsi_device
so the panel is handled in low power (LP) mode. Some displays
only support this mode and it is also good for testing.
Cc: newby...@protonmail.com
Cc: Stephan Gerhold
Signed-off-by: Linus Walleij
---
drivers/gpu/drm/mcde/mcde_dsi.c | 10
Hi Vinay,
On Fri, Aug 07, 2020 at 06:22:59PM +0530, Vinay Simha B N wrote:
> Hi All,
>
> Please Review the patch
I'm afraid I won't have time for at least a couple of weeks.
> On Wed, Jul 29, 2020 at 6:01 PM Vinay Simha B N wrote:
>
> > Hi All,
> >
> > Please Review the patch
> >
> > On Fri,
Hi Prabhakar,
Thank you for the patch.
On Fri, Aug 07, 2020 at 06:49:54PM +0100, Lad Prabhakar wrote:
> The iwg21d comes with a 7" capacitive touch screen, therefore
> add support for it.
I can't review most of this properly as I don't have access to the
schematics. Is there a way to get it ?
>
Hi Prabhakar,
Thank you for the patch.
On Fri, Aug 07, 2020 at 06:49:52PM +0100, Lad Prabhakar wrote:
> Add du node to r8a7742 SoC DT. Boards that want to enable the DU
> need to specify the output topology.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-b
Hi Prabhakar,
Thank you for the patch.
On Fri, Aug 07, 2020 at 06:49:53PM +0100, Lad Prabhakar wrote:
> Add LVDS encoder node to r8a7742 SoC DT.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
> ---
> arch/arm/boot/dts/r8a7742.dtsi | 54 +
Hi Prabhakar,
Thank you for the patch.
On Fri, Aug 07, 2020 at 06:49:51PM +0100, Lad Prabhakar wrote:
> The LVDS encoders on RZ/G1H SoC is identical to the R-Car Gen2 family. Add
> support for RZ/G1H (R8A7742) SoC to the LVDS encoder driver.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Maria
On Sun, Aug 09, 2020 at 12:03:27AM +0300, Laurent Pinchart wrote:
> Hi Prabhakar,
>
> Thank you for the patch.
>
> On Fri, Aug 07, 2020 at 06:49:50PM +0100, Lad Prabhakar wrote:
> > Document the RZ/G1H (R8A7742) LVDS bindings.
> >
> > Signed-off-by: Lad Prabhakar
> > Reviewed-by: Marian-Cristia
Hi Prabhakar,
Thank you for the patch.
On Fri, Aug 07, 2020 at 06:49:50PM +0100, Lad Prabhakar wrote:
> Document the RZ/G1H (R8A7742) LVDS bindings.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Laurent Pinchart
> ---
> .../devicetree/bindings/disp
Hi Prabhakar,
Thank you for the patch.
On Fri, Aug 07, 2020 at 06:49:49PM +0100, Lad Prabhakar wrote:
> Add direct support for the r8a7742 (RZ/G1H).
>
> The RZ/G1H shares a common, compatible configuration with the r8a7790
> (R-Car H2) so that device info structure is reused, the only difference
Hi Prabhakar,
Thank you for the patch.
On Fri, Aug 07, 2020 at 06:49:48PM +0100, Lad Prabhakar wrote:
> Document the RZ/G1H (R8A7742) SoC in the R-Car DU bindings.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Laurent Pinchart
> ---
> Documentation
Hi Prabhakar,
Thank you for the patches.
On Fri, Aug 07, 2020 at 06:49:47PM +0100, Lad Prabhakar wrote:
> Hi All,
>
> This patch series adds support for DU and LVDS to r8a7742
> SoC and enables LCD support on r8a7742-iwg21d-q7 board.
>
> This patch series applies on top of [1].
>
> [1] https:/
From: Rob Clark
Backport note: maybe wait some time for the crashdec MR[1] to look for
both the old typo'd name and the corrected name to land in mesa 20.2
[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6242
Fixes: 1707add81551 ("drm/msm/a6xx: Add a6xx gpu state")
Signed-off-by:
On Sat, Aug 8, 2020 at 1:28 PM Greg KH wrote:
>
> On Sat, Aug 08, 2020 at 01:02:34PM +0200, Daniel Vetter wrote:
> > On Sat, Aug 8, 2020 at 12:24 PM Greg KH wrote:
> > >
> > > On Sat, Aug 08, 2020 at 11:13:54AM +0200, Daniel Vetter wrote:
> > > > On Fri, Aug 7, 2020 at 3:54 PM Thomas Zimmermann
VKMS needs vblank interrupts enabled to capture CRC. When vblank is
disabled, tests like kms_cursor_crc and kms_pipe_crc_basic getting stuck
waiting for a capture that will not occur until vkms wakes up. This patch
adds a helper to set composer and ensure that vblank remains enabled as
long as the
On Sat, Aug 08, 2020 at 01:02:34PM +0200, Daniel Vetter wrote:
> On Sat, Aug 8, 2020 at 12:24 PM Greg KH wrote:
> >
> > On Sat, Aug 08, 2020 at 11:13:54AM +0200, Daniel Vetter wrote:
> > > On Fri, Aug 7, 2020 at 3:54 PM Thomas Zimmermann
> > > wrote:
> > > >
> > > > Hi
> > > >
> > > > Am 07.08.2
Hi Vaibhav
On Wed, Aug 05, 2020 at 11:37:12PM +0530, Vaibhav Gupta wrote:
> Drivers using legacy power management .suspen()/.resume() callbacks
> have to manage PCI states and device's PM states themselves. They also
> need to take care of standard configuration registers.
>
> Switch to generic p
Hi Vaibhav
On Wed, Aug 05, 2020 at 11:37:11PM +0530, Vaibhav Gupta wrote:
> Drivers using legacy power management .suspen()/.resume() callbacks
> have to manage PCI states and device's PM states themselves. They also
> need to take care of standard configuration registers.
>
> Switch to generic p
On Sat, Aug 8, 2020 at 12:24 PM Greg KH wrote:
>
> On Sat, Aug 08, 2020 at 11:13:54AM +0200, Daniel Vetter wrote:
> > On Fri, Aug 7, 2020 at 3:54 PM Thomas Zimmermann
> > wrote:
> > >
> > > Hi
> > >
> > > Am 07.08.20 um 15:30 schrieb gre...@linuxfoundation.org:
> > > > The patch below was submit
On Sat, Aug 08, 2020 at 11:13:54AM +0200, Daniel Vetter wrote:
> On Fri, Aug 7, 2020 at 3:54 PM Thomas Zimmermann wrote:
> >
> > Hi
> >
> > Am 07.08.20 um 15:30 schrieb gre...@linuxfoundation.org:
> > > The patch below was submitted to be applied to the 5.8-stable tree.
> > >
> > > I fail to see h
On Wed, Aug 5, 2020 at 4:28 PM Linus Walleij wrote:
> The driver was relying on only prepare()/unprepare() to
> enable/disable the display.
>
> This does not work because prepare() will be called
> before the DSI host/bridge is ready to send any DSI
> commands and disable() will be called after t
Hi Daniel.
On Sat, Aug 08, 2020 at 11:13:54AM +0200, Daniel Vetter wrote:
> On Fri, Aug 7, 2020 at 3:54 PM Thomas Zimmermann wrote:
> >
> > Hi
> >
> > Am 07.08.20 um 15:30 schrieb gre...@linuxfoundation.org:
> > > The patch below was submitted to be applied to the 5.8-stable tree.
> > >
> > > I f
On Fri, Aug 7, 2020 at 3:54 PM Thomas Zimmermann wrote:
>
> Hi
>
> Am 07.08.20 um 15:30 schrieb gre...@linuxfoundation.org:
> > The patch below was submitted to be applied to the 5.8-stable tree.
> >
> > I fail to see how this patch meets the stable kernel rules as found at
> > Documentation/proce
Hi Joe.
On Sun, Aug 02, 2020 at 07:34:13PM +0200, Sam Ravnborg wrote:
> Hi Joe.
>
> On Sun, Aug 02, 2020 at 09:43:59AM -0700, Joe Perches wrote:
> > These functions are now empty and no longer
> > useful so remove the functions and their uses.
> >
> > Signed-off-by: Joe Perches
> > ---
> >
> >
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