On Wed, Jul 31, 2019 at 02:43:42PM +0200, Greg Kroah-Hartman wrote:
> Platform drivers now have the option to have the platform core create
> and remove any needed sysfs attribute files. So take advantage of that
> and do not register "by hand" a bunch of sysfs files.
>
> Cc: Bartlomiej Zolnierki
https://bugs.freedesktop.org/show_bug.cgi?id=110674
--- Comment #79 from ReddestDream ---
>I tried something like that before but a huge portion of the commits in that
>range won't build kernels that can boot (at least on my system).
It's interesting that you found d1a3e239a6016f2bb42a91696056e
On 09/08/2019 13.00, Tomi Valkeinen wrote:
> Here's my version.
>
> From c258309e36fc86076db155aead03a3900b96c3d4 Mon Sep 17 00:00:00 2001
> From: Tomi Valkeinen
> Date: Fri, 9 Aug 2019 09:54:49 +0300
> Subject: [PATCH] drm/omap: ensure we have a valid dma_mask
>
> The omapdrm driver uses dma_
https://bugs.freedesktop.org/show_bug.cgi?id=110674
--- Comment #78 from Chris Hodapp ---
> I don't see anywhere else to go but bisection from 5.0.13 to 5.1. That should
> at least find something . . .
I tried something like that before but a huge portion of the commits in that
range won't buil
https://bugzilla.kernel.org/show_bug.cgi?id=203471
--- Comment #13 from Haxk20 (haxk...@gmail.com) ---
(In reply to Michel Dänzer from comment #12)
> (In reply to vr00m from comment #11)
> > ICYMI, I was able to solve the tearing problem with raven ridge using
> > iommu=soft boot param.
>
> Teari
https://bugs.freedesktop.org/show_bug.cgi?id=102646
--- Comment #103 from reject5...@naver.com ---
I have this problem on Archlinux 5.2.8-arch1-1-ARCH when connected 2
monitors(1920x1080 @ 60Hz) and amdgpu.ppfeaturemask=0x option enabled.
Patch didn't work for me.
My GPU is RX570.
--
Yo
https://bugs.freedesktop.org/show_bug.cgi?id=110674
--- Comment #77 from ReddestDream ---
>I guess, you are good for a bisection if you have a "working" kernel.
This is, based on everything here, I'm not convinced that 5.0.13 has 0 issues.
Only that it seems to have fewer issues. But yeah. I don
https://bugs.freedesktop.org/show_bug.cgi?id=110674
--- Comment #76 from Sylvain BERTRAND ---
> Unfortunately, it does look like going through and slowing disabling features
> and/or bisecting might be the only way to find how this issue got started. At
> least if we could narrow it down, we migh
https://bugs.freedesktop.org/show_bug.cgi?id=109955
--- Comment #83 from J. Andrew Lanz-O'Brien ---
Can confirm that this bug is still present as of August 11, 2019 on kernel
5.2.8 with mesa 19.1.4. Borderlands 2 hard locked my system about 5 times
tonight. Manually setting the power profile didn
https://bugs.freedesktop.org/show_bug.cgi?id=111372
Bug ID: 111372
Summary: Dual-monitor desktop environment crash with certain
monitor positions
Product: Mesa
Version: unspecified
Hardware: x86-64 (AMD64)
O
Add suffix ULL to constant 1000 in order to avoid a potential integer
overflow and give the compiler complete information about the proper
arithmetic to use. Notice that this constant is being used in a context
that expects an expression of type u64, but it's currently evaluated
using 32-bit arithm
https://bugs.freedesktop.org/show_bug.cgi?id=110674
--- Comment #75 from ReddestDream ---
>Here's some additional investigation.
>[SetUclkToHightestDpmLevel] Set hard min uclk failed! Appears as one of the
>first errors in dmesg. This is from vega20_hwmgr.c:3354 and triggered by:
I agree that
https://bugs.freedesktop.org/show_bug.cgi?id=110674
--- Comment #74 from Sylvain BERTRAND ---
Forcing the memory clock and voltage is not enough: the dc[en]x memory requests
should be given also the highest priority in the arbiter block. I don't recall
how it interacts with the dc[en]x watermarks
On Thu, Aug 08, 2019 at 06:36:28PM +0200, Jonathan Neuschäfer wrote:
> This improves Sphinx output in two ways:
>
> - It avoids an unmatched single-quote ('), about which Sphinx complained:
>
> /.../Documentation/gpu/drm-internals.rst:298:
> WARNING: Could not lex literal_block as "c". High
Hi Jitao.
> .../display/panel/auo,kd101n80-45na.txt | 34 +
> .../display/panel/boe,tv101wum-nl6.txt| 34 +
panel bindings are in the process of being migrated to the new
meta-schema format.
Therefore new bindings should preferably also follow the new format.
Can you please look
When one of the array of fences is signaled, propagate its errors to the
parent fence-array (keeping the first error to be raised).
v2: Opencode cmpxchg_local to avoid compiler freakout.
v3: Be careful not to flag an error if we race against signal-on-any.
v4: Same applies to installing the signal
When one of the array of fences is signaled, propagate its errors to the
parent fence-array (keeping the first error to be raised).
v2: Opencode cmpxchg_local to avoid compiler freakout.
v3: Be careful not to flag an error if we race against signal-on-any.
v4: Same applies to installing the signal
Hi Chris,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[cannot apply to v5.3-rc3 next-20190809]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commit
https://bugs.freedesktop.org/show_bug.cgi?id=110674
--- Comment #73 from Tom B ---
Created attachment 145026
--> https://bugs.freedesktop.org/attachment.cgi?id=145026&action=edit
diff of vega20_hwmgr.c from 5.0.13 to 5.2.7
--
You are receiving this mail because:
You are the assignee for the b
https://bugs.freedesktop.org/show_bug.cgi?id=110674
--- Comment #72 from Tom B ---
> The nasty displayport mst thingy? I would always set this to false.
I don't believe mst is being used here, it's two monitors both with separate
cables.
Here's some additional investigation.
[SetUclkToHightes
The drivers core bumps runtime PM refcount during of entering into
suspend to workaround some problem where parent device may become turned
off before its children. In order to disable and reset CRTCs/HDMI/etc
hardware, the runtime PM needs to be "forced" into suspend mode.
Signed-off-by: Dmitry O
Hi Noralf.
> >>> + /* register value */
> >>> + buffer[4] = 0x72;
> >>> + buffer[5] = val >> 8;
> >>> + buffer[6] = val;
> >>> + value_xfer.tx_buf = buffer + 4;
> >>> + spi_message_add_tail(&value_xfer, &msg);
> >>> +
> >>> + return spi_sync(lcd->spi, &msg);
> >>> +}
> >>
> >> Just a note to Sam:
Hi Laurent.
On Sun, Aug 11, 2019 at 02:10:39AM +0300, Laurent Pinchart wrote:
> Hello everybody,
>
> These 9 patches have initially been posted as part of the larger "[PATCH
> 00/60] drm/omap: Replace custom display drivers with drm_bridge and
> drm_panel" series, hence the v2 in the subject pref
Den 11.08.2019 18.49, skrev Sam Ravnborg:
> Hi Noralf.
>
>>> +static int lb035q02_write(struct lb035q02_device *lcd, u16 reg, u16 val)
>>> +{
>>> + struct spi_message msg;
>>> + struct spi_transfer index_xfer = {
>>> + .len= 3,
>>> + .cs_change = 1,
>>> +
Hi Laurent.
On Sun, Aug 11, 2019 at 02:10:44AM +0300, Laurent Pinchart wrote:
> This panel is used on the Zoom2/3/3630 SDP boards.
>
> The code is based on the omapdrm-specific panel-nec-nl8048hl11 driver
>
> Signed-off-by: Laurent Pinchart
> ---
> Changes since v1:
>
> - Mention boards using
Hi Noralf.
On Thu, Aug 01, 2019 at 03:52:49PM +0200, Noralf Trønnes wrote:
> Add support for panels that use the DPI interface.
> ILI9341 has onboard RAM so the assumption made here is that all such
> panels support pixel upload over DBI.
>
> The presence/absense of the Device Tree 'port' node de
https://bugs.freedesktop.org/show_bug.cgi?id=110674
--- Comment #71 from Sylvain BERTRAND ---
On Sun, Aug 11, 2019 at 01:15:48AM +, bugzilla-dae...@freedesktop.org
wrote:
> I think the clock dysregulation and excessive voltage/wattage are symptoms of
Is there a way to configure the smu block
Hi Laurent.
My meta-schemas foo is very limited, but I noticed a few things.
Hopefully Rob finds time soon to review.
Sam
On Sun, Aug 11, 2019 at 02:10:42AM +0300, Laurent Pinchart wrote:
> The NEC NL8048HL11 is a 10.4cm WVGA (800x480) panel with a 24-bit RGB
> parallel data interface an
Hi Noralf.
> > +static int lb035q02_write(struct lb035q02_device *lcd, u16 reg, u16 val)
> > +{
> > + struct spi_message msg;
> > + struct spi_transfer index_xfer = {
> > + .len= 3,
> > + .cs_change = 1,
> > + };
> > + struct spi_transfer value_xfer = {
Hi Hans.
On Sun, Aug 11, 2019 at 04:37:24PM +0200, Hans de Goede wrote:
> I made the condition of the wait_event_timeout call in
> gm12u320_fb_update_work a helper which takes a mutex to make sure
> that any writes to fb_update.run or fb_update.fb from other CPU cores
> are seen before the check i
Hi Noralf.
On Thu, Aug 01, 2019 at 03:52:49PM +0200, Noralf Trønnes wrote:
> Add support for panels that use the DPI interface.
> ILI9341 has onboard RAM so the assumption made here is that all such
> panels support pixel upload over DBI.
>
> The presence/absense of the Device Tree 'port' node de
Am 11.08.19 um 18:25 schrieb Chris Wilson:
> When one of the array of fences is signaled, propagate its errors to the
> parent fence-array (keeping the first error to be raised).
>
> v2: Opencode cmpxchg_local to avoid compiler freakout.
> v3: Be careful not to flag an error if we race against sign
When one of the array of fences is signaled, propagate its errors to the
parent fence-array (keeping the first error to be raised).
v2: Opencode cmpxchg_local to avoid compiler freakout.
v3: Be careful not to flag an error if we race against signal-on-any.
v4: Same applies to installing the signal
Am 11.08.19 um 11:15 schrieb Chris Wilson:
> Now that dma_fence_signal always takes the spinlock to flush the
> cb_list, simply take the spinlock and call dma_fence_signal_locked() to
> avoid code repetition.
>
> Suggested-by: Christian König
> Signed-off-by: Chris Wilson
> Cc: Christian König
How about this instead:
Setting array->base.error = 1 during initialization.
Then cmpxchg(array->base.error, 1, error) whenever a fence in the array
signals.
And then finally cmpxchg(array->base.error, 1, 0) when the array itself
signals.
Christian.
Am 11.08.19 um 14:21 schrieb Chris Wilson:
https://bugs.freedesktop.org/show_bug.cgi?id=110674
--- Comment #70 from Tom B ---
> Based on all the data you (Tom B) and others have provided as well as my own
> tests, my current suspicion is that there is a bug in the display mode/type
> detection and enumeration, leading to the driver losi
Hi Noralf.
Most feedback on this driver was covered in comment to 1/4.
Only a few things caught my eye.
On Thu, Aug 01, 2019 at 03:52:47PM +0200, Noralf Trønnes wrote:
> Move the driver to drm/panel and take advantage of the new panel support
> in drm_mipi_dbi. Change the file name to match the n
Add -ENODEV to the list of usb-transfer errors which we ignore to
avoid logging Frame update errors when the device gets unplugged.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/tiny/gm12u320.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tiny/gm12u320.c
I made the condition of the wait_event_timeout call in
gm12u320_fb_update_work a helper which takes a mutex to make sure
that any writes to fb_update.run or fb_update.fb from other CPU cores
are seen before the check is done.
This is not necessary as the wait_event helpers contain the necessary
ba
Hi Noralf.
I really like how this allows us to have a single file for all
the uses of a driver IC.
And this patch-set is much easier to grasp than the first RFC.
General things:
- The current design have a tight connection between the display
controller and the panel. Will this hurt in the lon
Hi Laurent,
Den 11.08.2019 15.35, skrev Laurent Pinchart:
> Hi Noralf,
>
> On Sun, Aug 11, 2019 at 03:19:13PM +0200, Noralf Trønnes wrote:
>> Sam,
>>
>> Den 11.08.2019 01.10, skrev Laurent Pinchart:
>>> This panel is used on the Gumstix Overo Palo35.
>>>
>>> The code is based on the omapdrm-speci
Hi,
On 8/1/19 4:59 PM, Sam Ravnborg wrote:
Hi Hans.
On Tue, Jul 30, 2019 at 03:38:56PM +0200, Hans de Goede wrote:
3 small cleanups:
1) Drop unused DRIVER_PATCHLEVEL
2) We do not set mode_config.preferred_depth, so instead of passing the
unset mode_config.preferred_depth to drm_fbdev_gene
Hi Noralf,
On Sun, Aug 11, 2019 at 03:19:13PM +0200, Noralf Trønnes wrote:
> Sam,
>
> Den 11.08.2019 01.10, skrev Laurent Pinchart:
> > This panel is used on the Gumstix Overo Palo35.
> >
> > The code is based on the omapdrm-specific panel-lgphilips-lb035q02
> > driver.
> >
> > Signed-off-by: L
Sam,
Den 11.08.2019 01.10, skrev Laurent Pinchart:
> This panel is used on the Gumstix Overo Palo35.
>
> The code is based on the omapdrm-specific panel-lgphilips-lb035q02
> driver.
>
> Signed-off-by: Laurent Pinchart
> Reviewed-by: Sam Ravnborg
> ---
> diff --git a/drivers/gpu/drm/panel/pa
When one of the array of fences is signaled, propagate its errors to the
parent fence-array (keeping the first error to be raised).
v2: Opencode cmpxchg_local to avoid compiler freakout.
v3: Be careful not to flag an error if we race against signal-on-any.
v4: Same applies to installing the signal
When one of the array of fences is signaled, propagate its errors to the
parent fence-array (keeping the first error to be raised).
v2: Opencode cmpxchg_local to avoid compiler freakout.
v3: Be careful not to flag an error if we race against signal-on-any
Signed-off-by: Chris Wilson
Cc: Sumit Se
Quoting Koenig, Christian (2019-08-11 09:58:31)
> Am 10.08.19 um 17:34 schrieb Chris Wilson:
> > + /*
> > + * Propagate the first error reported by any of our fences, but only
> > + * before we ourselves are signaled.
> > + */
> > + if (atomic_read(&array->num_pending) > 0)
>
mtk_mipi_tx is the phy of mtk_dsi.
mtk_dsi get the phy(mtk_mipi_tx) in probe().
So, mtk_mipi_tx init should be ahead of mtk_dsi. Or mtk_dsi will
defer to wait mtk_mipi_tx probe done.
Signed-off-by: Jitao Shi
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +-
1 file changed,
DSI panel driver need attach function which is inculde in
mipi_dsi_host_ops.
If mipi_dsi_host_register is not in probe, dsi panel will
probe more delay.
So move the mipi_dsi_host_register to probe from bind.
Signed-off-by: Jitao Shi
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_dsi.c |
Change the method of frame rate calc which can get more accurate
frame rate.
data rate = pixel_clock * bit_per_pixel / lanes
Adjust hfp_wc to adapt the additional phy_data
if MIPI_DSI_MODE_VIDEO_BURST
hfp_wc = hfp * bpp - data_phy_cycles * lanes - 12 - 6;
else
hfp_wc = hfp * bpp -
Our new DSI chip has frame size control.
So add the driver data to control for different chips.
Signed-off-by: Jitao Shi
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
b/drivers/gpu/drm/medi
Config the different CMDQ reg address in driver data.
Signed-off-by: Jitao Shi
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 29 -
1 file changed, 24 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
b/drivers/gpu/drm/mediatek/mtk_dsi.c
index
New DSI IP has shadow register and working reg. The register
values are writen to shadow register. And then trigger with
commit reg, the register values will be moved working register.
This fucntion is defualt on. But this driver doesn't use this
function. So add the disable control.
Signed-off-b
Add mt8183 dsi driver data. Enable size control and
reg commit control.
Signed-off-by: Jitao Shi
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 6
Change since v5:
- fine tune dphy timing.
Change since v4:
- move mipi_dsi_host_unregiter() to .remove()
- fine tune add frame size control coding style
- change the data type of data_rate as u32, and add DIV_ROUND_UP_ULL
- use div_u64 when 80ULL / dsi->data_rate.
Changes since v3
-
https://bugs.freedesktop.org/show_bug.cgi?id=109955
--- Comment #82 from Mauro Gaspari ---
(In reply to Pierre-Eric Pelloux-Prayer from comment #81)
> Can anyone provide a apitrace/renderdoc capture that can reliably reproduce
> the crash/freeze?
Hello, Sadly my freezes are hard to reproduce. So
Quoting Christian König (2019-08-11 09:56:01)
> Be more consistent with the naming of the other DMA-buf objects.
From the tip of my fingers, \o/
> Signed-off-by: Christian König
Letting the compiler do the real work (for the bits I spot checked it
was the expected mechanical translation), and
Now that dma_fence_signal always takes the spinlock to flush the
cb_list, simply take the spinlock and call dma_fence_signal_locked() to
avoid code repetition.
Suggested-by: Christian König
Signed-off-by: Chris Wilson
Cc: Christian König
---
drivers/dma-buf/dma-fence.c | 32 ---
Add documentation for boe tv101wum-n16 panel.
Signed-off-by: Jitao Shi
Reviewed-by: Sam Ravnborg
---
.../display/panel/boe,tv101wum-nl6.txt| 34 +++
1 file changed, 34 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.txt
Changes since v3:
- remove check enable_gpio.
- fine tune the auo,kd101n80-45na panel's power on timing.
Changes since v2:
- correct the panel size
- remove blank line in Kconfig
- move auo,kd101n80-45na panel driver in this series.
Changes since v1:
- update typo nl6 -> n16.
- update new
Add driver for BOE tv101wum-nl6 panel is a 10.1" 1200x1920 panel.
Signed-off-by: Jitao Shi
Reviewed-by: Sam Ravnborg
---
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gpu/drm/panel/Makefile| 1 +
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 709
Add documentation for auo kd101n80-45na panel.
Signed-off-by: Jitao Shi
Reviewed-by: Sam Ravnborg
---
.../display/panel/auo,kd101n80-45na.txt | 34 +++
1 file changed, 34 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/auo,kd101n80-45na.t
Auo,kd101n80-45na's connector is same as boe,tv101wum-nl6.
The most codes can be reuse.
So auo,kd101n80-45na and boe,tv101wum-nl6 use one driver file.
Add the different parts in driver data.
Signed-off-by: Jitao Shi
---
drivers/gpu/drm/panel/Kconfig | 6 +-
.../gpu/drm/panel/pan
Am 10.08.19 um 17:34 schrieb Chris Wilson:
> Allow for some users to surreptitiously insert lazy signal callbacks that
> do not depend on enabling the signaling mechanism around every fence.
> (The cost of interrupts is too darn high, to revive an old meme.)
> This means that we may have a cb_list
Am 10.08.19 um 17:34 schrieb Chris Wilson:
> When one of the array of fences is signaled, propagate its errors to the
> parent fence-array (keeping the first error to be raised).
>
> v2: Opencode cmpxchg_local to avoid compiler freakout.
>
> Signed-off-by: Chris Wilson
> Cc: Sumit Semwal
> Cc: Gu
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