https://bugs.freedesktop.org/show_bug.cgi?id=110214
Diego Viola changed:
What|Removed |Added
Summary|radeonsi: xterm scrollback |radeonsi: xterm scrollback
Hi Joel
> index ..fb56e425bd48
> --- /dev/null
> +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> @@ -0,0 +1,104 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +// Copyright 2018 IBM Corporation
> +
> +#include
> +#include
A drmP.h include was left here, can we have this removed too.
> +
https://bugs.freedesktop.org/show_bug.cgi?id=110214
--- Comment #60 from Diego Viola ---
Used clang to compile the latest mesa git master and it made no difference.
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Thanks, patch is:
Reviewed-by: Qiang Yu
Regards,
Qiang
On Tue, Apr 2, 2019 at 7:50 AM Stephen Rothwell wrote:
>
> Hi all,
>
> After merging the drm-misc tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> In file included from include/linux/kernel.h:7,
>
Neil Armstrong writes:
> On 15/03/2019 14:56, Neil Armstrong wrote:
>> This patchset adds :
>> - Optional reset properties in the midgard bindings
>> - Mali T820 Node in Amlogic Meson GXM DTSI
>>
>> Changes since v1:
>> - Updated midgard DT wording following the recently submitted
>> bifrost
https://bugs.freedesktop.org/show_bug.cgi?id=110214
--- Comment #59 from Diego Viola ---
If I do this:
$ git revert -n 6328536ff28ca26f2ad4e6f2c956c467acebda88
$ git revert -n 621b0fa8922ade0a8122b868177308e65e6d3595
Then xterm works fine and I still have direct rendering.
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You are receivin
On Tue, 05 Mar 2019, claudiu.bez...@microchip.com wrote:
> From: Claudiu Beznea
>
> Add new compatible string for the HLCD controller on SAM9X60 SoC.
>
> Signed-off-by: Claudiu Beznea
> ---
> Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt | 1 +
> 1 file changed, 1 insertion(+)
Applie
On Tue, 05 Mar 2019, claudiu.bez...@microchip.com wrote:
> From: Claudiu Beznea
>
> Add compatible for SAM9X60 HLCD controller.
>
> Signed-off-by: Claudiu Beznea
> ---
> drivers/mfd/atmel-hlcdc.c | 1 +
> 1 file changed, 1 insertion(+)
Applied, thanks.
--
Lee Jones [李琼斯]
Linaro Services Te
https://bugs.freedesktop.org/show_bug.cgi?id=110214
--- Comment #58 from Diego Viola ---
I restarted the bisect and ended up at the same "bad commit":
6328536ff28ca26f2ad4e6f2c956c467acebda88 is the first bad commit
I wonder what I'm doing wrong...
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On Tue, Apr 2, 2019 at 1:48 AM Eric Anholt wrote:
>
> Qiang Yu writes:
>
> > On Fri, Mar 29, 2019 at 11:20 PM Daniel Vetter wrote:
> >>
> >> On Fri, Mar 29, 2019 at 09:47:48PM +0800, Qiang Yu wrote:
> >> > Signed-off-by: Qiang Yu
> >> > ---
> >> > MAINTAINERS | 9 +
> >> > 1 file chang
This driver is for the ASPEED BMC SoC's GFX display hardware. This
driver runs on the ARM based BMC systems, unlike the ast driver which
runs on a host CPU and is is for a PCI graphics device.
Signed-off-by: Joel Stanley
Acked-by: Daniel Vetter
Reviewed-by: Noralf Trønnes
--
v2:
Use drm_gem_fb
This describes the ASPEED BMC SoC's display controller.
Signed-off-by: Joel Stanley
---
.../devicetree/bindings/gpu/aspeed-gfx.txt| 41 +++
1 file changed, 41 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpu/aspeed-gfx.txt
diff --git a/Documentation/de
This hardware is found inside ASPEED Baseboard Management Controller
(BMC) system on chips. It is called the 'SOC Display Controller' or 'GFX'.
Signed-off-by: Joel Stanley
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c18f5f10cf91..c3
v2: Address review from Noralf and Daniel, add maintainers patch
This driver is for the ASPEED BMC SoC's GFX display hardware. This
driver runs on the ARM based BMC systems, unlike the ast driver which
runs on a host CPU and is is for a PCIe graphics device that happens to
live in the BMC's silico
On Thu, 28 Mar 2019 at 07:53, Daniel Vetter wrote:
> > +static int aspeed_gfx_get_modes(struct drm_connector *connector)
> > +{
> > + return drm_add_modes_noedid(connector, 800, 600);
>
> Is this the only mode you do, or just a default? Iirc if you report
> "connected", you'll get this as one
Hi, Dan:
On Thu, 2019-03-28 at 17:31 +0300, Dan Carpenter wrote:
> We don't want to overwrite "ret", it already holds the correct error
> code. The "regmap" variable might be a valid pointer as this point.
>
> Fixes: 8f83f26891e1 ("drm/mediatek: Add HDMI support")
> Signed-off-by: Dan Carpenter
https://bugs.freedesktop.org/show_bug.cgi?id=110214
--- Comment #57 from Diego Viola ---
I contacted Thomas Dickey (maintainer of xterm) and he said this about the
issue:
drivers, or Xorg in general -
for instance the parts painting by XCopyArea
(used by xterm and some other applications)
may n
https://bugs.freedesktop.org/show_bug.cgi?id=110214
--- Comment #56 from Diego Viola ---
Here's more or less what I'm currently seeing:
$ ldd /usr/bin/glxinfo | grep libGL
libGL.so.1 => /home/diego/mesa/lib/libGL.so.1 (0x7fbaac886000)
$ ls -l /home/diego/mesa/lib/libGL.so.1
lrwxrwxrw
https://bugs.freedesktop.org/show_bug.cgi?id=110214
--- Comment #55 from Diego Viola ---
(In reply to Michel Dänzer from comment #53)
> It's probably worth trying git bisect again, double-checking at each step
> that you're testing the right thing.
I tried again and I can't get to replace the sy
Hi all,
After merging the drm-misc tree, today's linux-next build (x86_64
allmodconfig) failed like this:
In file included from include/linux/kernel.h:7,
from include/asm-generic/bug.h:18,
from arch/x86/include/asm/bug.h:83,
from include/linux/bu
On Mon, Mar 4, 2019 at 12:26 AM Robert Foss
wrote:
> Hey Gurchetan,
>
> Thanks for sending this in!
>
> Reviewed-by: Robert Foss
>
>
Thanks for the review! Ping committers for merge ...
> On 2/28/19 1:52 AM, Gurchetan Singh wrote:
> > Generated using make headers_install.
> >
> > This brings
We only set the excl (possible-writing) fence pointer and never add a
shared (read-only) fence.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_gem.c | 12
1 file changed, 12 deletions(-)
diff --git a/drivers/gpu/drm/v3d/v3d_gem.c b/drivers/gpu/drm/v3d/v3d_gem.c
index b78ffc
It is the expectation of existing userspace (X11 + Mesa, in
particular) that jobs submitted to the kernel against a shared BO will
get implicitly synchronized by their submission order. If we want to
allow clever userspace to disable implicit synchronization, we should
do that under its own submit
The compute shader dispatch interface is pretty simple -- just pass in
the regs that userspace has passed us, with no CLs to run. However,
with no CL to run it means that we need to do manual cache flushing of
the L2 after the HW execution completes (for SSBO, atomic, and
image_load_store writes t
The DRM fence list helpers came from needing to fix implicit
synchronization on V3D (serious flickering in X11 once you had
multiple clients involved), a bug I think I noticed in panfrost, and
having recently reviewed lima and liked their model. Compared to
lima, I chose to use xarray as the stora
All consumers wanted drm_gem_object * now.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_drv.h | 4 ++--
drivers/gpu/drm/v3d/v3d_gem.c | 42 +--
2 files changed, 17 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/v3d/v3d_drv.h b/drivers/gpu/
The CL submission had two jobs embedded in an exec struct. When I
added TFU support, I had to replicate some of the exec stuff and some
of the job stuff. As I went to add CSD, it became clear that actually
what was in exec should just be in the two CL jobs, and it would let
us share a lot more co
I needed to add implicit dependency support for v3d, and Rob Herring
has been working on it for panfrost, and I had recently looked at the
lima implementation so I think this will be a good intersection of
what we all want and simplify our scheduler implementations.
Signed-off-by: Eric Anholt
---
I haven't tested this, but it's a pretty direct port of what I did for
v3d.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/lima/lima_gem.c | 37 +
drivers/gpu/drm/lima/lima_sched.c | 66 ++-
drivers/gpu/drm/lima/lima_sched.h | 6 +--
3 files changed
On Mon 2019-04-01 06:30:34, Brian Masney wrote:
> Add device tree support to the lm3630a driver and allow configuring
> independently on both banks the mapping mode (linear or exponential),
> initial and maximum LED brightness.
>
> Driver was tested on a LG Nexus 5 (hammerhead) phone.
>
> Signed-
On Mon 2019-04-01 06:30:32, Brian Masney wrote:
> lm3630a_bank_a_update_status() and lm3630a_bank_b_update_status()
> both return the brightness value if the brightness was successfully
> updated. Writing to these attributes via sysfs would cause a 'Bad
> address' error to be returned. These functi
On Mon 2019-04-01 06:30:33, Brian Masney wrote:
> Add new backlight bindings for the TI LM3630A dual-string white LED.
>
> Signed-off-by: Brian Masney
> ---
> .../leds/backlight/lm3630a-backlight.yaml | 112
++
What is that? Is it future of all the bindings?
Up to device tre
On Jan 29 2019, Prarit Bhargava wrote:
> @@ -1066,6 +1069,9 @@ static void fbcon_init(struct vc_data *vc, int init)
>
> cap = info->flags;
>
> + if (console_loglevel <= CONSOLE_LOGLEVEL_QUIET)
> + logo_shown = FBCON_LOGO_DONTSHOW;
> +
> if (vc != svc || logo_shown
From: kbuild test robot
PTR_ERR should access the value just tested by IS_ERR
Generated by: scripts/coccinelle/tests/odd_ptr_err.cocci
Fixes: 10f21de123ac ("drm/panfrost: add support for reset lines")
CC: Neil Armstrong
Signed-off-by: kbuild test robot
Signed-off-by: Julia Lawall
---
tree:
Hi DRM maintainers,
This is a respin of the last week's pull request as I have discovered
via the kbuild test bot that one of the commits was not bisectable.
This pull requests adds initial Mali D71 support into the Arm "komeda" DRM
driver. The code has been reviewed at the end of last year, I ju
On 01/04/2019 09:24, Neil Armstrong wrote:
On 01/04/2019 09:47, Rob Herring wrote:
This adds the initial driver for panfrost which supports Arm Mali
Midgard and Bifrost family of GPUs. Currently, only the T860 and
T760 Midgard GPUs have been tested.
v2:
- Add GPU reset on job hangs (Tomeu)
- Ad
On 01/04/2019 08:47, Rob Herring wrote:
This adds the initial driver for panfrost which supports Arm Mali
Midgard and Bifrost family of GPUs. Currently, only the T860 and
T760 Midgard GPUs have been tested.
FWIW, on an antique T624 (Juno) it seems to work no worse than the kbase
driver plus pa
On 01/04/2019 08:47, Rob Herring wrote:
ARM Mali midgard GPU is similar to standard 64-bit stage 1 page tables, but
have a few differences. Add a new format type to represent the format. The
input address size is 48-bits and the output address size is 40-bits (and
possibly less?). Note that the l
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: 093a2914c367de18bbf8d07d0b15ce63c43e5f9e
commit: 4e0795386a907989f92082c9f1af3c70dec46969 [4/8] Merge remote-tracking
branch 'drm-misc/drm-misc-next' into drm-tip
config: xtensa-allyesconfig (attached as .config)
compiler: xtensa-li
https://bugs.freedesktop.org/show_bug.cgi?id=110250
--- Comment #3 from Sibren Vasse ---
I have applied your patch to v5.1-rc3 and can confirm it solves the issue.
Thank you!
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tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: 093a2914c367de18bbf8d07d0b15ce63c43e5f9e
commit: 4e0795386a907989f92082c9f1af3c70dec46969 [4/8] Merge remote-tracking
branch 'drm-misc/drm-misc-next' into drm-tip
config: sparc64-allyesconfig (attached as .config)
compiler: sparc64-
Hi Joel.
Replying to Noralf's mail as I lost the original mail.
> > diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
> > b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
> > new file mode 100644
> > index ..e2d1d7497352
> > --- /dev/null
> > +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_crt
https://bugzilla.kernel.org/show_bug.cgi?id=201957
--- Comment #7 from Dev Bazilio (anode@gmail.com) ---
(In reply to Alex Deucher from comment #4)
> Can you bisect?
Unfortunately this is not possible as all latest kernels are now shipped with
Display Core enabled by default and as I told 4.1
https://bugs.freedesktop.org/show_bug.cgi?id=110250
--- Comment #2 from Nicholas Kazlauskas ---
Created attachment 143838
--> https://bugs.freedesktop.org/attachment.cgi?id=143838&action=edit
0001-drm-amd-display-If-one-stream-full-updates-full-upda.patch
Does the attached patch help resolve t
Hi Uma.
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -256,6 +256,13 @@ struct drm_crtc_state {
> struct drm_property_blob *gamma_mode_caps;
>
> /**
> + * @gamma_mode:
> + *
> + * FIXME
> + */
> + struct drm_property_blob *gamma_mode;
HEr
The global list of all debugfs entries for the driver was painful: the
list couldn't see into the components' structs, so each component had
its own debugs show function to find the component, then find the
regset and dump it. The components also had to be careful to check
that they were actually
One might want to use the VC4 display stack without using Mesa.
Similar to the debugfs fixes for not having all of the possible
display bits enabled, make sure you can't oops in vc4 if v3d isn't
enabled.
v2: Fix matching against other v3d variants (review by Paul), don't
forget to set irq_enab
Hi Uma.
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index 58ad983..cdfda90 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -249,6 +249,13 @@ struct drm_crtc_state {
> struct drm_property_blob *mode_blob;
>
> /**
> + * @gamma_mode:
>
Hi Thierry.
We have a few panel drivers that are reviewed, at least by me,
and next step is either to have someone else to step up and
do review or to have them applied to drm-misc.
Rocktech jh057n00900 - from Guido Günther
- final version posted just now
Novatek NT35596 - from Jagan Teki
- fi
Rob Herring writes:
> On Mon, Apr 1, 2019 at 8:07 AM Daniel Vetter wrote:
>>
>> On Mon, Apr 1, 2019 at 9:47 AM Rob Herring wrote:
>> >
>> > Similar to the single handle drm_gem_object_lookup(),
>> > drm_gem_objects_lookup() takes an array of handles and returns an array
>> > of GEM objects.
>>
https://bugzilla.kernel.org/show_bug.cgi?id=201957
--- Comment #6 from Dev Bazilio (anode@gmail.com) ---
tried linux-amd-staging-drm-next-git-5.1.811103.2acb851ad43b and dmes is still
has a lot of warnings. Tested also youtube in chrome with UVD, got a minor
freeze and long freeze ~30sec of sy
Paul Kocialkowski writes:
> Hi,
>
> Le mercredi 20 février 2019 à 13:03 -0800, Eric Anholt a écrit :
>> The debugfs_regset32 is nice to use for reducing boilerplate in
>> dumping a bunch of regs in debugfs, but we also want to be able to
>> print to dmesg them at runtime for driver debugging. dr
Qiang Yu writes:
> On Fri, Mar 29, 2019 at 11:20 PM Daniel Vetter wrote:
>>
>> On Fri, Mar 29, 2019 at 09:47:48PM +0800, Qiang Yu wrote:
>> > Signed-off-by: Qiang Yu
>> > ---
>> > MAINTAINERS | 9 +
>> > 1 file changed, 9 insertions(+)
>> >
>> > diff --git a/MAINTAINERS b/MAINTAINERS
>
Kangjie Lu writes:
> pm_runtime_get_sync could fail and thus deserves a check.
>
> The patch adds such a check and return its error code upstream
> if it indeed failed.
Applied the review and merged to drm-misc-next. Thanks!
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Hoegeun Kwon writes:
> There is a problem when often dpms goes from off to on. pm idle is not
> in sync and the problem occurs. Modify pm_runtime_put from
> asynchronous to synchronous.
Why would we need the power domain to go to off before we try to come
back? Any idea? Also, please specify w
Den 28.03.2019 06.43, skrev Joel Stanley:
> This driver is for the ASPEED BMC SoC's GFX display hardware. This
> driver runs on the ARM based BMC systems, unlike the ast driver which
> runs on a host CPU and is is for a PCI graphics device.
>
> Signed-off-by: Joel Stanley
> --
> Changes since R
Let's document the display timings that most veyron chromebooks (like
jaq, jerry, mighty, speedy) have been using out in the field. This
uses the standard blankings but a slightly slower clock rate, thus
getting a refresh rate 58.3 Hz.
NOTE: this won't really do anything except cause DRM to prope
From: Sean Paul
This patch adds an override mode for kevin devices. The mode increases
both back porches to allow a pixel clock of 2kHz as opposed to the
'typical' value of 252750kHz. This is needed to avoid interference with
the touch digitizer on these laptops.
Cc: Doug Anderson
Cc: Eric
Just like we did for rk3288-veyron-chromebook, we want to be able to
use one of the fixed PLLs in the system to make the pixel clock for
minnie.
Specifying these timings matches us with how the display is used on
the downstream Chrome OS kernel. See https://crrev.com/c/323211.
Unlike what we did
Convert the Innolux n116bge from using a fixed mode to specifying a
display timing with min/typ/max values.
Note that the n116bge's datasheet doesn't fit too well into DRM's way
of specifying things. Specifically the panel's datasheet just
specifies the vertical blanking period and horizontal bla
Convert the AUO b101ean01 from using a fixed mode to specifying a
display timing with min/typ/max values.
The AUO b101ean01's datasheet says:
* Vertical blanking min is 12
* Horizontal blanking min is 60
* Pixel clock is between 65.3 MHz and 75 MHz
The goal here is to be able to specify the prope
From: Sean Paul
This patch adds the ability to override the typical display timing for a
given panel. This is useful for devices which have timing constraints
that do not apply across the entire display driver (eg: to avoid
crosstalk between panel and digitizer on certain laptops). The rules are
I'm reviving Sean Paul's old patchset to get mode support in device
tree. The cover letter for his v3 is at:
https://lists.freedesktop.org/archives/dri-devel/2018-February/165162.html
No code is different between v4 and v5, just commit messages and text
in the bindings.
I've pulled together the
From: Sean Paul
This patch adds a new subnode to simple-panel allowing us to override
the typical timing expressed in the panel's display_timing.
Changes in v2:
- Split out the binding into a new patch (Rob)
- display-timings is a new section (Rob)
- Use the full display-timings subnode inste
Attach the gamma mode property to allow userspace
set the gamma mode and provide the luts for the
same.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_color.c | 1 +
drivers/gpu/drm/i915/intel_display.c | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/
Create the gamma mode caps property and attach
to crtc.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_color.c | 2 ++
drivers/gpu/drm/i915/intel_display.c | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_color.c
b/drivers/gpu/drm/i915/intel_color.
Gen11 introduced a new gamma mode i.e, multi segmented
gamma mode. Added support for the same.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_color.c | 161 -
include/drm/drm_crtc.h | 3 +
2 files changed, 161 insertions(+), 3 deletion
Add macros to define multi segmented gamma registers
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_reg.h | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 341f03e..f95f82f 100644
--- a/drivers
From: Ville Syrjälä
Add a gamma mode capability property to enable various kind of
gamma modes supported by platforms like: Interpolated, Split,
Multi Segmented etc. Userspace can get this property and
should be able to get the platform capabilties wrt various
gamma modes possible and the possibl
From: Ville Syrjälä
This defines the color lut ranges for 10bit and multi
segmented gamma range for ICL.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_color.c | 301 -
1 file changed, 297 insertions(+), 4 deletions(-
Add Gamma Mode property to set the gamma mode
(Interploated, Split, Multi Segmented etc) from the
list obtained through the gamma mode caps property.
Create the blob and send to driver for programming
the luts to the appropriate registers and setting
the chosen gamma mode.
Signed-off-by: Uma Shan
This series adds support for programmable gamma modes and
exposes a property interface for the same. Also added,
support for multi segment gamma mode introduced in ICL+
It creates 2 property interfaces :
1. GAMMA_MODE_CAPS: This is immutable property and exposes
the various gamma modes supported a
On Mon, Apr 1, 2019 at 8:07 AM Daniel Vetter wrote:
>
> On Mon, Apr 1, 2019 at 9:47 AM Rob Herring wrote:
> >
> > Similar to the single handle drm_gem_object_lookup(),
> > drm_gem_objects_lookup() takes an array of handles and returns an array
> > of GEM objects.
> >
> > Cc: Maarten Lankhorst
>
https://bugs.freedesktop.org/show_bug.cgi?id=110214
--- Comment #54 from Diego Viola ---
(In reply to Michel Dänzer from comment #53)
> It's probably worth trying git bisect again, double-checking at each step
> that you're testing the right thing.
Sure, I think my attempt from #c47 should have
https://bugs.freedesktop.org/show_bug.cgi?id=108521
--- Comment #49 from Alex Deucher ---
(In reply to Dimitar Atanasov from comment #48)
> May be problem is the CPU, because it has only 16 PCIe lains, so 8 for vega
> M,
> 4 for NVME, and 4 for others, I have seen that card reader is also connect
On Thu, Mar 28, 2019 at 08:32:15AM -0500, Rob Herring wrote:
> On Tue, Mar 12, 2019 at 12:13:41PM -0600, Jordan Crouse wrote:
> > Describe the zap-shader node that defines a reserved memory region
> > to store the zap shader.
> >
> > Signed-off-by: Jordan Crouse
> > ---
> >
> > Documentation/de
https://bugs.freedesktop.org/show_bug.cgi?id=110214
--- Comment #53 from Michel Dänzer ---
It's probably worth trying git bisect again, double-checking at each step that
you're testing the right thing.
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On Fri, Mar 29, 2019 at 06:46:21PM +, Robin Murphy wrote:
> On 19/03/2019 14:49, Liviu Dudau wrote:
> > On Tue, Mar 19, 2019 at 01:14:54PM +, Robin Murphy wrote:
> > > [ +Sudeep - just FYI ]
> > >
> > > Hi Liviu,
> > >
> > > On 27/02/2019 09:40, Liviu Dudau wrote:
> > > > Hi Robin,
> > >
https://bugs.freedesktop.org/show_bug.cgi?id=109345
--- Comment #6 from Alex Deucher ---
(In reply to Allan Cairns from comment #5)
> Created attachment 143815 [details]
> Additional dmseg logs
>
> dmseg output for
> Xeno Kernel 5 with no DRM - Boots to second card Firepro
> Xeno Kernel 5.1 RC2
https://bugs.freedesktop.org/show_bug.cgi?id=110214
--- Comment #52 from Diego Viola ---
(In reply to Michel Dänzer from comment #51)
> (In reply to Diego Viola from comment #46)
> > Maybe that's why the bisect went bad?
>
> That's likely one reason at least. At this point it's probably best if
On 3/29/19 7:26 PM, Zengtao (B) wrote:
Hi laura:
-Original Message-
From: Laura Abbott [mailto:labb...@redhat.com]
Sent: Friday, March 29, 2019 9:27 PM
To: Zengtao (B) ; sumit.sem...@linaro.org
Cc: Greg Kroah-Hartman ; Arve Hjønnevåg
; Todd Kjos ; Martijn Coenen
; Joel Fernandes ;
Chris
https://bugzilla.kernel.org/show_bug.cgi?id=203111
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC||alexdeuc...@gmail.c
Rob Herring writes:
> This adds the initial driver for panfrost which supports Arm Mali
> Midgard and Bifrost family of GPUs. Currently, only the T860 and
> T760 Midgard GPUs have been tested.
>
> v2:
> - Add GPU reset on job hangs (Tomeu)
> - Add RuntimePM and devfreq support (Tomeu)
> - Fix T76
On 03/20/2019 11:07 AM, Lee Jones wrote:
On 02/12/2019 09:42 AM, Lee Jones wrote:
> On Fri, 08 Feb 2019, Bartlomiej Zolnierkiewicz wrote:
>
>>
>> On 01/17/2019 05:19 PM, Daniel Thompson wrote:
>>> On Thu, Jan 17, 2019 at 04:33:35PM +0300, Alexander Shiyan wrote:
W
Chris Wilson writes:
> Quoting Daniel Vetter (2019-04-01 14:06:48)
>> On Mon, Apr 1, 2019 at 9:47 AM Rob Herring wrote:
>> > +{
>> > + int i, ret = 0;
>> > + struct drm_gem_object *obj;
>> > +
>> > + spin_lock(&filp->table_lock);
>> > +
>> > + for (i = 0; i < count; i++)
On 03/21/2019 11:52 PM, Christoph Hellwig wrote:
> gbefb uses managed resources, so it should do the same for DMA
> allocations.
>
> Signed-off-by: Christoph Hellwig
Acked-by: Bartlomiej Zolnierkiewicz
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
On 03/29/2019 09:46 PM, Mukesh Ojha wrote:
>
> On 3/19/2019 5:50 PM, shile.zh...@linux.alibaba.com wrote:
>> From: Shile Zhang
>>
>> To fix following divide-by-zero error found by Syzkaller:
>>
>>divide error: [#1] SMP PTI
>>CPU: 7 PID: 8447 Comm: test Kdump: loaded Not tainted
>>
Hi Thierry,
On Mon, Feb 18, 2019 at 9:27 PM Fabio Estevam wrote:
>
> Add support for the VXT VL050-8048NT-C01 800x480 panel to the
> panel-simple driver.
>
> This panel is used on some boards manufactured by TechNexion, such as
> imx7d-pico.
>
> Reviewed-by: Otavio Salvador
> Reviewed-by: Sam Ra
On 03/31/2019 02:18 PM, Sudip Mukherjee wrote:
> On Sun, Mar 17, 2019 at 06:24:56AM +0800, Yifeng Li wrote:
>> Hi all,
>>
>> This patchset contains a series of important fixes to various problems,
>> including lockups, crashes, screen gliches, and missing video modes.
>> These patches are crucial
Hi Nicolas,
On Fri, Mar 22, 2019 at 03:55:19PM -0400, Nicolas Dufresne wrote:
> Le mardi 19 mars 2019 à 22:57 +0100, Maxime Ripard a écrit :
> > V4L2 uses different fourcc's than DRM, and has a different set of formats.
> > For now, let's add the v4l2 fourcc's for the already existing formats.
>
>
On 03/14/2019 08:33 AM, Kangjie Lu wrote:
> In case ioremap fails, the fix releases resources and returns
> -ENOMEM to avoid NULL pointer dereferences.
>
> Signed-off-by: Kangjie Lu
Patch queued for v5.2 with minor change in the patch summary
("video: imsttfb: fix potential NULL pointer derefer
On 03/14/2019 08:30 AM, Kangjie Lu wrote:
> When ioremap fails, hga_vram should not be dereferenced. The fix
> check the failure to avoid NULL pointer dereference.
>
> Signed-off-by: Kangjie Lu
Patch queued for v5.2 with minor change in the patch summary
("video: hgafb: fix potential NULL point
https://bugs.freedesktop.org/show_bug.cgi?id=110214
--- Comment #51 from Michel Dänzer ---
(In reply to Diego Viola from comment #46)
> Maybe that's why the bisect went bad?
That's likely one reason at least. At this point it's probably best if you
double-check everything before testing anything
Hotplug can happen while drm_fbdev_generic_setup() is running so move
drm_client_add() call after setup is done to avoid
drm_fbdev_client_hotplug() running in two threads at the same time.
Fixes: 9060d7f49376 ("drm/fb-helper: Finish the generic fbdev emulation")
Reported-by: Daniel Vetter
Signed-
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/bochs/bochs_kms.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/bochs/bochs_kms.c
b/drivers/gpu/drm/bochs/bochs_kms.c
index 9e7cd6b34106..93cb27f93d39 100644
--- a/drivers/gpu/drm/bochs/bochs_kms.c
+++ b/drivers/gpu/drm/bochs
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/virtio/virtgpu_display.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/virtio/virtgpu_display.c
b/drivers/gpu/drm/virtio/virtgpu_display.c
index 653ec7d0bf4d..86843a4d6102 100644
--- a/drivers/gpu/drm/virtio/virtgpu_display.c
Gerd Hoffmann (3):
drm/virtio: add missing drm_atomic_helper_shutdown() call.
drm/bochs: add missing drm_atomic_helper_shutdown() call.
drm/cirrus: add missing drm_helper_force_disable_all() call.
drivers/gpu/drm/bochs/bochs_kms.c| 1 +
drivers/gpu/drm/cirrus/cirrus_mode.c | 1
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/cirrus/cirrus_mode.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c
b/drivers/gpu/drm/cirrus/cirrus_mode.c
index 7f9bc32af685..32ce2c1040b4 100644
--- a/drivers/gpu/drm/cirrus/cirrus_mode.c
+++ b/drivers/g
On 03/14/2019 12:45 PM, Gerd Hoffmann wrote:
> Simply add all pci memory bars to struct apertures_struct in
> remove_conflicting_pci_framebuffers(), without depending on the
> res_id parameter.
>
> The plan is to drop the res_id parameter later on. For now keep the
> parameter, use it for sanity
On Fri, Mar 29, 2019 at 08:21:31PM +0100, Daniel Vetter wrote:
> On Fri, Mar 29, 2019 at 7:10 PM Sean Paul wrote:
> >
> > On Fri, Mar 29, 2019 at 04:36:32PM +0100, Daniel Vetter wrote:
> > > On Fri, Mar 29, 2019 at 09:16:59AM -0400, Sean Paul wrote:
> > > > On Fri, Mar 29, 2019 at 09:21:10AM +0100
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