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When executing in a PCI passthrough based virtuzliation environemnt, the
hypervisor will usually attempt to send a PCIe bus reset signal to the
ASIC when the VM reboots. In this scenario, the card is not correctly
initialized, but we still consider it to be posted. Therefore, in a
passthrough based
Hi,
[auto build test ERROR on drm/drm-next]
[also build test ERROR on v4.7-rc2 next-20160609]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Mika-Kahola/drm-i915-DP-branch-devices/20160610
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João Paulo Rechi Vita wrote:
> Still no sound with the branch you've pointed. Logs can be found here
> in case you're interested:
> https://gist.github.com/jprvita/7966532c7a4b67c74621c9374e20a418
You could try 4.6-wip-dal
https://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-4.6-wip-dal
I
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the list of radeon
parameters and their values in my system, and the output of /proc/cpuinfo. As
of now I don't know what else to add so feel free to ask for any additional
information, I'll make it available as soon as I can.
--
You are receiving this mail because:
You are the assignee f
Hi,
[auto build test WARNING on drm/drm-next]
[also build test WARNING on v4.7-rc2 next-20160609]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Mika-Kahola/drm-i915-DP-branch-devices/20160610
On 10.06.2016 18:55, Emil Velikov wrote:
> On 10 June 2016 at 15:07, Nicolai Hähnle wrote:
>> Ping.
>>
> Sorry about that, I thought I've already mentioned it:
> Reviewed-by: Emil Velikov
>
> I take it you have commit access ? If not, let me know and I'll push if for
> you.
Thanks, I just push
On Fri, Jun 10, 2016 at 05:24:12PM +0200, Daniel Vetter wrote:
> On Tue, Jun 07, 2016 at 01:48:01PM +0200, Boris Brezillon wrote:
> > For all outputs except dp_mst, we have a 1:1 relationship between
> > connectors and encoders and the driver is relying on the atomic helpers:
> > we can drop the cu
On Fri, Jun 10, 2016 at 6:20 PM, Mario Kleiner
wrote:
> Hi Daniel,
>
> could you please pull these two patches, or at least the i915 specific
> revert for the i915 regression, acked by Jani, for your intel-fixes?
>
> I'd like to put my DP sink precision patches on top of these, and obviously
> wou
Hi Douglas,
On 10 June 2016 at 18:02, Douglas Anderson wrote:
> The Starry KR122EA0SRA is a 12.2", 1920x1200 TFT-LCD panel connected
> using eDP interfaces.
>
> Signed-off-by: Douglas Anderson
> ---
> Changes in v2:
> - Proper title (sorry!)
>
> .../devicetree/bindings/display/panel/starry,kr12
Hi,
On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
wrote:
> From: Simon Xue
>
It is usual a good practice to include at least a single sentence
here, even if the patch is trivial. In this case it could say
"This patch makes it possible to compile the rockchip-iommu driver on
ARM64 platform t
Hi,
On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
wrote:
> Use DMA API instead of architecture internal functions like
> __cpuc_flush_dcache_area() etc.
>
> To support the virtual device like DRM the virtual slave iommu
> added in the previous patch, attaching to which the DRM can use
> it own
When executing in a PCI passthrough based virtuzliation environemnt, the
hypervisor will usually attempt to send a PCIe bus reset signal to the
ASIC when the VM reboots. In this scenario, the card is not correctly
initialized, but we still consider it to be posted. Therefore, in a
passthrough based
On Fri, Jun 10, 2016 at 3:52 PM, Doug Anderson wrote:
> Rob,
>
> On Fri, Jun 10, 2016 at 11:43 AM, Rob Clark wrote:
>> On Fri, Jun 10, 2016 at 1:02 PM, Douglas Anderson
>> wrote:
>>> The Starry KR122EA0SRA is a 12.2", 1920x1200 TFT-LCD panel connected
>>> using eDP interfaces.
>>
>> so drive-by
On Fri, Jun 10, 2016 at 04:33:13PM +0200, Daniel Vetter wrote:
> On Fri, Jun 10, 2016 at 09:52:59AM +0100, Liviu Dudau wrote:
> > On Thu, Jun 09, 2016 at 08:56:29PM +0200, Daniel Vetter wrote:
> > I'm seeing ->disable being called at HPD event time, which is soon after
> > ->probe.
> >
> > > This
From: Michel Dänzer
With the previous change, it's safe to let page flips take effect
anytime during a vertical blank period.
This can avoid delaying a flip by a frame in some cases where we only
get to amdgpu_flip_work_func -> adev->mode_info.funcs->page_flip during
the target vertical blank p
From: Michel Dänzer
If userspace wants a page flip to take effect during vblank sequence n,
it has to wait for vblank seqno n-1 before calling the
DRM_IOCTL_MODE_PAGE_FLIP ioctl.
This change makes sure that we do not program the flip to the hardware
before the end of vblank seqno n-1 in this ca
From: Michel Dänzer
If reservation_object_get_fences_rcu failed, we'd previously go directly
to the cleanup label, so we'd leave the BO pinned.
While we're at it, remove two amdgpu_bo_unreserve calls in favour of two
new labels.
Signed-off-by: Michel Dänzer
---
drivers/gpu/drm/amd/amdgpu/am
From: Michel Dänzer
The per-device tracking hasn't been used since commit dafffda0
("drm/info: Remove unused code").
The per-file-descriptor tracking will be used by a following amdgpu
driver change.
Note that last_vblank_wait is only updated when the corresponding wait
completes, and is set t
From: Michel Dänzer
Consolidate the _DRM_VBLANK_NEXTONMISS handling between drm_wait_vblank
and drm_queue_vblank_event.
This is a cleanup spotted while working on the next change.
(The way it was previously handled could also theoretically result in
drm_queue_vblank_event unnecessarily bumping
The main purpose of this series is patch 5, which can avoid delaying
flips for a frame in some cases. It depends on patch 4 to prevent flips
from taking effect too early, which in turn depends on the core DRM
patch 2.
Patches 1 & 3 are cleanups I noticed while working on the other patches.
Mario,
Den 10.06.2016 17:34, skrev Daniel Vetter:
> On Fri, Jun 10, 2016 at 04:55:59PM +0200, Noralf Trønnes wrote:
>> Provides helper functions for drivers that have a simple display
>> pipeline. Plane, crtc and encoder are collapsed into one entity.
>>
>> Cc: jsarha at ti.com
>> Signed-off-by: Noralf
On 10 June 2016 at 15:07, Nicolai Hähnle wrote:
> Ping.
>
Sorry about that, I thought I've already mentioned it:
Reviewed-by: Emil Velikov
I take it you have commit access ? If not, let me know and I'll push if for you.
Emil
On Fri, Jun 10, 2016 at 04:55:59PM +0200, Noralf Trønnes wrote:
> Provides helper functions for drivers that have a simple display
> pipeline. Plane, crtc and encoder are collapsed into one entity.
>
> Cc: jsarha at ti.com
> Signed-off-by: Noralf Trønnes
> ---
>
> Changes since v4:
> - Remove
With required ARC PGU updates that allow it to be used on simulation
platforms we may finally utilize ARC PGU in nSIM OSCI virtual platforms
with modern Linux kernels.
Signed-off-by: Alexey Brodkin
---
No changes in v2.
arch/arc/boot/dts/nsimosci.dts | 14 +++---
arch/arc/b
With required ARC PGU updates that allow it to be used on simulation
platforms we may finally utilize ARC PGU in nSIM OSCI virtual platforms
with modern Linux kernels.
Signed-off-by: Alexey Brodkin
---
No changes in v2.
arch/arc/boot/dts/nsimosci.dts | 14 +++---
arch/arc/b
With required ARC PGU updates that allow it to be used on simulation
platforms we may finally utilize ARC PGU in HS38 VDK with modern
Linux kernels.
Signed-off-by: Alexey Brodkin
---
No changes in v2.
arch/arc/boot/dts/vdk_axs10x_mb.dtsi| 13 +
arch/arc/boot/dts/vdk_hs38_smp.dt
From: Ruud Derwig
In case of simulation there's no real encoder/transmitter device
because in the model's virtual LCD we're rendering whatever
appears in frame-buffer memory.
Signed-off-by: Ruud Derwig
Signed-off-by: Alexey Brodkin
---
Changes v1 -> v2:
* Got rid of dummy arcpgu_drm_encoder
Initially ARC PGU required real encoder/trnasmitter to exist.
That was fine for real HW such as ARC SDP boards.
But on some simulaiton platroms like ARC VDK or nSIM OSCI we have model
of the same ARC PGU and ability to output video data in a virtual LCD.
To make ARC PGU driver usable in those vir
Hello Daniel,
Daniel Vetter wrote:
> On Fri, Jun 10, 2016 at 12:12:45PM +0200, Tobias Jakobi wrote:
>> Ping!
>
> exynos maintainer Inki isn't on cc, so good chances he'll miss this.
Both the initial mail and my ping have Inki in the Cc.
- Tobias
> -Daniel
>
>>
>> - Tobias
>>
>> Tobias Jakobi
On Tue, Jun 07, 2016 at 01:47:55PM +0200, Boris Brezillon wrote:
> Hello,
>
> This patch series aims at replacing all dummy ->best_encoder()
> implementations where we have a 1:1 relationship between encoders
> and connectors.
> The core already provides the drm_atomic_helper_best_encoder()
> func
On Tue, Jun 07, 2016 at 01:48:01PM +0200, Boris Brezillon wrote:
> For all outputs except dp_mst, we have a 1:1 relationship between
> connectors and encoders and the driver is relying on the atomic helpers:
> we can drop the custom ->best_encoder() implementation and let the core
> call drm_atomic
On Wed, Jun 08, 2016 at 02:19:13PM +0200, Daniel Vetter wrote:
> This is now handled by the core, drivers can totally ignore lifetime
> issues of drm events.
>
> Cc: Tomeu Vizoso
> Cc: Mark yao
> Tested-by: Tomeu Vizoso
> Reviewed-by: Tomeu Vizoso
> Signed-off-by: Daniel Vetter
Ok, I merged
On Fri, Jun 10, 2016 at 12:07:53AM +0200, Daniel Vetter wrote:
> Now that the core helpers support nonblocking atomic commits there's
> no need to invent that wheel separately (instead of fixing the bug in
> the atomic implementation of virtio, as it should have been done!).
>
> v2: Rebased on top
On Fri, Jun 10, 2016 at 04:03:25PM +0100, Liviu Dudau wrote:
> Documentation for drm_atomic_crtc_for_each_plane() makes reference to
> a function called drm_crtc_for_each_pending_plane(). I've guessed that
> the actual function name is drm_atomic_crtc_state_for_each_plane() as
> that matches best t
On Fri, Jun 10, 2016 at 03:01:03PM +, Alexey Brodkin wrote:
> Hi Daniel,
>
> On Fri, 2016-06-10 at 16:54 +0200, Daniel Vetter wrote:
> > On Fri, Jun 10, 2016 at 04:19:27PM +0200, Daniel Vetter wrote:
> > >
> > > On Fri, Jun 10, 2016 at 01:23:22PM +, Alexey Brodkin wrote:
> > > >
> > > >
Hi,
On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
wrote:
> Rockchip DRM used the arm special API, arm_iommu_*(), to attach
> iommu for ARM32 SoCs. This patch convert to common iommu API
> so it would support ARM64 like RK3399.
>
> The general idea is domain_alloc(), attach_device() and
> arch_
(Re-send since it's been a week.)
I bisected it to commit 0955c1250e ("drm/crtc: take references to
connectors used in a modeset. (v2)"). The commit before that (6e86d58be3)
gives me working X. 0955c1250e produces a kernel oops and a blank screen.
4.7-rc1 with 0955c1250e reverted also works, wh
Provides helper functions for drivers that have a simple display
pipeline. Plane, crtc and encoder are collapsed into one entity.
Cc: jsarha at ti.com
Signed-off-by: Noralf Trønnes
---
Changes since v4:
- Remove drm_connector_register() call
- Forgot to assign pipe->connector
Changes since v3:
On Fri, Jun 10, 2016 at 04:19:27PM +0200, Daniel Vetter wrote:
> On Fri, Jun 10, 2016 at 01:23:22PM +, Alexey Brodkin wrote:
> > Hi Daniel,
> >
> > On Thu, 2016-06-09 at 16:37 +0200, Daniel Vetter wrote:
> > > On Thu, Jun 9, 2016 at 4:31 PM, Daniel Vetter wrote:
> > > >
> > > > On Thu, Jun 9
On Fri, Jun 10, 2016 at 05:57:12PM +0900, Michel Dänzer wrote:
> From: Michel Dänzer
>
> If userspace wants a page flip to take effect during vblank sequence n,
> it has to wait for vblank seqno n-1 before calling the
> DRM_IOCTL_MODE_PAGE_FLIP ioctl.
>
> This change makes sure that we do not
On Thu, Jun 09, 2016 at 01:57:54PM -0700, Doug Anderson wrote:
> Brian,
>
> On Thu, Jun 9, 2016 at 10:46 AM, Brian Norris
> wrote:
> > Rockchip DRM does not yet build properly for ARM64, but we might as well
> > get the printf formatting correct now, to avoid the following warnings:
> >
> > driv
On Fri, Jun 10, 2016 at 09:52:59AM +0100, Liviu Dudau wrote:
> On Thu, Jun 09, 2016 at 08:56:29PM +0200, Daniel Vetter wrote:
> I'm seeing ->disable being called at HPD event time, which is soon after
> ->probe.
>
> > This is the case when enabling a crtc when it is fully
> > disabled. Just menti
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On Thu, Jun 09, 2016 at 03:32:55PM +0200, Andrea Merello wrote:
> This driver supports the VGA/LCD core available from OpenCores:
> http://opencores.org/project,vga_lcd
>
> It's intended as a replacement for the "ocfb" framebuffer driver
>
> Signed-off-by: Andrea Merello
> Cc: Stefan Kristiansso
On Fri, Jun 10, 2016 at 04:16:06PM +0300, Jyri Sarha wrote:
> On 06/10/16 16:08, Tomi Valkeinen wrote:
> > On 10/06/16 15:48, Tomi Valkeinen wrote:
> >> On 10/06/16 15:29, Ville Syrjälä wrote:
> >>
> The HW does not support any kind of blending to black
> or to anything else.
> >>>
> >>
On Fri, Jun 10, 2016 at 04:25:47PM +0300, Ville Syrjälä wrote:
> On Fri, Jun 10, 2016 at 04:16:06PM +0300, Jyri Sarha wrote:
> > On 06/10/16 16:08, Tomi Valkeinen wrote:
> > > On 10/06/16 15:48, Tomi Valkeinen wrote:
> > >> On 10/06/16 15:29, Ville Syrjälä wrote:
> > >>
> > The HW does not
On Fri, Jun 10, 2016 at 01:23:22PM +, Alexey Brodkin wrote:
> Hi Daniel,
>
> On Thu, 2016-06-09 at 16:37 +0200, Daniel Vetter wrote:
> > On Thu, Jun 9, 2016 at 4:31 PM, Daniel Vetter wrote:
> > >
> > > On Thu, Jun 9, 2016 at 4:29 PM, Alexey Brodkin
> > > wrote:
> > > >
> > > > Hi Daniel,
>
Some cleanups:
- Use simpler names for DT nodes in the example
- Use references instead of dumping Document links everywhere
Signed-off-by: Archit Taneja
---
.../devicetree/bindings/display/msm/dsi.txt| 45 +++---
1 file changed, 22 insertions(+), 23 deletions(-)
diff -
The PLL in the DSI PHY block generates 2 clock outputs (Byte and Pixel
clocks) that are fed into the Multimedia Clock Controller (MMCC). The MMCC
uses these as source clocks for some of its RCGs to generate clocks that
finally feed to the DSI host controller.
Use the assigned clocks DT bindings to
The DSI node now has two ports that describe the connection between the
MDP interface output and the DSI input, and the connection between the DSI
output and the connected panel/bridge. Update the properties and the
example.
Also, use generic PHY bindings instead of the custom one.
Signed-off-by:
The "qcom,data-lane-map" binding mentioned in the document is changed to
the more generic "data-lanes" property specified in:
Documentation/devicetree/bindings/media/video-interfaces.txt
The previous binding expressed physical to logical data lane mappings,
the standard "data-lanes" binding uses
A more standard DT binding describing data lanes already exists here:
Documentation/devicetree/bindings/media/video-interfaces.txt
Use this binding instead of "qcom,data-lane-map". One difference
in the standard binding w.r.t to the existing binding is that it
provides a logical to physical mappin
The DSI host links to the DSI PHY device using a custom binding. Switch to
the generic PHY bindings. The DSI PHY driver itself doesn't use the common
PHY framework for now.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
The DSI interface is going to have two ports defined in its device node.
The first port is always going to be the link between the MDP output
and the input to DSI, the second port is going to be the link between
the DSI output and the connected panel/bridge:
- - --
MDP5:
- Don't ask for source clock
MDP4:
- Give a better name for MDP_TV_CLK
- Remove TV_SRC
- Add MDP_AXI_CLK
Signed-off-by: Archit Taneja
---
Documentation/devicetree/bindings/display/msm/mdp.txt | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/Documentation/devi
Fix some issues with MDP4 clocks:
- mdp4_dtv_encoder tries to get "src_clk", which is a RCG(TV_SRC) in
MSM8960 and APQ8064. This isn't something the driver should access or
configure. Instead of this, configure the "mdp_clk" (MDP_TV_CLK), a
branch clock in MMCC that has the TV_SRC as its par
The driver expects DT to provide the parent to MDP core clock. The only
operation done to the parent clock is to set a rate. This can be
achieved by setting the rate on the core clock itsef. Don't try to
get the parent clock anymore.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/
Currently, none of the upstream Qualcomm DT files have the display device
nodes populated, even when the DT binding documents are upstream.
This revision drops the patches that add components via parsing ports.
The component addition changes will be handled in a separate patchset
later. These cont
ports "XR24 AR24".
BR,
Jyri
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On Thu, Jun 09, 2016 at 06:25:04PM +0200, Peter Senna Tschudin wrote:
> Add a driver that create a drm_bridge and a drm_connector for the LVDS
> to DP++ display bridge of the GE B850v3.
>
> There are two physical bridges on the video signal pipeline: a
> STDP4028(LVDS to DP) and a STDP2690(DP to D
On Fri, Jun 10, 2016 at 12:12:45PM +0200, Tobias Jakobi wrote:
> Ping!
exynos maintainer Inki isn't on cc, so good chances he'll miss this.
-Daniel
>
> - Tobias
>
> Tobias Jakobi wrote:
> > Neither of these files issue any fbdev related calls.
> >
> > Signed-off-by: Tobias Jakobi
> > ---
> >
On Fri, Jun 10, 2016 at 11:54:50AM +0100, Eric Engestrom wrote:
> On Wed, May 25, 2016 at 02:30:07PM +0200, Tobias Jakobi wrote:
> > The current bitwise AND should result in the same assembler
> > but this is what the code is actually supposed to do.
> >
> > Signed-off-by: Tobias Jakobi
>
> Revi
L:
<https://lists.freedesktop.org/archives/dri-devel/attachments/20160610/52346d78/attachment.sig>
Ping.
On 13.05.2016 08:14, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> Previously, (*device)->businfo.pci would end up misaligned, which results
> in undefined behavior.
>
> Signed-off-by: Nicolai Hähnle
> ---
> xf86drm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> dif
Documentation for drm_atomic_crtc_for_each_plane() makes reference to
a function called drm_crtc_for_each_pending_plane(). I've guessed that
the actual function name is drm_atomic_crtc_state_for_each_plane() as
that matches best the intent of the comment.
Signed-off-by: Liviu Dudau
---
include/d
On Wed, Jun 1, 2016 at 10:14 PM, Vinay Simha BN wrote:
> Add support for the JDI lt070me05000 WUXGA DSI panel used in
> Nexus 7 2013 devices.
Sorry for the late comment.
[...]
> +static const struct drm_display_mode default_mode = {
> + .clock = 155493,
> + .hdisplay
will be fixed as the driver can define the formats.
Tomi
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On Fri, Jun 10, 2016 at 03:26:30PM +0300, Tomi Valkeinen wrote:
> On 10/06/16 15:23, Ville Syrjälä wrote:
> > On Fri, Jun 10, 2016 at 03:08:18PM +0300, Tomi Valkeinen wrote:
> >> On 10/06/16 15:05, Ville Syrjälä wrote:
> >>
> I'm not sure what's the common way, but tilcdc doesn't support a
Read DisplayPort branch device info from through debugfs
interface.
v2: use drm_dp_helper routines to collect data
v3: cleanup to match the drm_dp_helper.c patches introduced
earlier in this series
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/i915_debugfs.c | 72 +
DisplayPort branch device may define max supported bits per
component. Update display info based on this value if bpc
is defined.
v2: cleanup to match the drm_dp_helper.c patches introduced
earlier in this series
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/intel_dp.c | 9 +
Filter out a mode that exceeds the max pixel rate setting
for DP to VGA dongle. This is defined in DPCD register 0x81
if detailed cap info i.e. info field is 4 bytes long and
it is available for DP downstream port.
The register defines the pixel rate divided by 8 in MP/s.
v2: DPCD read outs and c
SW revision is mandatory field for DisplayPort branch
devices. This is defined in DPCD register field 0x50A.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/drm_dp_helper.c | 21 +
include/drm/drm_dp_helper.h | 2 ++
2 files changed, 23 insertions(+)
diff --git a/drivers
HW revision is mandatory field for DisplayPort branch
devices. This is defined in DPCD register field 0x509.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/drm_dp_helper.c | 21 +
include/drm/drm_dp_helper.h | 7 +++
2 files changed, 28 insertions(+)
diff --git a/dr
Read DisplayPort branch device id string.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/drm_dp_helper.c | 12
include/drm/drm_dp_helper.h | 2 ++
2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 3dab8a4..0c
Helper routine to read out maximum supported bits per
component for DisplayPort legay converters.
v2: Return early if detailed port cap info is not available.
Replace if-else ladder with switch-case (Ville)
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/drm_dp_helper.c | 42
Helper routine to read out maximum supported pixel rate
for DisplayPort legay VGA converter or TMDS clock rate
for other digital legacy converters. The helper returns
clock rate in kHz.
v2: Return early if detailed port cap info is not available.
Replace if-else ladder with switch-case (Ville)
Drop "VGA" from bits per component definitions as these
are also used by other standards such as DVI, HDMI,
DP++.
Signed-off-by: Mika Kahola
---
include/drm/drm_dp_helper.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/dr
Add missing DisplayPort downstream port types. The introduced
new port types are DP++ and Wireless.
Signed-off-by: Mika Kahola
---
include/drm/drm_dp_helper.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 5a848e7..e384c7f 10
Prep work for DP branch device handling
This series of patches reads DPCD register 0x80h for receiver
capabilities for DP branch devices. The branch device types are
converters for the following standards
- DP to VGA
- DP to DVI
- DP to HDMI
- DP++ dual mode
- Wireless WiGig
DPCD register d
ending to black
or to anything else.
Tomi
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x27;ve reviewed more carefully.
Thanks for bringing that to my attention, I'll go fix those up.
Thierry
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On Fri, Jun 10, 2016 at 03:08:18PM +0300, Tomi Valkeinen wrote:
> On 10/06/16 15:05, Ville Syrjälä wrote:
>
> >> I'm not sure what's the common way, but tilcdc doesn't support alpha.
> >> ARGB works, of course, by ignoring A, but... If an userspace app creates
> >> ARGB buffer, does the app expe
Hi,
On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
wrote:
> An virtual iommu without reg or interrupts for display.
> Adding this according to iommu driver changes.
>
> Signed-off-by: Shunqian Zheng
> ---
> arch/arm/boot/dts/rk3288.dtsi | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff -
Hi,
On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
wrote:
> An virtual master device like DRM need to attach to iommu
> domain to share the domain with VOP(the one with actual
> iommu slave). We currently check the group is NULL to indicate
> a virtual master, which is not true since we decide
eep ARGB allowed for now. If we want to disallow
it, it's better to be done in a separate patch.
Reviewed-by: Tomi Valkeinen
Tomi
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Hi Daniel,
On Fri, 2016-06-10 at 17:09 +0200, Daniel Vetter wrote:
> On Fri, Jun 10, 2016 at 03:01:03PM +, Alexey Brodkin wrote:
> >Â
> > > Ok I went ahead and pushed a slight revised version of that patch which
> > > just unconditionally sends out the event. That's not correct, but at least
On Fri, Jun 10, 2016 at 3:03 PM, Rob Clark wrote:
> On Fri, Jun 10, 2016 at 3:52 PM, Doug Anderson
> wrote:
>> Rob,
>>
>> On Fri, Jun 10, 2016 at 11:43 AM, Rob Clark wrote:
>>> On Fri, Jun 10, 2016 at 1:02 PM, Douglas Anderson >> chromium.org> wrote:
The Starry KR122EA0SRA is a 12.2", 1920
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The driver needs the number of bytes per pixel, not the bpp and depth
info meant for fbdev compatibility. Use the right API.
In the tilcdc_crtc_mode_set() function compute the hardware register
value directly from the pixel format instead of computing the number of
bits per pixels first.
Signed-o
Hi Tomi,
On Friday 10 Jun 2016 14:51:45 Tomi Valkeinen wrote:
> On 09/06/16 02:32, Laurent Pinchart wrote:
> > The driver needs the number of bytes per pixel, not the bpp and depth
> > info meant for fbdev compatibility. Use the right API.
> >
> > In the tilcdc_crtc_mode_set() function compute th
On Fri, Jun 10, 2016 at 02:51:45PM +0300, Tomi Valkeinen wrote:
>
>
> On 09/06/16 02:32, Laurent Pinchart wrote:
> > The driver needs the number of bytes per pixel, not the bpp and depth
> > info meant for fbdev compatibility. Use the right API.
> >
> > In the tilcdc_crtc_mode_set() function com
Hi Boris,
On Tue, 2016-06-07 at 13:47 +0200, Boris Brezillon wrote:
> We have a 1:1 relationship between connectors and encoders and the
> driver is relying on the atomic helpers: we can drop the custom
> ->best_encoder(), and let the core call drm_atomic_helper_best_encoder()
> for us.
>
> Signe
Hi Daniel,
On Fri, 2016-06-10 at 16:54 +0200, Daniel Vetter wrote:
> On Fri, Jun 10, 2016 at 04:19:27PM +0200, Daniel Vetter wrote:
> >
> > On Fri, Jun 10, 2016 at 01:23:22PM +, Alexey Brodkin wrote:
> > >
> > > Hi Daniel,
> > >
> > > On Thu, 2016-06-09 at 16:37 +0200, Daniel Vetter wrote:
;
>
Reviewed-by: Tomi Valkeinen
Tomi
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Hello Peter,
On Thu, Jun 9, 2016 at 12:25 PM, Peter Senna Tschudin
wrote:
> Devicetree bindings documentation for the GE B850v3 LVDS/DP++
> display bridge.
>
> Cc: Enric Balletbo i Serra
> Cc: Philipp Zabel
> Cc: Rob Herring
> Cc: Fabio Estevam
> Signed-off-by: Peter Senna Tschudin
> ---
> C
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